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hv: treewide: convert some MACROs to inline functions
MISRA-C requires that each parameter in the MACRO shall be in brackets. In some cases, adding brackets for all of the parameters may not be a perfect solution. For example, it may affect the code readability when there are many parameters used in the MACRO. And duplicated brackets will appear when one MACRO called another MACRO which is using same parameters. This patch convert some MACROs to inline functions to avoid such cases. v1 -> v2: * Remove the unnecessary changes in hypervisor/bsp/uefi/efi/boot.h Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
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@@ -23,8 +23,11 @@ uint64_t get_microcode_version(void)
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* According to SDM vol 3 Table 9-7. If data_size field of uCode
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* header is zero, the ucode length is 2000
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*/
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#define UCODE_GET_DATA_SIZE(uhdr) \
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((uhdr.data_size != 0U) ? uhdr.data_size : 2000U)
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static inline size_t get_ucode_data_size(struct ucode_header *uhdr)
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{
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return ((uhdr->data_size != 0U) ? uhdr->data_size : 2000U);
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}
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void acrn_update_ucode(struct vcpu *vcpu, uint64_t v)
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{
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uint64_t gva, fault_addr;
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@@ -47,7 +50,7 @@ void acrn_update_ucode(struct vcpu *vcpu, uint64_t v)
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return;
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}
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data_size = UCODE_GET_DATA_SIZE(uhdr) + sizeof(struct ucode_header);
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data_size = get_ucode_data_size(&uhdr) + sizeof(struct ucode_header);
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data_page_num =
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((data_size + CPU_PAGE_SIZE) - 1U) >> CPU_PAGE_SHIFT;
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@@ -336,9 +336,9 @@ int32_t pio_instr_vmexit_handler(struct vcpu *vcpu)
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exit_qual = vcpu->arch_vcpu.exit_qualification;
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io_req->type = REQ_PORTIO;
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pio_req->size = VM_EXIT_IO_INSTRUCTION_SIZE(exit_qual) + 1UL;
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pio_req->address = VM_EXIT_IO_INSTRUCTION_PORT_NUMBER(exit_qual);
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if (VM_EXIT_IO_INSTRUCTION_ACCESS_DIRECTION(exit_qual) == 0UL) {
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pio_req->size = vm_exit_io_instruction_size(exit_qual) + 1UL;
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pio_req->address = vm_exit_io_instruction_port_number(exit_qual);
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if (vm_exit_io_instruction_access_direction(exit_qual) == 0UL) {
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pio_req->direction = REQUEST_WRITE;
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pio_req->value = (uint32_t)vcpu_get_gpreg(vcpu, CPU_REG_RAX);
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} else {
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@@ -264,23 +264,26 @@ int cpuid_vmexit_handler(struct vcpu *vcpu)
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int cr_access_vmexit_handler(struct vcpu *vcpu)
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{
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uint64_t reg;
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int idx = VM_EXIT_CR_ACCESS_REG_IDX(vcpu->arch_vcpu.exit_qualification);
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uint32_t idx;
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uint64_t exit_qual;
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ASSERT((idx>=0) && (idx<=15), "index out of range");
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exit_qual = vcpu->arch_vcpu.exit_qualification;
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idx = (uint32_t)vm_exit_cr_access_reg_idx(exit_qual);
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ASSERT((idx <= 15U), "index out of range");
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reg = vcpu_get_gpreg(vcpu, idx);
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switch ((VM_EXIT_CR_ACCESS_ACCESS_TYPE
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(vcpu->arch_vcpu.exit_qualification) << 4) |
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VM_EXIT_CR_ACCESS_CR_NUM(vcpu->arch_vcpu.exit_qualification)) {
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case 0x00U:
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switch ((vm_exit_cr_access_type(exit_qual) << 4U) |
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vm_exit_cr_access_cr_num(exit_qual)) {
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case 0x00UL:
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/* mov to cr0 */
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vcpu_set_cr0(vcpu, reg);
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break;
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case 0x04U:
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case 0x04UL:
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/* mov to cr4 */
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vcpu_set_cr4(vcpu, reg);
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break;
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case 0x08U:
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case 0x08UL:
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/* mov to cr8 */
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/* According to SDM 6.15 "Exception and interrupt Reference":
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*
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@@ -293,7 +296,7 @@ int cr_access_vmexit_handler(struct vcpu *vcpu)
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}
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vlapic_set_cr8(vcpu->arch_vcpu.vlapic, reg);
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break;
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case 0x18U:
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case 0x18UL:
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/* mov from cr8 */
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reg = vlapic_get_cr8(vcpu->arch_vcpu.vlapic);
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vcpu_set_gpreg(vcpu, idx, reg);
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@@ -303,11 +306,8 @@ int cr_access_vmexit_handler(struct vcpu *vcpu)
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return -EINVAL;
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}
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TRACE_2L(TRACE_VMEXIT_CR_ACCESS,
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VM_EXIT_CR_ACCESS_ACCESS_TYPE
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(vcpu->arch_vcpu.exit_qualification),
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VM_EXIT_CR_ACCESS_CR_NUM
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(vcpu->arch_vcpu.exit_qualification));
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TRACE_2L(TRACE_VMEXIT_CR_ACCESS, vm_exit_cr_access_type(exit_qual),
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vm_exit_cr_access_cr_num(exit_qual));
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return 0;
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}
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