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hv: intercept IA32_PAT MSR

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Preparing for emulating guest's CR0.CD and CR0.NW bits:
 - Intercept both rdmsr and wrmsr for IA32_PAT
 - Track guest's IA32_PAT MSR with vcpu.arch_vcpu.contexts.ia32_pat

Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Zide Chen
2018-06-19 15:03:14 -07:00
committed by lijinxia
parent 873e90cd9a
commit 6801d826e2
5 changed files with 58 additions and 0 deletions
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1
hypervisor/include/arch/x86/guest/guest.h
View File

@@ -28,6 +28,7 @@ enum {
IDX_BIOS_UPDT_TRIG,
IDX_BIOS_SIGN_ID,
IDX_TSC,
IDX_PAT,
IDX_MAX_MSR
};

9
hypervisor/include/arch/x86/msr.h
View File

@@ -509,6 +509,15 @@
#define PAT_MEM_TYPE_WP 0x05U /* write protected */
#define PAT_MEM_TYPE_WB 0x06U /* writeback */
#define PAT_MEM_TYPE_UCM 0x07U /* uncached minus */
#define PAT_MEM_TYPE_INVALID(x) (((x) != PAT_MEM_TYPE_UC) && \
((x) != PAT_MEM_TYPE_WC) && \
((x) != PAT_MEM_TYPE_WT) && \
((x) != PAT_MEM_TYPE_WP) && \
((x) != PAT_MEM_TYPE_WB) && \
((x) != PAT_MEM_TYPE_UCM))
/* 5 high-order bits in every field are reserved */
#define PAT_FIELD_RSV_BITS (0xF8U)
/* MTRR memory type definitions */
#define MTRR_MEM_TYPE_UC 0x00U /* uncached */

3
hypervisor/include/arch/x86/vmx.h
View File

@@ -414,6 +414,9 @@ int vmx_restart(uint16_t pcpu_id);
int exec_vmclear(void *addr);
int exec_vmptrld(void *addr);
uint64_t vmx_rdmsr_pat(struct vcpu *vcpu);
int vmx_wrmsr_pat(struct vcpu *vcpu, uint64_t value);
int vmx_write_cr0(struct vcpu *vcpu, uint64_t cr0);
int vmx_write_cr3(struct vcpu *vcpu, uint64_t cr3);
int vmx_write_cr4(struct vcpu *vcpu, uint64_t cr4);