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modulization: combine vmx_caps into cpu_caps

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in cpu_caps.c, the vmx_caps & cpu_caps can be combined.

Changes to be committed:
	modified:   arch/x86/cpu_caps.c

Tracked-On: #1842
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Jason Chen CJ 2018-12-10 14:55:33 +08:00 committed by wenlingz
parent 746fbe147d
commit 6830619d08
1 changed files with 25 additions and 24 deletions
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49
hypervisor/arch/x86/cpu_caps.c
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@ -26,16 +26,13 @@
#define VAPIC_FEATURE_POST_INTR (1U << 4U) #define VAPIC_FEATURE_POST_INTR (1U << 4U)
#define VAPIC_FEATURE_VX2APIC_MODE (1U << 5U) #define VAPIC_FEATURE_VX2APIC_MODE (1U << 5U)
static struct vmx_capability {
uint32_t ept;
uint32_t vpid;
} vmx_caps;
struct cpu_capability { struct cpu_capability {
uint8_t apicv_features; uint8_t apicv_features;
uint8_t ept_features; uint8_t ept_features;
};
static struct cpu_capability cpu_caps; uint32_t vmx_ept;
uint32_t vmx_vpid;
} cpu_caps;
struct cpuinfo_x86 boot_cpu_data; struct cpuinfo_x86 boot_cpu_data;
@ -261,10 +258,21 @@ static void apicv_cap_detect(void)
cpu_caps.apicv_features = features; cpu_caps.apicv_features = features;
} }
static void vmx_mmu_cap_detect(void)
{
uint64_t val;
/* Read the MSR register of EPT and VPID Capability - SDM A.10 */
val = msr_read(MSR_IA32_VMX_EPT_VPID_CAP);
cpu_caps.vmx_ept = (uint32_t) val;
cpu_caps.vmx_vpid = (uint32_t) (val >> 32U);
}
void cpu_cap_detect(void) void cpu_cap_detect(void)
{ {
apicv_cap_detect(); apicv_cap_detect();
ept_cap_detect(); ept_cap_detect();
vmx_mmu_cap_detect();
} }
bool is_ept_supported(void) bool is_ept_supported(void)
@ -287,6 +295,16 @@ bool is_apicv_posted_intr_supported(void)
return ((cpu_caps.apicv_features & VAPIC_FEATURE_POST_INTR) != 0U); return ((cpu_caps.apicv_features & VAPIC_FEATURE_POST_INTR) != 0U);
} }
bool cpu_has_vmx_ept_cap(uint32_t bit_mask)
{
return ((cpu_caps.vmx_ept & bit_mask) != 0U);
}
bool cpu_has_vmx_vpid_cap(uint32_t bit_mask)
{
return ((cpu_caps.vmx_vpid & bit_mask) != 0U);
}
void get_cpu_name(void) void get_cpu_name(void)
{ {
cpuid(CPUID_EXTEND_FUNCTION_2, cpuid(CPUID_EXTEND_FUNCTION_2,
@ -366,25 +384,8 @@ static inline bool cpu_has_vmx_unrestricted_guest_cap(void)
!= 0UL); != 0UL);
} }
bool cpu_has_vmx_ept_cap(uint32_t bit_mask)
{
return ((vmx_caps.ept & bit_mask) != 0U);
}
bool cpu_has_vmx_vpid_cap(uint32_t bit_mask)
{
return ((vmx_caps.vpid & bit_mask) != 0U);
}
static int32_t check_vmx_mmu_cap(void) static int32_t check_vmx_mmu_cap(void)
{ {
uint64_t val;
/* Read the MSR register of EPT and VPID Capability - SDM A.10 */
val = msr_read(MSR_IA32_VMX_EPT_VPID_CAP);
vmx_caps.ept = (uint32_t) val;
vmx_caps.vpid = (uint32_t) (val >> 32U);
if (!cpu_has_vmx_ept_cap(VMX_EPT_INVEPT)) { if (!cpu_has_vmx_ept_cap(VMX_EPT_INVEPT)) {
pr_fatal("%s, invept not supported\n", __func__); pr_fatal("%s, invept not supported\n", __func__);
return -ENODEV; return -ENODEV;