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https://github.com/projectacrn/acrn-hypervisor.git
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function name change in init.c
- bsp_boot_init to init_primary_cpu - bsp_boot_post to init_primary_cpu_post Tracked-On: #1842 Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
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@ -162,7 +162,7 @@ after:
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mov %eax,%gs // Was 32bit POC CLS
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mov %eax,%gs // Was 32bit POC CLS
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/* continue with chipset level initialization */
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/* continue with chipset level initialization */
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call bsp_boot_init
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call init_primary_cpu
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loop:
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loop:
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jmp loop
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jmp loop
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@ -75,7 +75,7 @@ static void enter_guest_mode(uint16_t pcpu_id)
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cpu_dead();
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cpu_dead();
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}
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}
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static void bsp_boot_post(void)
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static void init_primary_cpu_post(void)
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{
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{
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/* Perform any necessary BSP initialization */
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/* Perform any necessary BSP initialization */
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init_bsp();
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init_bsp();
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@ -96,7 +96,7 @@ static void bsp_boot_post(void)
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/* NOTE: this function is using temp stack, and after SWITCH_TO(runtime_sp, to)
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/* NOTE: this function is using temp stack, and after SWITCH_TO(runtime_sp, to)
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* it will switch to runtime stack.
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* it will switch to runtime stack.
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*/
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*/
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void bsp_boot_init(void)
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void init_primary_cpu(void)
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{
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{
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uint64_t rsp;
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uint64_t rsp;
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@ -105,7 +105,7 @@ void bsp_boot_init(void)
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/* Switch to run-time stack */
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/* Switch to run-time stack */
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rsp = (uint64_t)(&get_cpu_var(stack)[CONFIG_STACK_SIZE - 1]);
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rsp = (uint64_t)(&get_cpu_var(stack)[CONFIG_STACK_SIZE - 1]);
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rsp &= ~(CPU_STACK_ALIGN - 1UL);
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rsp &= ~(CPU_STACK_ALIGN - 1UL);
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SWITCH_TO(rsp, bsp_boot_post);
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SWITCH_TO(rsp, init_primary_cpu_post);
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}
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}
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void init_secondary_cpu(void)
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void init_secondary_cpu(void)
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@ -8,7 +8,7 @@
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/* hypervisor stack bottom magic('intl') */
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/* hypervisor stack bottom magic('intl') */
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#define SP_BOTTOM_MAGIC 0x696e746cUL
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#define SP_BOTTOM_MAGIC 0x696e746cUL
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void bsp_boot_init(void);
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void init_primary_cpu(void);
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void init_secondary_cpu(void);
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void init_secondary_cpu(void);
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#endif /* INIT_H*/
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#endif /* INIT_H*/
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