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HV: Add one correct Descriptor_table struct to configure VMCS
Now one uint64_t type is used to obtain the corresponding descriptor_table for GDT/IDT. This will cause the stack protect corruption under -O2. So the descriptor_table struct is added to configure the GDT/IDT of VMCS. V1->V2: Move the descriptor_table into vmx.h header file And its type is renamed from dt_addr_t to descriptor_table. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Zheng Gen <gen.zheng@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -372,18 +372,18 @@ static void init_guest_state(struct vcpu *vcpu)
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/* Limit */
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limit = 0xFFFF;
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} else if (get_vcpu_mode(vcpu) == PAGE_PROTECTED_MODE) {
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uint64_t gdtb = 0;
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descriptor_table gdtb;
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/* Base *//* TODO: Should guest GDTB point to host GDTB ? */
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/* Obtain the current global descriptor table base */
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asm volatile ("sgdt %0" : : "m" (gdtb));
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value32 = gdtb & 0x0ffff;
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gdtb = gdtb >> 16; /* base */
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if ((gdtb >> 47 & 0x1))
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gdtb |= 0xffff000000000000ull;
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value32 = gdtb.limit;
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base = gdtb;
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if ((gdtb.base >> 47) & 0x1)
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gdtb.base |= 0xffff000000000000ull;
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base = gdtb.base;
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/* Limit */
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limit = HOST_GDT_SIZE - 1;
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@ -407,20 +407,18 @@ static void init_guest_state(struct vcpu *vcpu)
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/* Limit */
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limit = 0xFFFF;
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} else if (get_vcpu_mode(vcpu) == PAGE_PROTECTED_MODE) {
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uint64_t idtb = 0;
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descriptor_table idtb ;
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/* TODO: Should guest IDTR point to host IDTR ? */
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asm volatile ("sidt %0"::"m" (idtb));
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value32 = idtb & 0x0ffff;
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/* Limit */
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limit = value32;
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idtb = idtb >> 16; /* base */
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limit = idtb.limit;
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if ((idtb >> 47 & 0x1))
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idtb |= 0xffff000000000000ull;
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if ((idtb.base >> 47) & 0x1)
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idtb.base |= 0xffff000000000000ull;
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/* Base */
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base = idtb;
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base = idtb.base;
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}
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/* IDTR Base */
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@ -662,8 +660,8 @@ static void init_host_state(__unused struct vcpu *vcpu)
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uint64_t trbase_lo;
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uint64_t trbase_hi;
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uint64_t realtrbase;
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uint64_t gdtb = 0;
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uint64_t idtb = 0;
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descriptor_table gdtb;
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descriptor_table idtb;
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uint16_t tr_sel;
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pr_dbg("*********************");
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@ -721,19 +719,18 @@ static void init_host_state(__unused struct vcpu *vcpu)
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/* TODO: Should guest GDTB point to host GDTB ? */
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/* Obtain the current global descriptor table base */
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asm volatile ("sgdt %0"::"m" (gdtb));
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value32 = gdtb & 0x0ffff;
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gdtb = gdtb >> 16; /* base */
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value32 = gdtb.limit;
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if ((gdtb >> 47) & 0x1)
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gdtb |= 0xffff000000000000ull;
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if ((gdtb.base >> 47) & 0x1)
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gdtb.base |= 0xffff000000000000ull;
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/* Set up the guest and host GDTB base fields with current GDTB base */
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field = VMX_HOST_GDTR_BASE;
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exec_vmwrite(field, gdtb);
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pr_dbg("VMX_HOST_GDTR_BASE: 0x%x ", gdtb);
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exec_vmwrite(field, gdtb.base);
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pr_dbg("VMX_HOST_GDTR_BASE: 0x%x ", gdtb.base);
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/* TODO: Should guest TR point to host TR ? */
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trbase = gdtb + tr_sel;
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trbase = gdtb.base + tr_sel;
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if ((trbase >> 47) & 0x1)
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trbase |= 0xffff000000000000ull;
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@ -759,16 +756,13 @@ static void init_host_state(__unused struct vcpu *vcpu)
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/* Obtain the current interrupt descriptor table base */
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asm volatile ("sidt %0"::"m" (idtb));
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value32 = idtb & 0x0ffff;
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/* base */
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idtb = idtb >> 16;
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if ((idtb >> 47 & 0x1))
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idtb |= 0xffff000000000000ull;
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if ((idtb.base >> 47) & 0x1)
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idtb.base |= 0xffff000000000000ull;
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field = VMX_HOST_IDTR_BASE;
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exec_vmwrite(field, idtb);
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pr_dbg("VMX_HOST_IDTR_BASE: 0x%x ", idtb);
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exec_vmwrite(field, idtb.base);
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pr_dbg("VMX_HOST_IDTR_BASE: 0x%x ", idtb.base);
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asm volatile ("mov $0x174, %rcx");
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asm volatile ("rdmsr");
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@ -472,6 +472,12 @@ static inline uint8_t get_vcpu_mode(struct vcpu *vcpu)
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{
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return vcpu->arch_vcpu.cpu_mode;
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}
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typedef struct _descriptor_table_{
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uint16_t limit;
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uint64_t base;
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}__attribute__((packed)) descriptor_table;
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#endif /* ASSEMBLER */
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#endif /* VMX_H_ */
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