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DM: set cs_limit from DM side for UOS

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For CS of UOS, we would like to pass all related info (cs attribute,
limit, base) from DM.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
This commit is contained in:
Yin Fengwei
2018-10-29 16:09:17 +08:00
committed by lijinxia
parent b12c7b741b
commit 6993fdb3e9
4 changed files with 5 additions and 1 deletions
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1
devicemodel/core/sw_load_vsbl.c
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@@ -307,6 +307,7 @@ acrn_sw_load_vsbl(struct vmctx *ctx)
ctx->bsp_regs.vcpu_regs.cr0 = 0x30U;
ctx->bsp_regs.vcpu_regs.cs_ar = 0x009FU;
ctx->bsp_regs.vcpu_regs.cs_sel = 0xF000U;
ctx->bsp_regs.vcpu_regs.cs_limit = 0xFFFFU;
ctx->bsp_regs.vcpu_regs.cs_base = (VSBL_TOP(ctx) - 16) &0xFFFF0000UL;
ctx->bsp_regs.vcpu_regs.rip = (VSBL_TOP(ctx) - 16) & 0xFFFFUL;
ctx->bsp_regs.vcpu_regs.gprs.rsi = CONFIGPAGE_OFF(ctx);