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Update pages with missing links
Signed-off-by: Deb Taylor <deb.taylor@intel.com> Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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@ -36,11 +36,11 @@ framework. There are 3 major subsystems in SOS:
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- VHM driver notifies HV on the completion through hypercall
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- VHM driver notifies HV on the completion through hypercall
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- DM injects VIRQ to UOS frontend device through hypercall
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- DM injects VIRQ to UOS frontend device through hypercall
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- VHM: Virtio and HV service Module is a kernel module in SOS as a
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- VHM: Virtio and Hypervisor Service Module is a kernel module in SOS as a
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middle layer to support DM. Refer to chapter 5.4 for details
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middle layer to support DM. Refer to :ref:`virtio-APIs` for details
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This chapter introduces how the acrn-dm application is configured and
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This section introduces how the acrn-dm application is configured and
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walks through the DM overall flow. We'll then elaborate on device,
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walks through the DM overall flow. We'll then elaborate on device,
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ISA, and PCI emulation.
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ISA, and PCI emulation.
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Configuration
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Configuration
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@ -140,8 +140,8 @@ DM Initialization
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allocated by DM for a specific VM in user space. This buffer is
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allocated by DM for a specific VM in user space. This buffer is
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shared between DM, VHM and HV. **Set I/O Request buffer** calls
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shared between DM, VHM and HV. **Set I/O Request buffer** calls
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an ioctl executing a hypercall to share this unique page buffer
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an ioctl executing a hypercall to share this unique page buffer
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with VHM and HV. Please refer to chapter 3.4 and 4.4 for more
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with VHM and HV. Refer to :ref:`hld-io-emulation` and
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details.
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:ref:`IO-emulation-in-sos` for more details.
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- **Memory Setup**: UOS memory is allocated from SOS
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- **Memory Setup**: UOS memory is allocated from SOS
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memory. This section of memory will use SOS hugetlbfs to allocate
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memory. This section of memory will use SOS hugetlbfs to allocate
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@ -158,11 +158,11 @@ DM Initialization
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API and PIO handler by *register_inout()* API or INOUT_PORT()
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API and PIO handler by *register_inout()* API or INOUT_PORT()
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macro.
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macro.
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- **PCI Init**: PCI initialization scans PCI bus/slot/function to
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- **PCI Init**: PCI initialization scans the PCI bus/slot/function to
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identify each configured PCI device on the acrn-dm command line
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identify each configured PCI device on the acrn-dm command line
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and initializes their configuration space by calling their
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and initializes their configuration space by calling their
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dedicated vdev_init() function. For more detail of DM PCI
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dedicated vdev_init() function. For more details on the DM PCI
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emulation please refer to section 4.6.
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emulation, refer to `PCI Emulation`_.
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- **ACPI Build**: If there is "-A" option in acrn-dm command line, DM
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- **ACPI Build**: If there is "-A" option in acrn-dm command line, DM
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will build ACPI table into its VM's F-Segment (0xf2400). This
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will build ACPI table into its VM's F-Segment (0xf2400). This
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@ -296,6 +296,8 @@ VHM ioctl interfaces
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IRQ and Interrupts, Device Model management, Guest Memory management,
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IRQ and Interrupts, Device Model management, Guest Memory management,
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PCI assignment, and Power management
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PCI assignment, and Power management
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.. _IO-emulation-in-sos:
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I/O Emulation in SOS
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I/O Emulation in SOS
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********************
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********************
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@ -33,7 +33,7 @@ synchronize access by the producer and consumer.
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sbuf APIs
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sbuf APIs
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=========
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=========
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.. note:: reference APIs defined in hypervisor/include/debug/sbuf.h
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The sbuf APIs are defined in ``hypervisor/include/debug/sbuf.h``
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ACRN Trace
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ACRN Trace
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@ -67,8 +67,8 @@ up:
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Trace APIs
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Trace APIs
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==========
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==========
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.. note:: reference APIs defined in hypervisor/include/debug/trace.h
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See ``hypervisor/include/debug/trace.h``
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for trace_entry struct and functions.
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for trace_entry struct and function APIs.
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SOS Trace Module
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SOS Trace Module
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@ -92,8 +92,10 @@ ACRNTrace application includes a binary to retrieve trace data from
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Sbuf, and Python scripts to convert trace data from raw format into
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Sbuf, and Python scripts to convert trace data from raw format into
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readable text, and do analysis.
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readable text, and do analysis.
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Figure 2.2 shows the sequence of trace initialization and trace data
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.. note:: There was no Figure showing the sequence of trace
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collection. With a debug build, trace components are initialized at boot
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initialization and trace data collection.
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With a debug build, trace components are initialized at boot
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time. After initialization, HV writes trace event date into sbuf
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time. After initialization, HV writes trace event date into sbuf
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until sbuf is full, which can happen easily if the ACRNTrace app is not
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until sbuf is full, which can happen easily if the ACRNTrace app is not
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consuming trace data from Sbuf on SOS user space.
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consuming trace data from Sbuf on SOS user space.
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@ -103,7 +105,6 @@ created to periodically read RAW trace data from sbuf and write to a
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file.
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file.
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.. note:: figure is missing
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.. note:: figure is missing
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Figure 2.2 Sequence of trace init and trace data collection
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Figure 2.2 Sequence of trace init and trace data collection
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These are the Python scripts provided:
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These are the Python scripts provided:
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@ -398,6 +398,8 @@ The workflow can be summarized as:
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6. irqfd related logic inject an interrupt through vhm interrupt API.
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6. irqfd related logic inject an interrupt through vhm interrupt API.
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7. interrupt is delivered to UOS FE driver through hypervisor.
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7. interrupt is delivered to UOS FE driver through hypervisor.
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.. _virtio-APIs:
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Virtio APIs
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Virtio APIs
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***********
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***********
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@ -484,9 +484,9 @@ A bitmap in the vCPU structure lists the different requests:
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ACRN provides the function *vcpu_make_request* to make different
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ACRN provides the function *vcpu_make_request* to make different
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requests, set the bitmap of corresponding request, and notify the target vCPU
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requests, set the bitmap of the corresponding request, and notify the target
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through IPI if necessary (when the target vCPU is not currently running). See
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vCPU through the IPI if necessary (when the target vCPU is not currently
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section 3.5.5 for details.
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running). See :ref:`vcpu-request-interrupt-injection` for details.
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.. code-block:: c
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.. code-block:: c
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@ -579,8 +579,8 @@ entry control and exit control, as shown in the table below.
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The table briefly shows how each field got configured.
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The table briefly shows how each field got configured.
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The guest state field is critical for a guest CPU start to run
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The guest state field is critical for a guest CPU start to run
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based on different CPU modes. One structure *boot_ctx* is used to pass
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based on different CPU modes. One structure *boot_ctx* is used to pass
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the necessary initialized guest state to VMX,
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the necessary initialized guest state to VMX, used only for the BSP of a
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used only for the BSP of a guest.
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guest.
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For a guest vCPU's state initialization:
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For a guest vCPU's state initialization:
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@ -879,9 +879,9 @@ exit reason for reading or writing these MSRs is respectively
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*VMX_EXIT_REASON_RDMSR* or *VMX_EXIT_REASON_WRMSR* and the vm exit
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*VMX_EXIT_REASON_RDMSR* or *VMX_EXIT_REASON_WRMSR* and the vm exit
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handler is *rdmsr_vmexit_handler* or *wrmsr_vmexit_handler*.
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handler is *rdmsr_vmexit_handler* or *wrmsr_vmexit_handler*.
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This table shows the predefined MSRs ACRN will trap
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This table shows the predefined MSRs ACRN will trap for all the guests. For
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for all the guests. For the MSRs whose bitmap are not set in the
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the MSRs whose bitmap are not set in the MSR bitmap, guest access will be
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MSR bitmap, guest access will be pass-through directly:
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pass-through directly:
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.. list-table::
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.. list-table::
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:widths: 33 33 33
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:widths: 33 33 33
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@ -131,6 +131,8 @@ model.
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this, device model is linked with lib pci access to access physical PCI
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this, device model is linked with lib pci access to access physical PCI
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device.
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device.
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.. _interrupt-remapping:
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Interrupt Remapping
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Interrupt Remapping
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*******************
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*******************
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@ -64,9 +64,9 @@ default assigned to SOS. Any interrupts received by Guest VM (SOS or
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UOS) device drivers are virtual interrupts injected by HV (via vLAPIC).
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UOS) device drivers are virtual interrupts injected by HV (via vLAPIC).
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HV manages a Host-to-Guest mapping. When a native IRQ/interrupt occurs,
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HV manages a Host-to-Guest mapping. When a native IRQ/interrupt occurs,
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HV decides whether this IRQ/interrupt should be forwarded to a VM and
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HV decides whether this IRQ/interrupt should be forwarded to a VM and
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which VM to forward to (if any). Refer to section 3.7.6 for virtual
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which VM to forward to (if any). Refer to
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interrupt injection and section 3.9.6 for the management of interrupt
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:ref:`virt-interrupt-injection` and :ref:`interrupt-remapping` for
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remapping.
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more information.
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HV does not own any exceptions. Guest VMCS are configured so no VM Exit
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HV does not own any exceptions. Guest VMCS are configured so no VM Exit
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happens, with some exceptions such as #INT3 and #MC. This is to
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happens, with some exceptions such as #INT3 and #MC. This is to
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@ -88,6 +88,8 @@ sources:
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- Inter CPU IPI
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- Inter CPU IPI
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- LAPIC timer
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- LAPIC timer
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.. _physical-interrupt-initialization:
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Physical Interrupt Initialization
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Physical Interrupt Initialization
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*********************************
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*********************************
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@ -356,8 +358,7 @@ IPI Management
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The only purpose of IPI use in HV is to kick a vCPU out of non-root mode
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The only purpose of IPI use in HV is to kick a vCPU out of non-root mode
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and enter to HV mode. This requires I/O request and virtual interrupt
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and enter to HV mode. This requires I/O request and virtual interrupt
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injection be distributed to different IPI vectors. The I/O request uses
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injection be distributed to different IPI vectors. The I/O request uses
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IPI vector 0xF4 upcall (refer to Chapter 5.4). The virtual interrupt
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IPI vector 0xF4 upcall. The virtual interrupt injection uses IPI vector 0xF0.
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injection uses IPI vector 0xF0.
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0xF4 upcall
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0xF4 upcall
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A Guest vCPU VM Exit exits due to EPT violation or IO instruction trap.
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A Guest vCPU VM Exit exits due to EPT violation or IO instruction trap.
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@ -116,7 +116,7 @@ buffer on VM creation, otherwise I/O accesses from UOS cannot be
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emulated by SOS, and all I/O accesses not handled by the I/O handlers in
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emulated by SOS, and all I/O accesses not handled by the I/O handlers in
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the hypervisor will be dropped (reads get all 1's).
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the hypervisor will be dropped (reads get all 1's).
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Refer to Section 4.4.1 for the details of I/O requests and the
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Refer to the following sections for details on I/O requests and the
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initialization of the I/O request buffer.
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initialization of the I/O request buffer.
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Types of I/O Requests
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Types of I/O Requests
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@ -267,8 +267,7 @@ External Interfaces
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The following structures represent an I/O request. *struct vhm_request*
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The following structures represent an I/O request. *struct vhm_request*
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is the main structure and the others are detailed representations of I/O
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is the main structure and the others are detailed representations of I/O
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requests of different kinds. Refer to Section 4.4.4 for the usage of
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requests of different kinds.
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*struct pci_request*.
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.. doxygenstruct:: mmio_request
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.. doxygenstruct:: mmio_request
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:project: Project ACRN
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:project: Project ACRN
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@ -285,7 +284,7 @@ requests of different kinds. Refer to Section 4.4.4 for the usage of
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.. doxygenstruct:: vhm_request
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.. doxygenstruct:: vhm_request
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:project: Project ACRN
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:project: Project ACRN
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For hypercalls related to I/O emulation, refer to Section 3.11.4.
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For hypercalls related to I/O emulation, refer to `I/O Emulation in the Hypervisor`_.
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.. _io-handler-init:
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.. _io-handler-init:
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@ -95,7 +95,7 @@ Memory
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interrupt stack table (IST) which are different across physical
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interrupt stack table (IST) which are different across physical
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processors. LDT is disabled.
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processors. LDT is disabled.
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Refer to section 3.5.2 for a detailed description of interrupt-related
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Refer to :ref:`physical-interrupt-initialization` for a detailed description of interrupt-related
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initial states, including IDT and physical PICs.
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initial states, including IDT and physical PICs.
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After BSP detects that all APs are up, BSP will start creating the first
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After BSP detects that all APs are up, BSP will start creating the first
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@ -14,9 +14,10 @@ management, which includes:
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A guest VM never owns any physical interrupts. All interrupts received by
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A guest VM never owns any physical interrupts. All interrupts received by
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Guest OS come from a virtual interrupt injected by vLAPIC, vIOAPIC or
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Guest OS come from a virtual interrupt injected by vLAPIC, vIOAPIC or
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vPIC. Such virtual interrupts are triggered either from a pass-through
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vPIC. Such virtual interrupts are triggered either from a pass-through
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device or from I/O mediators in SOS via hypercalls. Section 3.8.6
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device or from I/O mediators in SOS via hypercalls. The
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introduces how the hypervisor manages the mapping between physical and
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:ref:`interrupt-remapping` section discusses how the hypervisor manages
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virtual interrupts for pass-through devices.
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the mapping between physical and virtual interrupts for pass-through
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devices.
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Emulation for devices is inside SOS user space device model, i.e.,
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Emulation for devices is inside SOS user space device model, i.e.,
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acrn-dm. However for performance consideration: vLAPIC, vIOAPIC, and vPIC
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acrn-dm. However for performance consideration: vLAPIC, vIOAPIC, and vPIC
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@ -33,6 +34,8 @@ options to guest Linux affects whether it uses PIC or IOAPIC:
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- **Kernel boot param with vIOAPIC**: add "maxcpu=1" (as long as not "0")
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- **Kernel boot param with vIOAPIC**: add "maxcpu=1" (as long as not "0")
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Guest OS will use IOAPIC. And Keep IOAPIC pin2 as source of PIC.
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Guest OS will use IOAPIC. And Keep IOAPIC pin2 as source of PIC.
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.. _vcpu-request-interrupt-injection:
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vCPU Request for Interrupt Injection
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vCPU Request for Interrupt Injection
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************************************
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************************************
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@ -213,6 +216,8 @@ ACRN hypervisor uses the *vcpu_inject_gp/vcpu_inject_pf* functions
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to queue exception request, and follows SDM vol3 - 6.15, Table 6-5 to
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to queue exception request, and follows SDM vol3 - 6.15, Table 6-5 to
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generate double fault if the condition is met.
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generate double fault if the condition is met.
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.. _virt-interrupt-injection:
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Virtual Interrupt Injection
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Virtual Interrupt Injection
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***************************
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***************************
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@ -223,7 +228,7 @@ devices.
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directly. Whenever there is a device's physical interrupt, the
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directly. Whenever there is a device's physical interrupt, the
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corresponding virtual interrupts are injected to SOS via
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corresponding virtual interrupts are injected to SOS via
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vLAPIC/vIOAPIC. SOS does not use vPIC and does not have emulated
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vLAPIC/vIOAPIC. SOS does not use vPIC and does not have emulated
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devices. See section 3.8.5 Device assignment.
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devices. See :ref:`device-assignment`.
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- **For UOS assigned devices**: only PCI devices could be assigned to
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- **For UOS assigned devices**: only PCI devices could be assigned to
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UOS. Virtual interrupt injection follows the same way as SOS. A
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UOS. Virtual interrupt injection follows the same way as SOS. A
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@ -257,6 +257,8 @@ as address translation table when creating SOS_VM as Service OS. And all
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PCI devices on the platform are added to SOS_VM domain. Then enable DMAR
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PCI devices on the platform are added to SOS_VM domain. Then enable DMAR
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translation for DMAR unit(s) if they are not marked as ignored.
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translation for DMAR unit(s) if they are not marked as ignored.
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.. _device-assignment:
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Device assignment
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Device assignment
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*****************
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*****************
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