github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-23 09:47:44 +00:00
Code Issues Projects Releases Wiki Activity

Revert "hv: More changes to enable GPU passthru"

Browse Source 
This reverts commit 8d50d40ff8.
This commit is contained in:
Jason Chen CJ
2018-07-05 09:04:08 +08:00
committed by lijinxia
parent cfb2828585
commit 6ca99713dd
6 changed files with 12 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/arch/x86/ept.c
View File

@@ -489,7 +489,7 @@ int ept_mmap(struct vm *vm, uint64_t hpa,
* to force snooping of PCIe devices if the page
* is cachable
*/
if ((prot & IA32E_EPT_MT_MASK) != IA32E_EPT_UNCACHED && iommu_snoop)
if ((prot & IA32E_EPT_MT_MASK) != IA32E_EPT_UNCACHED)
prot |= IA32E_EPT_SNOOP_CTRL;
map_mem(&map_params, (void *)hpa,
(void *)gpa, size, prot);

9
hypervisor/arch/x86/vtd.c
View File

@@ -152,8 +152,6 @@ struct iommu_domain {
uint64_t trans_table_ptr;
};
bool iommu_snoop = true; /* enable iommu snoop control */
static struct list_head dmar_drhd_units;
static uint32_t dmar_hdrh_unit_count;
@@ -421,13 +419,9 @@ static void dmar_register_hrhd(struct dmar_drhd_rt *dmar_uint)
* How to guarantee it when EPT is used as second-level
* translation paging structures?
*/
/* enable snoop control only if it is supported by all the VT-d engines */
if (!iommu_ecap_sc(dmar_uint->ecap)) {
if (iommu_ecap_sc(dmar_uint->ecap) == 0U)
dev_dbg(ACRN_DBG_IOMMU,
"dmar uint doesn't support snoop control!");
iommu_snoop = false;
}
dmar_uint->max_domain_id = iommu_cap_ndoms(dmar_uint->cap) - 1;
@@ -1015,6 +1009,7 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
ASSERT(false,
"dmaru doesn't support trans passthrough");
} else {
/* TODO: add Device TLB support */
upper =
DMAR_SET_BITSLICE(upper, CTX_ENTRY_UPPER_AW,
width_to_agaw(