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acrn-config: Generate board.c file with multiple RDT resources

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This patch adds support for as generating board.c file
with multiple RDT resources.

Tracked-On: #3715
Signed-off-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Vijay Dhanraj 2020-02-25 15:24:19 -08:00 committed by wenlingz
parent b9f469437d
commit 6cfd81cdf1
1 changed files with 57 additions and 22 deletions
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77
misc/acrn-config/board_config/board_c.py
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@ -4,8 +4,13 @@
#
import sys
import enum
import subprocess
import board_cfg_lib
class RDT(enum.Enum):
L2 = 0
L3 = 1
INCLUDE_HEADER = """
#include <board.h>
@ -13,7 +18,6 @@ INCLUDE_HEADER = """
#include <msr.h>
#include <pci.h>"""
MSR_IA32_L2_MASK_BASE = 0x00000D10
MSR_IA32_L2_MASK_END = 0x00000D4F
MSR_IA32_L3_MASK_BASE = 0x00000C90
@ -76,38 +80,69 @@ def gen_dmar_structure(config):
print("};", file=config)
def gen_cat(config):
def populate_clos_mask_msr(rdt_res, common_clos_max, mask, config):
"""
Get CAT information
Populate the clos bitmask and msr index for a given RDT resource
:param rdt_res_str: it is a string representing the RDT resource
:param common_clos: Least common clos supported by all RDT resource
:param config: it is a file pointer of board information for writing to
"""
for idx in range(common_clos_max):
print("\t{", file=config)
print("\t\t.clos_mask = {0}U,".format(hex(mask)), file=config)
print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
rdt_res, idx), file=config)
print("\t},", file=config)
def gen_rdt_res(config):
"""
Get RDT resource (L2, L3) information
:param config: it is a file pointer of board information for writing to
"""
err_dic = {}
(cache_support, clos_max) = board_cfg_lib.clos_info_parser(board_cfg_lib.BOARD_INFO_FILE)
rdt_res_str =""
res_present = [0, 0]
(rdt_resources, rdt_res_clos_max, rdt_res_mask_max) = board_cfg_lib.clos_info_parser(board_cfg_lib.BOARD_INFO_FILE)
if len(rdt_res_clos_max) != 0:
common_clos_max = min(rdt_res_clos_max)
else:
common_clos_max = 0
if clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
common_clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
err_dic["board config: generate board.c failed"] = "CLOS MAX should be less than reserved adress region length of L2/L3 cache"
return err_dic
if cache_support == "False" or clos_max == 0:
print("\nstruct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];", file=config)
print("\n#ifdef CONFIG_RDT_ENABLED", file=config)
if len(rdt_resources) == 0 or common_clos_max == 0:
print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l2"), file=config)
print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l3"), file=config)
else:
print("\nstruct platform_clos_info platform_clos_array[{}] = {{".format(
for idx, rdt_res in enumerate(rdt_resources):
if rdt_res == "L2":
rdt_res_str = "l2"
print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
"MAX_PLATFORM_CLOS_NUM"), file=config)
for i_cnt in range(clos_max):
print("\t{", file=config)
print("\t\t.clos_mask = {0}U,".format(hex(0xff)), file=config)
if cache_support == "L2":
print("\t\t.msr_index = MSR_IA32_L2_MASK_BASE + {}U,".format(i_cnt), file=config)
elif cache_support == "L3":
print("\t\t.msr_index = MSR_IA32_L3_MASK_BASE + {}U,".format(i_cnt), file=config)
populate_clos_mask_msr(rdt_res, common_clos_max, int(rdt_res_mask_max[idx].strip('\''), 16), config)
print("};\n", file=config)
res_present[RDT.L2.value] = 1
elif rdt_res == "L3":
rdt_res_str = "l3"
print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
"MAX_PLATFORM_CLOS_NUM"), file=config)
populate_clos_mask_msr(rdt_res, common_clos_max, int(rdt_res_mask_max[idx].strip('\''), 16), config)
print("};\n", file=config)
res_present[RDT.L3.value] = 1
else:
err_dic['board config: generate board.c failed'] = "The input of {} was corrupted!".format(board_cfg_lib.BOARD_INFO_FILE)
return err_dic
print("\t},", file=config)
print("};\n", file=config)
if res_present[RDT.L2.value] == 0:
print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "MAX_PLATFORM_CLOS_NUM"), file=config)
elif res_present[RDT.L3.value] == 0:
print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "MAX_PLATFORM_CLOS_NUM"), file=config)
print("#endif", file=config)
print("", file=config)
return err_dic
@ -191,8 +226,8 @@ def generate_file(config):
# start to parse DMAR info
gen_dmar_structure(config)
# start to parse to get CAT info
err_dic = gen_cat(config)
# start to parse RDT resource info
err_dic = gen_rdt_res(config)
if err_dic:
return err_dic