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hv: dm: Use new power management data structures

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struct cpu_px_data		->	struct acrn_pstate_data
struct cpu_cx_data		->	struct acrn_cstate_data
enum pm_cmd_type		->	enum acrn_pm_cmd_type
struct acpi_generic_address	->	struct acrn_acpi_generic_address
cpu_cx_data			->	acrn_cstate_data
cpu_px_data			->	acrn_pstate_data

IC_PM_GET_CPU_STATE		->	ACRN_IOCTL_PM_GET_CPU_STATE

PMCMD_GET_PX_CNT		->	ACRN_PMCMD_GET_PX_CNT
PMCMD_GET_CX_CNT		->	ACRN_PMCMD_GET_CX_CNT
PMCMD_GET_PX_DATA		->	ACRN_PMCMD_GET_PX_DATA
PMCMD_GET_CX_DATA		->	ACRN_PMCMD_GET_CX_DATA

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
This commit is contained in:
Shuo A Liu
2021-07-07 21:10:05 +08:00
committed by wenlingz
parent 98c80d75b8
commit 6e0b12180c
14 changed files with 77 additions and 77 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
hypervisor/arch/x86/cpu_state_tbl.c
View File

@@ -12,7 +12,7 @@
#include <asm/board.h>
/* The table includes cpu px info of Intel A3960 SoC */
static const struct cpu_px_data px_a3960[17] = {
static const struct acrn_pstate_data px_a3960[17] = {
{0x960UL, 0UL, 0xAUL, 0xAUL, 0x1800UL, 0x1800UL}, /* P0 */
{0x8FCUL, 0UL, 0xAUL, 0xAUL, 0x1700UL, 0x1700UL}, /* P1 */
{0x898UL, 0UL, 0xAUL, 0xAUL, 0x1600UL, 0x1600UL}, /* P2 */
@@ -33,14 +33,14 @@ static const struct cpu_px_data px_a3960[17] = {
};
/* The table includes cpu cx info of Intel Broxton SoC such as A39x0, J3455, N3350 */
static const struct cpu_cx_data cx_bxt[3] = {
static const struct acrn_cstate_data cx_bxt[3] = {
{{SPACE_FFixedHW, 0x0U, 0U, 0U, 0UL}, 0x1U, 0x1U, 0x3E8UL}, /* C1 */
{{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x415UL}, 0x2U, 0x32U, 0x0AUL}, /* C2 */
{{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x419UL}, 0x3U, 0x96U, 0x0AUL} /* C3 */
};
/* The table includes cpu px info of Intel A3950 SoC */
static const struct cpu_px_data px_a3950[13] = {
static const struct acrn_pstate_data px_a3950[13] = {
{0x7D0UL, 0UL, 0xAUL, 0xAUL, 0x1400UL, 0x1400UL}, /* P0 */
{0x76CUL, 0UL, 0xAUL, 0xAUL, 0x1300UL, 0x1300UL}, /* P1 */
{0x708UL, 0UL, 0xAUL, 0xAUL, 0x1200UL, 0x1200UL}, /* P2 */
@@ -57,7 +57,7 @@ static const struct cpu_px_data px_a3950[13] = {
};
/* The table includes cpu px info of Intel J3455 SoC */
static const struct cpu_px_data px_j3455[9] = {
static const struct acrn_pstate_data px_j3455[9] = {
{0x5DDUL, 0UL, 0xAUL, 0xAUL, 0x1700UL, 0x1700UL}, /* P0 */
{0x5DCUL, 0UL, 0xAUL, 0xAUL, 0x0F00UL, 0x0F00UL}, /* P1 */
{0x578UL, 0UL, 0xAUL, 0xAUL, 0x0E00UL, 0x0E00UL}, /* P2 */
@@ -70,7 +70,7 @@ static const struct cpu_px_data px_j3455[9] = {
};
/* The table includes cpu px info of Intel N3350 SoC */
static const struct cpu_px_data px_n3350[5] = {
static const struct acrn_pstate_data px_n3350[5] = {
{0x44DUL, 0UL, 0xAUL, 0xAUL, 0x1800UL, 0x1800UL}, /* P0 */
{0x44CUL, 0UL, 0xAUL, 0xAUL, 0x0B00UL, 0x0B00UL}, /* P1 */
{0x3E8UL, 0UL, 0xAUL, 0xAUL, 0x0A00UL, 0x0A00UL}, /* P2 */
@@ -79,7 +79,7 @@ static const struct cpu_px_data px_n3350[5] = {
};
/* The table includes cpu cx info of Intel i7-8650U SoC */
static const struct cpu_px_data px_i78650[16] = {
static const struct acrn_pstate_data px_i78650[16] = {
{0x835UL, 0x0UL, 0xAUL, 0xAUL, 0x2A00UL, 0x2A00UL}, /* P0 */
{0x834UL, 0x0UL, 0xAUL, 0xAUL, 0x1500UL, 0x1500UL}, /* P1 */
{0x76CUL, 0x0UL, 0xAUL, 0xAUL, 0x1300UL, 0x1300UL}, /* P2 */
@@ -99,7 +99,7 @@ static const struct cpu_px_data px_i78650[16] = {
};
/* The table includes cpu cx info of Intel i7-8650U SoC */
static const struct cpu_cx_data cx_i78650[3] = {
static const struct acrn_cstate_data cx_i78650[3] = {
{{SPACE_FFixedHW, 0x0U, 0U, 0U, 0UL}, 0x1U, 0x1U, 0UL}, /* C1 */
{{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x1816UL}, 0x2U, 0x97U, 0UL}, /* C2 */
{{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x1819UL}, 0x3U, 0x40AU, 0UL} /* C3 */

14
hypervisor/arch/x86/guest/pm.c
View File

@@ -31,7 +31,7 @@ int32_t validate_pstate(const struct acrn_vm *vm, uint64_t perf_ctl)
ret = 0;
} else {
uint8_t px_cnt = vm->pm.px_cnt;
const struct cpu_px_data *px_data = vm->pm.px_data;
const struct acrn_pstate_data *px_data = vm->pm.px_data;
if ((px_cnt != 0U) && (px_data != NULL)) {
uint64_t px_target_val, max_px_ctl_val, min_px_ctl_val;
@@ -57,13 +57,13 @@ static void vm_setup_cpu_px(struct acrn_vm *vm)
struct cpu_state_info *pm_state_info = get_cpu_pm_state_info();
vm->pm.px_cnt = 0U;
(void)memset(vm->pm.px_data, 0U, MAX_PSTATE * sizeof(struct cpu_px_data));
(void)memset(vm->pm.px_data, 0U, MAX_PSTATE * sizeof(struct acrn_pstate_data));
if ((pm_state_info->px_cnt != 0U) && (pm_state_info->px_data != NULL)) {
ASSERT((pm_state_info->px_cnt <= MAX_PSTATE), "failed to setup cpu px");
vm->pm.px_cnt = pm_state_info->px_cnt;
px_data_size = ((uint32_t)vm->pm.px_cnt) * sizeof(struct cpu_px_data);
px_data_size = ((uint32_t)vm->pm.px_cnt) * sizeof(struct acrn_pstate_data);
(void)memcpy_s(vm->pm.px_data, px_data_size, pm_state_info->px_data, px_data_size);
}
}
@@ -74,13 +74,13 @@ static void vm_setup_cpu_cx(struct acrn_vm *vm)
struct cpu_state_info *pm_state_info = get_cpu_pm_state_info();
vm->pm.cx_cnt = 0U;
(void)memset(vm->pm.cx_data, 0U, MAX_CSTATE * sizeof(struct cpu_cx_data));
(void)memset(vm->pm.cx_data, 0U, MAX_CSTATE * sizeof(struct acrn_cstate_data));
if ((pm_state_info->cx_cnt != 0U) && (pm_state_info->cx_data != NULL)) {
ASSERT((pm_state_info->cx_cnt <= MAX_CX_ENTRY), "failed to setup cpu cx");
vm->pm.cx_cnt = pm_state_info->cx_cnt;
cx_data_size = ((uint32_t)vm->pm.cx_cnt) * sizeof(struct cpu_cx_data);
cx_data_size = ((uint32_t)vm->pm.cx_cnt) * sizeof(struct acrn_cstate_data);
/* please note pm.cx_data[0] is a empty space holder,
* pm.cx_data[1...MAX_CX_ENTRY] would be used to store cx entry datas.
@@ -94,7 +94,7 @@ static inline void init_cx_port(struct acrn_vm *vm)
uint8_t cx_idx;
for (cx_idx = 2U; cx_idx <= vm->pm.cx_cnt; cx_idx++) {
struct cpu_cx_data *cx_data = vm->pm.cx_data + cx_idx;
struct acrn_cstate_data *cx_data = vm->pm.cx_data + cx_idx;
if (cx_data->cx_reg.space_id == SPACE_SYSTEM_IO) {
uint16_t port = (uint16_t)cx_data->cx_reg.address;
@@ -245,7 +245,7 @@ static bool pm1ab_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t width,
return true;
}
static void register_gas_io_handler(struct acrn_vm *vm, uint32_t pio_idx, const struct acpi_generic_address *gas)
static void register_gas_io_handler(struct acrn_vm *vm, uint32_t pio_idx, const struct acrn_acpi_generic_address *gas)
{
uint8_t io_len[5] = {0U, 1U, 2U, 4U, 8U};
struct vm_io_range gas_io;

2
hypervisor/arch/x86/guest/vm_reset.c
View File

@@ -201,7 +201,7 @@ void register_reset_port_handler(struct acrn_vm *vm)
/* Don't support SOS and pre-launched VM re-launch for now. */
if (!is_postlaunched_vm(vm) || is_rt_vm(vm)) {
struct acpi_reset_reg *reset_reg = get_host_reset_reg_data();
struct acpi_generic_address *gas = &(reset_reg->reg);
struct acrn_acpi_generic_address *gas = &(reset_reg->reg);
struct vm_io_range io_range = {
.len = 1U

6
hypervisor/arch/x86/pm.c
View File

@@ -97,7 +97,7 @@ void restore_msrs(void)
#endif
}
static void acpi_gas_write(const struct acpi_generic_address *gas, uint32_t val)
static void acpi_gas_write(const struct acrn_acpi_generic_address *gas, uint32_t val)
{
uint16_t val16 = (uint16_t)val;
@@ -108,7 +108,7 @@ static void acpi_gas_write(const struct acpi_generic_address *gas, uint32_t val)
}
}
static uint32_t acpi_gas_read(const struct acpi_generic_address *gas)
static uint32_t acpi_gas_read(const struct acrn_acpi_generic_address *gas)
{
uint32_t ret = 0U;
@@ -239,7 +239,7 @@ void host_enter_s3(const struct pm_s_state_data *sstate_data, uint32_t pm1a_cnt_
void reset_host(void)
{
struct acpi_generic_address *gas = &(host_reset_reg.reg);
struct acrn_acpi_generic_address *gas = &(host_reset_reg.reg);
/* TODO: gracefully shut down all guests before doing host reset. */