acrn-config: refine sanity check for RDT/MBA

Refine sanity check for RDT CLOS and MBA Delay.

Tracked-On: #4943
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Reviewed-by: Vijay Dhanraj <vijay.dhanraj@intel.com>

misc/acrn-config/board_config/board_c.py

@@ -91,53 +91,37 @@ def gen_dmar_structure(config):
     print("};", file=config)
 
 
-def populate_clos_mask_msr(rdt_res, common_clos_max, config):
+def populate_clos_mask_msr(rdt_res, cat_mask_list, config):
     """
     Populate the clos bitmask and msr index for a given RDT resource
     :param rdt_res: it is a string representing the RDT resource
-    :param common_clos_max: Least common clos supported by all RDT resource
+    :param cat_mask_list: cache mask list corresponding to each CLOS
     :param config: it is a file pointer of board information for writing to
     """
-    cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
+    idx = 0
-    cat_max_mask_settings_len = len(cat_mask_list)
+    for cat_mask in cat_mask_list:
-    for idx in range(common_clos_max):
         print("\t{", file=config)
-        if idx < cat_max_mask_settings_len:
+        print("\t\t.clos_mask = {0}U,".format(cat_mask), file=config)
-            print("\t\t.clos_mask = {0}U,".format(cat_mask_list[idx]), file=config)
-        else:
-            print("\t\t.clos_mask = 0xffU,", file=config)
         print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
               rdt_res, idx), file=config)
         print("\t},", file=config)
+        idx += 1
 
-def populate_mba_delay_mask(rdt_res, common_clos_max, config):
+def populate_mba_delay_mask(rdt_res, mba_delay_list, config):
     """
     Populate the mba delay mask and msr index for memory resource
     :param rdt_res: it is a string representing the RDT resource
-    :param common_clos_max: Least common clos supported by all RDT resource
+    :param mba_delay_list: mba delay value list corresponding to each CLOS
     :param config: it is a file pointer of board information for writing to
     """
-    err_dic = {}
+    idx = 0
-    mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
+    for mba_delay_mask in mba_delay_list:
-    mba_max_delay_settings_len = len(mba_delay_list)
-    if mba_max_delay_settings_len != 0 and \
-       mba_max_delay_settings_len != common_clos_max:
-        err_dic["board config: generate board.c failed"] = "Number of \
-        MBA_DELAY values in scenaio xml should equal to MAX_PLATFORM_CLOS_NUM"
-        return err_dic
-
-    for idx in range(common_clos_max):
         print("\t{", file=config)
-        if idx < mba_max_delay_settings_len:
+        print("\t\t.mba_delay = {0}U,".format(mba_delay_mask), file=config)
-            print("\t\t.mba_delay = {0}U,".format(mba_delay_list[idx]), file=config)
-        else:
-            print("\t\t.mba_delay = 0U,", file=config)
-
         print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
               rdt_res, idx), file=config)
         print("\t},", file=config)
-
+        idx += 1
-    return err_dic
 
 
 def gen_rdt_res(config):
@@ -149,10 +133,10 @@ def gen_rdt_res(config):
     rdt_res_str =""
     res_present = [0, 0, 0]
     (rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
-    if len(rdt_res_clos_max) != 0:
+    common_clos_max = board_cfg_lib.get_common_clos_max()
-        common_clos_max = min(rdt_res_clos_max)
+
-    else:
+    cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
-        common_clos_max = 0
+    mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
 
     if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
         common_clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
@@ -169,22 +153,22 @@ def gen_rdt_res(config):
             if rdt_res == "L2":
                 rdt_res_str = "l2"
                 print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
-                      "MAX_PLATFORM_CLOS_NUM"), file=config)
+                      "MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
-                populate_clos_mask_msr(rdt_res, common_clos_max, config)
+                populate_clos_mask_msr(rdt_res, cat_mask_list, config)
                 print("};\n", file=config)
                 res_present[RDT.L2.value] = 1
             elif rdt_res == "L3":
                 rdt_res_str = "l3"
                 print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
-                      "MAX_PLATFORM_CLOS_NUM"), file=config)
+                      "MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
-                populate_clos_mask_msr(rdt_res, common_clos_max, config)
+                populate_clos_mask_msr(rdt_res, cat_mask_list, config)
                 print("};\n", file=config)
                 res_present[RDT.L3.value] = 1
             elif rdt_res == "MBA":
                 rdt_res_str = "mba"
                 print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
-                      "MAX_PLATFORM_CLOS_NUM"), file=config)
+                      "MAX_MBA_CLOS_NUM_ENTRIES"), file=config)
-                err_dic = populate_mba_delay_mask(rdt_res, common_clos_max, config)
+                err_dic = populate_mba_delay_mask(rdt_res, mba_delay_list, config)
                 print("};\n", file=config)
                 res_present[RDT.MBA.value] = 1
             else:

misc/acrn-config/board_config/misc_cfg_h.py

@@ -238,16 +238,17 @@ def generate_file(config):
     print("#define MAX_PCPU_NUM\t{}U".format(max_cpu_num), file=config)
 
     # set macro of max clos number
-    (_, clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
+    common_clos_max = board_cfg_lib.get_common_clos_max()
-    if len(clos_max) != 0:
+    max_cache_clos_entries = common_clos_max
-        common_clos_max = min(clos_max)
+    max_mba_clos_entries = common_clos_max
-    else:
+    if board_cfg_lib.is_cdp_enabled():
-        common_clos_max = 0
+        max_cache_clos_entries = 2 * common_clos_max
 
+    print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(max_cache_clos_entries), file=config)
+    print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(max_mba_clos_entries), file=config)
     print("#define MAX_PLATFORM_CLOS_NUM\t{}U".format(common_clos_max), file=config)
     gen_known_caps_pci_head(config)
 
-
     # define rootfs with macro
     for i in range(root_dev_num):
         print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)

misc/acrn-config/library/board_cfg_lib.py

@@ -482,6 +482,28 @@ def is_rdt_supported():
         return True
 
 
+def is_rdt_enabled():
+    """
+    Returns True if RDT enabled else False
+    """
+    rdt_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "RDT_ENABLED")
+    if is_rdt_supported() and rdt_enabled == 'y':
+        return True
+    return False
+
+
+def is_cdp_enabled():
+    """
+    Returns True if platform supports RDT/CDP else False
+    """
+    rdt_enabled = is_rdt_enabled()
+    cdp_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CDP_ENABLED")
+    if rdt_enabled and cdp_enabled == 'y':
+        return True
+
+    return False
+
+
 def get_rdt_select_opt():
 
     support_sel = ['n']
@@ -490,12 +512,20 @@ def get_rdt_select_opt():
     return support_sel
 
 
-def get_clos_mask_num():
+def get_common_clos_max():
-    clos_mask_num = 0
-    (rdt_resources, rdt_res_clos_max, _) = clos_info_parser(common.BOARD_INFO_FILE)
-    if len(rdt_resources) == 0 or len(rdt_res_clos_max) == 0:
-        clos_mask_num = 0
-    else:
-        clos_mask_num = min(rdt_res_clos_max)
 
-    return clos_mask_num
+    common_clos_max = 0
+    (res_info, rdt_res_clos_max, clos_max_mask_list) = clos_info_parser(common.BOARD_INFO_FILE)
+    if is_rdt_enabled() and not is_cdp_enabled():
+        common_clos_max = min(rdt_res_clos_max)
+
+    if is_cdp_enabled():
+        tmp_clos_max_list = []
+        for res, clos_max in zip(res_info, rdt_res_clos_max):
+            if res == 'MBA':
+                tmp_clos_max_list.append(clos_max)
+            else:
+                tmp_clos_max_list.append(clos_max//2)
+        common_clos_max = min(tmp_clos_max_list)
+
+    return common_clos_max

misc/acrn-config/library/hv_cfg_lib.py

@@ -169,16 +169,19 @@ def is_contiguous_bit_set(value):
 
 def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
 
-    if not board_cfg_lib.is_rdt_supported():
+    (res_info, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
+    if not board_cfg_lib.is_rdt_enabled() or ("L2" not in res_info and "L3" not in res_info):
         return
 
-    (_, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
+    if board_cfg_lib.is_cdp_enabled():
+        clos_max_set_entry = 2 * board_cfg_lib.get_common_clos_max()
+    else:
+        clos_max_set_entry = board_cfg_lib.get_common_clos_max()
 
-    clos_max = common.num2int(min(rdt_res_clos_max))
     cat_max_mask_settings_len = len(cat_mask_list)
-    if clos_max != cat_max_mask_settings_len:
+    if clos_max_set_entry != cat_max_mask_settings_len:
         key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
-        ERR_LIST[key] = "clso max: {} in board xml, should set the same number for CLOS_MASK.".format(clos_max)
+        ERR_LIST[key] = "Number of Cache mask entries should be equal to MAX_CACHE_CLOS_NUM_ENTRIES={}".format(clos_max_set_entry)
         return
 
     clos_max_mask_str = clos_max_mask_list[0].strip('"').strip("'")
@@ -197,21 +200,22 @@ def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
             ERR_LIST[key] = "CLOS_MASK {} should be contiguous bit set.".format(max_mask_str, clos_max_mask_str)
             return
 
+
 def mba_delay_check(mba_delay_list, feature, mba_str, max_mask_str):
 
-    if not board_cfg_lib.is_rdt_supported():
+    (res_info, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
+    if not board_cfg_lib.is_rdt_enabled() or "MBA" not in res_info:
         return
 
-    (_, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
+    clos_max = board_cfg_lib.get_common_clos_max()
-
-    clos_max = common.num2int(min(rdt_res_clos_max))
     mba_delay_settings_len = len(mba_delay_list)
     if clos_max != mba_delay_settings_len:
         key = 'hv,{},{},{}'.format(feature, mba_str, max_mask_str)
-        ERR_LIST[key] = "MBA_DELAY values in scenaio xml should equal to MAX_PLATFORM_CLOS_NUM.".format(clos_max)
+        ERR_LIST[key] = "Number of MBA delay entries should be equal to MAX_MBA_CLOS_NUM_ENTRIES={}".format(clos_max)
         return
 
-    mba_delay_str = clos_max_mask_list[1].strip('"').strip("'")
+    mba_idx = res_info.index("MBA")
+    mba_delay_str = clos_max_mask_list[mba_idx].strip('"').strip("'")
     mba_delay = common.num2int(mba_delay_str)
     for val_str in mba_delay_list:
         if empty_check(val_str, feature, mba_str, max_mask_str):

misc/acrn-config/library/scenario_cfg_lib.py

@@ -603,16 +603,10 @@ def check_vuart(v0_vuart, v1_vuart):
 
 def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item):
 
-    if not board_cfg_lib.is_rdt_supported():
+    if not board_cfg_lib.is_rdt_enabled():
         return
 
-    common_clos_max = 0
+    common_clos_max = board_cfg_lib.get_common_clos_max()
-    cdp_enabled = cdp_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CDP_ENABLED")
-    (rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
-    if len(rdt_resources) != 0 and len(rdt_res_clos_max) != 0:
-        common_clos_max = min(rdt_res_clos_max)
-        if cdp_enabled == 'y':
-            common_clos_max //= 2
 
     for vm_i,vcpus in cpus_per_vm.items():
         clos_per_vm_len = 0
@@ -624,7 +618,7 @@ def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item):
             ERR_LIST[key] = "'vcpu_clos' number should be equal 'pcpu_id' number for VM{}".format(vm_i)
             return
 
-        if cdp_enabled == 'y' and common_clos_max != 0:
+        if board_cfg_lib.is_cdp_enabled() and common_clos_max != 0:
             for clos_val in clos_per_vm[vm_i]:
                 if not clos_val or clos_val == None:
                     key = "vm:id={},{},{}".format(vm_i, prime_item, item)

misc/acrn-config/scenario_config/scenario_cfg_gen.py

@@ -30,6 +30,7 @@ def get_scenario_item_values(board_info, scenario_info):
     Get items which capable multi select for user
     :param board_info: it is a file what contains board information for script to read from
     """
+    hv_cfg_lib.ERR_LIST = {}
     scenario_item_values = {}
     hw_info = HwInfo(board_info)
     hv_info = HvInfo(scenario_info)
@@ -66,8 +67,6 @@ def get_scenario_item_values(board_info, scenario_info):
     scenario_item_values["hv,FEATURES,MULTIBOOT2"] = hv_cfg_lib.N_Y
     scenario_item_values["hv,FEATURES,RDT,RDT_ENABLED"] = board_cfg_lib.get_rdt_select_opt()
     scenario_item_values["hv,FEATURES,RDT,CDP_ENABLED"] = board_cfg_lib.get_rdt_select_opt()
-    scenario_item_values["hv,FEATURES,RDT,CLOS_MASK"] = board_cfg_lib.get_clos_mask_num()
-    scenario_item_values["hv,FEATURES,RDT,MBA_DELAY"] = board_cfg_lib.get_clos_mask_num()
     scenario_item_values["hv,FEATURES,SCHEDULER"] = hv_cfg_lib.SCHEDULER_TYPE
     scenario_item_values["hv,FEATURES,RELOC"] = hv_cfg_lib.N_Y
     scenario_item_values["hv,FEATURES,HYPERV_ENABLED"] = hv_cfg_lib.N_Y
@@ -87,6 +86,7 @@ def validate_scenario_setting(board_info, scenario_info):
     :param scenario_info: it is a file what user have already setting to
     :return: return a dictionary contain errors
     """
+    hv_cfg_lib.ERR_LIST = {}
     scenario_cfg_lib.ERR_LIST = {}
     common.BOARD_INFO_FILE = board_info
     common.SCENARIO_INFO_FILE = scenario_info