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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-23 05:57:33 +00:00
acrn-config: refine sanity check for RDT/MBA
Refine sanity check for RDT CLOS and MBA Delay. Tracked-On: #4943 Signed-off-by: Wei Liu <weix.w.liu@intel.com> Reviewed-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
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30750fa7d5
commit
6e2f8e2a03
@ -91,53 +91,37 @@ def gen_dmar_structure(config):
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print("};", file=config)
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def populate_clos_mask_msr(rdt_res, common_clos_max, config):
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def populate_clos_mask_msr(rdt_res, cat_mask_list, config):
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"""
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Populate the clos bitmask and msr index for a given RDT resource
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:param rdt_res: it is a string representing the RDT resource
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:param common_clos_max: Least common clos supported by all RDT resource
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:param cat_mask_list: cache mask list corresponding to each CLOS
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:param config: it is a file pointer of board information for writing to
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"""
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cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
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cat_max_mask_settings_len = len(cat_mask_list)
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for idx in range(common_clos_max):
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idx = 0
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for cat_mask in cat_mask_list:
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print("\t{", file=config)
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if idx < cat_max_mask_settings_len:
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print("\t\t.clos_mask = {0}U,".format(cat_mask_list[idx]), file=config)
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else:
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print("\t\t.clos_mask = 0xffU,", file=config)
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print("\t\t.clos_mask = {0}U,".format(cat_mask), file=config)
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print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
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rdt_res, idx), file=config)
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print("\t},", file=config)
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idx += 1
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def populate_mba_delay_mask(rdt_res, common_clos_max, config):
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def populate_mba_delay_mask(rdt_res, mba_delay_list, config):
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"""
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Populate the mba delay mask and msr index for memory resource
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:param rdt_res: it is a string representing the RDT resource
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:param common_clos_max: Least common clos supported by all RDT resource
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:param mba_delay_list: mba delay value list corresponding to each CLOS
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:param config: it is a file pointer of board information for writing to
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"""
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err_dic = {}
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mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
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mba_max_delay_settings_len = len(mba_delay_list)
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if mba_max_delay_settings_len != 0 and \
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mba_max_delay_settings_len != common_clos_max:
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err_dic["board config: generate board.c failed"] = "Number of \
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MBA_DELAY values in scenaio xml should equal to MAX_PLATFORM_CLOS_NUM"
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return err_dic
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for idx in range(common_clos_max):
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idx = 0
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for mba_delay_mask in mba_delay_list:
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print("\t{", file=config)
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if idx < mba_max_delay_settings_len:
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print("\t\t.mba_delay = {0}U,".format(mba_delay_list[idx]), file=config)
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else:
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print("\t\t.mba_delay = 0U,", file=config)
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print("\t\t.mba_delay = {0}U,".format(mba_delay_mask), file=config)
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print("\t\t.msr_index = MSR_IA32_{0}_MASK_BASE + {1},".format(
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rdt_res, idx), file=config)
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print("\t},", file=config)
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return err_dic
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idx += 1
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def gen_rdt_res(config):
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@ -149,10 +133,10 @@ def gen_rdt_res(config):
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rdt_res_str =""
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res_present = [0, 0, 0]
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(rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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if len(rdt_res_clos_max) != 0:
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common_clos_max = min(rdt_res_clos_max)
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else:
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common_clos_max = 0
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common_clos_max = board_cfg_lib.get_common_clos_max()
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cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
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mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
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if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
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common_clos_max > MSR_IA32_L3_MASK_END - MSR_IA32_L3_MASK_BASE:
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@ -169,22 +153,22 @@ def gen_rdt_res(config):
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if rdt_res == "L2":
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rdt_res_str = "l2"
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print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
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"MAX_PLATFORM_CLOS_NUM"), file=config)
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populate_clos_mask_msr(rdt_res, common_clos_max, config)
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"MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
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populate_clos_mask_msr(rdt_res, cat_mask_list, config)
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print("};\n", file=config)
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res_present[RDT.L2.value] = 1
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elif rdt_res == "L3":
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rdt_res_str = "l3"
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print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
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"MAX_PLATFORM_CLOS_NUM"), file=config)
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populate_clos_mask_msr(rdt_res, common_clos_max, config)
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"MAX_CACHE_CLOS_NUM_ENTRIES"), file=config)
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populate_clos_mask_msr(rdt_res, cat_mask_list, config)
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print("};\n", file=config)
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res_present[RDT.L3.value] = 1
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elif rdt_res == "MBA":
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rdt_res_str = "mba"
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print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
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"MAX_PLATFORM_CLOS_NUM"), file=config)
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err_dic = populate_mba_delay_mask(rdt_res, common_clos_max, config)
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"MAX_MBA_CLOS_NUM_ENTRIES"), file=config)
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err_dic = populate_mba_delay_mask(rdt_res, mba_delay_list, config)
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print("};\n", file=config)
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res_present[RDT.MBA.value] = 1
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else:
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@ -238,16 +238,17 @@ def generate_file(config):
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print("#define MAX_PCPU_NUM\t{}U".format(max_cpu_num), file=config)
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# set macro of max clos number
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(_, clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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if len(clos_max) != 0:
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common_clos_max = min(clos_max)
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else:
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common_clos_max = 0
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common_clos_max = board_cfg_lib.get_common_clos_max()
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max_cache_clos_entries = common_clos_max
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max_mba_clos_entries = common_clos_max
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if board_cfg_lib.is_cdp_enabled():
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max_cache_clos_entries = 2 * common_clos_max
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print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(max_cache_clos_entries), file=config)
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print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(max_mba_clos_entries), file=config)
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print("#define MAX_PLATFORM_CLOS_NUM\t{}U".format(common_clos_max), file=config)
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gen_known_caps_pci_head(config)
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# define rootfs with macro
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for i in range(root_dev_num):
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print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)
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@ -482,6 +482,28 @@ def is_rdt_supported():
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return True
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def is_rdt_enabled():
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"""
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Returns True if RDT enabled else False
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"""
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rdt_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "RDT_ENABLED")
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if is_rdt_supported() and rdt_enabled == 'y':
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return True
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return False
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def is_cdp_enabled():
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"""
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Returns True if platform supports RDT/CDP else False
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"""
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rdt_enabled = is_rdt_enabled()
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cdp_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CDP_ENABLED")
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if rdt_enabled and cdp_enabled == 'y':
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return True
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return False
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def get_rdt_select_opt():
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support_sel = ['n']
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@ -490,12 +512,20 @@ def get_rdt_select_opt():
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return support_sel
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def get_clos_mask_num():
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clos_mask_num = 0
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(rdt_resources, rdt_res_clos_max, _) = clos_info_parser(common.BOARD_INFO_FILE)
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if len(rdt_resources) == 0 or len(rdt_res_clos_max) == 0:
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clos_mask_num = 0
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else:
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clos_mask_num = min(rdt_res_clos_max)
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def get_common_clos_max():
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return clos_mask_num
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common_clos_max = 0
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(res_info, rdt_res_clos_max, clos_max_mask_list) = clos_info_parser(common.BOARD_INFO_FILE)
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if is_rdt_enabled() and not is_cdp_enabled():
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common_clos_max = min(rdt_res_clos_max)
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if is_cdp_enabled():
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tmp_clos_max_list = []
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for res, clos_max in zip(res_info, rdt_res_clos_max):
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if res == 'MBA':
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tmp_clos_max_list.append(clos_max)
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else:
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tmp_clos_max_list.append(clos_max//2)
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common_clos_max = min(tmp_clos_max_list)
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return common_clos_max
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@ -169,16 +169,19 @@ def is_contiguous_bit_set(value):
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def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
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if not board_cfg_lib.is_rdt_supported():
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(res_info, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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if not board_cfg_lib.is_rdt_enabled() or ("L2" not in res_info and "L3" not in res_info):
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return
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(_, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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if board_cfg_lib.is_cdp_enabled():
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clos_max_set_entry = 2 * board_cfg_lib.get_common_clos_max()
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else:
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clos_max_set_entry = board_cfg_lib.get_common_clos_max()
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clos_max = common.num2int(min(rdt_res_clos_max))
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cat_max_mask_settings_len = len(cat_mask_list)
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if clos_max != cat_max_mask_settings_len:
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if clos_max_set_entry != cat_max_mask_settings_len:
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key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
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ERR_LIST[key] = "clso max: {} in board xml, should set the same number for CLOS_MASK.".format(clos_max)
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ERR_LIST[key] = "Number of Cache mask entries should be equal to MAX_CACHE_CLOS_NUM_ENTRIES={}".format(clos_max_set_entry)
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return
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clos_max_mask_str = clos_max_mask_list[0].strip('"').strip("'")
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@ -197,21 +200,22 @@ def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
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ERR_LIST[key] = "CLOS_MASK {} should be contiguous bit set.".format(max_mask_str, clos_max_mask_str)
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return
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def mba_delay_check(mba_delay_list, feature, mba_str, max_mask_str):
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if not board_cfg_lib.is_rdt_supported():
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(res_info, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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if not board_cfg_lib.is_rdt_enabled() or "MBA" not in res_info:
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return
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(_, rdt_res_clos_max, clos_max_mask_list) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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clos_max = common.num2int(min(rdt_res_clos_max))
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clos_max = board_cfg_lib.get_common_clos_max()
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mba_delay_settings_len = len(mba_delay_list)
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if clos_max != mba_delay_settings_len:
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key = 'hv,{},{},{}'.format(feature, mba_str, max_mask_str)
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ERR_LIST[key] = "MBA_DELAY values in scenaio xml should equal to MAX_PLATFORM_CLOS_NUM.".format(clos_max)
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ERR_LIST[key] = "Number of MBA delay entries should be equal to MAX_MBA_CLOS_NUM_ENTRIES={}".format(clos_max)
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return
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mba_delay_str = clos_max_mask_list[1].strip('"').strip("'")
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mba_idx = res_info.index("MBA")
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mba_delay_str = clos_max_mask_list[mba_idx].strip('"').strip("'")
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mba_delay = common.num2int(mba_delay_str)
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for val_str in mba_delay_list:
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if empty_check(val_str, feature, mba_str, max_mask_str):
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@ -603,16 +603,10 @@ def check_vuart(v0_vuart, v1_vuart):
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def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item):
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if not board_cfg_lib.is_rdt_supported():
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if not board_cfg_lib.is_rdt_enabled():
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return
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common_clos_max = 0
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cdp_enabled = cdp_enabled = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CDP_ENABLED")
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(rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
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if len(rdt_resources) != 0 and len(rdt_res_clos_max) != 0:
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common_clos_max = min(rdt_res_clos_max)
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if cdp_enabled == 'y':
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common_clos_max //= 2
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common_clos_max = board_cfg_lib.get_common_clos_max()
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for vm_i,vcpus in cpus_per_vm.items():
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clos_per_vm_len = 0
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@ -624,7 +618,7 @@ def vcpu_clos_check(cpus_per_vm, clos_per_vm, prime_item, item):
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ERR_LIST[key] = "'vcpu_clos' number should be equal 'pcpu_id' number for VM{}".format(vm_i)
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return
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if cdp_enabled == 'y' and common_clos_max != 0:
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if board_cfg_lib.is_cdp_enabled() and common_clos_max != 0:
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for clos_val in clos_per_vm[vm_i]:
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if not clos_val or clos_val == None:
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key = "vm:id={},{},{}".format(vm_i, prime_item, item)
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@ -30,6 +30,7 @@ def get_scenario_item_values(board_info, scenario_info):
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Get items which capable multi select for user
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:param board_info: it is a file what contains board information for script to read from
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"""
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hv_cfg_lib.ERR_LIST = {}
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scenario_item_values = {}
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hw_info = HwInfo(board_info)
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hv_info = HvInfo(scenario_info)
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@ -66,8 +67,6 @@ def get_scenario_item_values(board_info, scenario_info):
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scenario_item_values["hv,FEATURES,MULTIBOOT2"] = hv_cfg_lib.N_Y
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scenario_item_values["hv,FEATURES,RDT,RDT_ENABLED"] = board_cfg_lib.get_rdt_select_opt()
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scenario_item_values["hv,FEATURES,RDT,CDP_ENABLED"] = board_cfg_lib.get_rdt_select_opt()
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scenario_item_values["hv,FEATURES,RDT,CLOS_MASK"] = board_cfg_lib.get_clos_mask_num()
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scenario_item_values["hv,FEATURES,RDT,MBA_DELAY"] = board_cfg_lib.get_clos_mask_num()
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scenario_item_values["hv,FEATURES,SCHEDULER"] = hv_cfg_lib.SCHEDULER_TYPE
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scenario_item_values["hv,FEATURES,RELOC"] = hv_cfg_lib.N_Y
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scenario_item_values["hv,FEATURES,HYPERV_ENABLED"] = hv_cfg_lib.N_Y
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@ -87,6 +86,7 @@ def validate_scenario_setting(board_info, scenario_info):
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:param scenario_info: it is a file what user have already setting to
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:return: return a dictionary contain errors
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"""
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hv_cfg_lib.ERR_LIST = {}
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scenario_cfg_lib.ERR_LIST = {}
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common.BOARD_INFO_FILE = board_info
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common.SCENARIO_INFO_FILE = scenario_info
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