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HV: deny pre-launched VM ptdev bar access from SOS

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This patch denies Service VM the access permission to device
resources owned by pre-launched VMs.
Rationale:
 * Pre-launched VMs in ACRN are independent of service VM,
   and should be immune to attacks from service VM. However,
   current implementation exposes the bar resource of passthru
   devices to service VM for some reason. This makes it possible
   for service VM to crash or attack pre-launched VMs.
 * It is same for hypervisor owned devices.

NOTE:
 * The MMIO spaces pre-allocated to VFs are still presented to
  Service VM. The SR-IOV capable devices assigned to pre-launched
  VMs doesn't have the SR-IOV capability. So the MMIO address spaces
  pre-allocated by BIOS for VFs are not decoded by hardware and
  couldn't be enabled by guest. SOS may live with seeing the address
  space or not. We will revisit later.

Tracked-On: #5615
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Tao Yuhong
2021-01-29 19:40:16 -05:00
committed by wenlingz
parent bc40e455aa
commit 6e7ce4a73f
3 changed files with 77 additions and 7 deletions
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19
hypervisor/hw/pci.c
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@@ -252,7 +252,7 @@ bool pdev_need_bar_restore(const struct pci_pdev *pdev)
for (idx = 0U; idx < pdev->nr_bars; idx++) {
bar = pci_pdev_read_cfg(pdev->bdf, pci_bar_offset(idx), 4U);
if (bar != pdev->bars[idx]) {
if (bar != pdev->bars[idx].phy_bar) {
need_restore = true;
break;
}
@@ -261,12 +261,21 @@ bool pdev_need_bar_restore(const struct pci_pdev *pdev)
return need_restore;
}
static void get_pci_bar_resource(union pci_bdf bdf, uint32_t offset, struct pci_bar_resource *res)
{
res->phy_bar = pci_pdev_read_cfg(bdf, offset, 4U);
pci_pdev_write_cfg(bdf, offset, 4U, ~0U);
res->size_mask = pci_pdev_read_cfg(bdf, offset, 4U);
pci_pdev_write_cfg(bdf, offset, 4U, res->phy_bar);
}
static inline void pdev_save_bar(struct pci_pdev *pdev)
{
uint32_t idx;
for (idx = 0U; idx < pdev->nr_bars; idx++) {
pdev->bars[idx] = pci_pdev_read_cfg(pdev->bdf, pci_bar_offset(idx), 4U);
get_pci_bar_resource(pdev->bdf, pci_bar_offset(idx), &pdev->bars[idx]);
}
}
@@ -275,7 +284,7 @@ void pdev_restore_bar(const struct pci_pdev *pdev)
uint32_t idx;
for (idx = 0U; idx < pdev->nr_bars; idx++) {
pci_pdev_write_cfg(pdev->bdf, pci_bar_offset(idx), 4U, pdev->bars[idx]);
pci_pdev_write_cfg(pdev->bdf, pci_bar_offset(idx), 4U, pdev->bars[idx].phy_bar);
}
}
@@ -788,9 +797,7 @@ struct pci_pdev *init_pdev(uint16_t pbdf, uint32_t drhd_index)
pdev->base_class = (uint8_t)pci_pdev_read_cfg(bdf, PCIR_CLASS, 1U);
pdev->sub_class = (uint8_t)pci_pdev_read_cfg(bdf, PCIR_SUBCLASS, 1U);
pdev->nr_bars = pci_pdev_get_nr_bars(hdr_type);
if (hdr_layout == PCIM_HDRTYPE_NORMAL) {
pdev_save_bar(pdev);
}
pdev_save_bar(pdev);
if ((pci_pdev_read_cfg(bdf, PCIR_STATUS, 2U) & PCIM_STATUS_CAPPRESENT) != 0U) {
pci_enumerate_cap(pdev);