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HV: hide CONFIG_SERIAL_PIO_BASE IO port for SOS

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Always trap for accessing IO port at CONFIG_SERIAL_PIO_BASE(0x3f8).

SOS will trap at IO 0x3f8 access because vuart[0]. When HW platform
has this serial IO port, and HV use it as debug shell, If vuart[0]
is not set, SOS & HV console input/output are mixed up.

So SOS should always trap at CONFIG_SERIAL_PIO_BASE

Tracked-On: #5498
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
This commit is contained in:
Tao Yuhong 2020-11-10 08:19:28 -05:00 committed by wenlingz
parent f37ef14798
commit 6f447ba626
1 changed files with 11 additions and 0 deletions
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11
hypervisor/arch/x86/guest/vm.c
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@ -420,6 +420,7 @@ int32_t create_vm(uint16_t vm_id, uint64_t pcpu_bitmap, struct acrn_vm_config *v
struct acrn_vm *vm = NULL;
int32_t status = 0;
uint16_t pcpu_id;
struct vm_io_range vu_range = {};
/* Allocate memory for virtual machine */
vm = &vm_array[vm_id];
@ -493,6 +494,16 @@ int32_t create_vm(uint16_t vm_id, uint64_t pcpu_bitmap, struct acrn_vm_config *v
enable_iommu();
/* Create virtual uart;*/
if (is_sos_vm(vm)) {
/* Legacy vuart[0] will take CONFIG_SERIAL_PIO_BASE, as SOS_COM1_BASE
* If has no legacy vuart[0], SOS will access to CONFIG_SERIAL_PIO_BASE,
* SOS need to trap for CONFIG_SERIAL_PIO_BASE too, without legacy vuart[0].
* If has legacy vuart[0], it will override this emulated IO handler, after
* init_legacy_vuarts() is called */
vu_range.base = CONFIG_SERIAL_PIO_BASE;
vu_range.len = 8U;
register_pio_emulation_handler(vm, UART_PIO_IDX0, &vu_range, NULL, NULL);
}
init_legacy_vuarts(vm, vm_config->vuart);
register_reset_port_handler(vm);