diff --git a/misc/acrn-config/board_config/ve820_c.py b/misc/acrn-config/board_config/ve820_c.py index 5e2bfd634..17349d9f3 100644 --- a/misc/acrn-config/board_config/ve820_c.py +++ b/misc/acrn-config/board_config/ve820_c.py @@ -6,12 +6,11 @@ import sys import board_cfg_lib - FOUR_GBYTE = 4 * 1024 * 1024 * 1024 LOW_MEM_TO_PCI_HOLE = 0x20000000 -def ve820_per_launch(config, hpa_size): +def ve820_per_launch(config, hpa_size, hpa2_size): """ Start to generate board.c :param config: it is a file pointer of board information for writing to @@ -22,88 +21,137 @@ def ve820_per_launch(config, hpa_size): board_name = board_cfg_lib.undline_name(board_name) - high_mem_hpa_len = 0x0 low_mem_to_pci_hole_len = '0xA0000000' low_mem_to_pci_hole = '0x20000000' pci_hole_addr = '0xe0000000' pci_hole_len = '0x20000000' start_low_hpa = 0x100000 - if (int(hpa_size, 16) <= 512 * 1024 * 1024): - low_mem_hpa_len = int(hpa_size, 16) - 1 * 1024 * 1024 - else: - low_mem_hpa_len = 511 * 1024 * 1024 - high_mem_hpa_len = int(hpa_size, 16) - 512 * 1024 * 1024 + low_mem_hpa_len = [] + high_mem_hpa_len = [] + high_mem_hpa2_len = [] + high_mem_hpa2_addr = [] # pre_launch memroy: mem_size is the ve820 length print("#include ", file=config) print("#include ", file=config) print("", file=config) - if (high_mem_hpa_len == 0): - print("#define VE820_ENTRIES_{}\t{}U".format(board_name, 5), file=config) - else: - print("#define VE820_ENTRIES_{}\t{}U".format(board_name, 6), file=config) - print("static const struct e820_entry ve820_entry[{}] = {{".format( - "VE820_ENTRIES_{}".format(board_name)), file=config) - print("\t{\t/* usable RAM under 1MB */", file=config) - print("\t\t.baseaddr = 0x0UL,", file=config) - print("\t\t.length = 0xF0000UL,\t\t/* 960KB */", file=config) - print("\t\t.type = E820_TYPE_RAM", file=config) - print("\t},", file=config) - print("", file=config) - print("\t{\t/* mptable */", file=config) - print("\t\t.baseaddr = 0xF0000UL,\t\t/* 960KB */", file=config) - print("\t\t.length = 0x10000UL,\t\t/* 16KB */", file=config) - print("\t\t.type = E820_TYPE_RESERVED", file=config) - print("\t},", file=config) - print("", file=config) + for i in range(board_cfg_lib.VM_COUNT): + if (int(hpa_size[i], 16) <= 512 * 1024 * 1024): + low_mem_hpa_len.append(int(hpa_size[i], 16) - 1 * 1024 * 1024) + high_mem_hpa_len.append(0) + else: + low_mem_hpa_len.append(511 * 1024 * 1024) + high_mem_hpa_len.append(int(hpa_size[i], 16) - 512 * 1024 * 1024) - print("\t{\t/* lowmem */", file=config) + #HPA2 is always allocated in >4G space. + high_mem_hpa2_len.append(int(hpa2_size[i], 16)) + if (high_mem_hpa_len[i] != 0) and (high_mem_hpa2_len[i] != 0): + high_mem_hpa2_addr.append(hex(FOUR_GBYTE) + high_mem_hpa_len[i]) + else: + high_mem_hpa2_addr.append(hex(FOUR_GBYTE)) - print("\t\t.baseaddr = {}UL,\t\t/* 1MB */".format( - hex(start_low_hpa)), file=config) - print("\t\t.length = {}UL,\t/* {}MB */".format( - hex(low_mem_hpa_len), low_mem_hpa_len / 1024 / 1024), file=config) + if (high_mem_hpa_len[i] != 0) and (high_mem_hpa2_len[i] != 0): + print("#define VM{}_VE820_ENTRIES_{}\t{}U".format(i, board_name, 7), file=config) + elif (high_mem_hpa_len[i] != 0) or (high_mem_hpa2_len[i] != 0): + print("#define VM{}_VE820_ENTRIES_{}\t{}U".format(i, board_name, 6), file=config) + else: + print("#define VM{}_VE820_ENTRIES_{}\t{}U".format(i, board_name, 5), file=config) - print("\t\t.type = E820_TYPE_RAM", file=config) - print("\t},", file=config) - print("", file=config) + for i in range(board_cfg_lib.VM_COUNT): + print("static const struct e820_entry vm{}_ve820_entry[{}] = {{".format( + i, "VM{}_VE820_ENTRIES_{}".format(i, board_name)), file=config) + print("\t{\t/* usable RAM under 1MB */", file=config) + print("\t\t.baseaddr = 0x0UL,", file=config) + print("\t\t.length = 0xF0000UL,\t\t/* 960KB */", file=config) + print("\t\t.type = E820_TYPE_RAM", file=config) + print("\t},", file=config) + print("", file=config) + print("\t{\t/* mptable */", file=config) + print("\t\t.baseaddr = 0xF0000UL,\t\t/* 960KB */", file=config) + print("\t\t.length = 0x10000UL,\t\t/* 64KB */", file=config) + print("\t\t.type = E820_TYPE_RESERVED", file=config) + print("\t},", file=config) + print("", file=config) - print("\t{\t/* between lowmem and PCI hole */", file=config) - print("\t\t.baseaddr = {}UL,\t/* {}MB */".format( - low_mem_to_pci_hole, int(low_mem_to_pci_hole, 16) / 1024 / 1024), file=config) - print("\t\t.length = {}UL,\t/* {}MB */".format( - low_mem_to_pci_hole_len, int(low_mem_to_pci_hole_len, 16) / 1024 / 1024), file=config) - print("\t\t.type = E820_TYPE_RESERVED", file=config) - print("\t},", file=config) - print("", file=config) - print("\t{\t/* between PCI hole and 4 GB */", file=config) - print("\t\t.baseaddr = {}UL,\t/* {}GB */".format( - hex(int(pci_hole_addr, 16)), int(pci_hole_addr, 16) / 1024 / 1024 / 1024), file=config) - print("\t\t.length = {}UL,\t/* {}MB */".format( - hex(int(pci_hole_len, 16)), int(pci_hole_len, 16) / 1024 / 1024), file=config) - print("\t\t.type = E820_TYPE_RESERVED", file=config) - print("\t},", file=config) - print("", file=config) - if (high_mem_hpa_len != 0): - print("\t{\t/* high mem after 4GB*/", file=config) - print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format( - hex(FOUR_GBYTE)), file=config) + print("\t{\t/* lowmem */", file=config) + + print("\t\t.baseaddr = {}UL,\t\t/* 1MB */".format( + hex(start_low_hpa)), file=config) print("\t\t.length = {}UL,\t/* {}MB */".format( - hex(high_mem_hpa_len), high_mem_hpa_len / 1024 / 1024), file=config) + hex(low_mem_hpa_len[i]), low_mem_hpa_len[i] / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RAM", file=config) print("\t},", file=config) print("", file=config) - print("};", file=config) - print("", file=config) + print("\t{\t/* between lowmem and PCI hole */", file=config) + print("\t\t.baseaddr = {}UL,\t/* {}MB */".format( + low_mem_to_pci_hole, int(low_mem_to_pci_hole, 16) / 1024 / 1024), file=config) + print("\t\t.length = {}UL,\t/* {}MB */".format( + low_mem_to_pci_hole_len, int(low_mem_to_pci_hole_len, 16) / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RESERVED", file=config) + print("\t},", file=config) + print("", file=config) + print("\t{\t/* between PCI hole and 4 GB */", file=config) + print("\t\t.baseaddr = {}UL,\t/* {}GB */".format( + hex(int(pci_hole_addr, 16)), int(pci_hole_addr, 16) / 1024 / 1024 / 1024), file=config) + print("\t\t.length = {}UL,\t/* {}MB */".format( + hex(int(pci_hole_len, 16)), int(pci_hole_len, 16) / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RESERVED", file=config) + print("\t},", file=config) + print("", file=config) + if (high_mem_hpa_len[i] != 0) and (high_mem_hpa2_len[i] != 0): + print("\t{\t/* high mem after 4GB*/", file=config) + print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format( + hex(FOUR_GBYTE)), file=config) + print("\t\t.length = {}UL,\t/* {}MB */".format( + hex(high_mem_hpa_len[i]), high_mem_hpa_len[i] / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RAM", file=config) + print("\t},", file=config) + print("", file=config) + print("\t{\t/* HPA2 after high mem*/", file=config) + print("\t\t.baseaddr = {}UL,\t/* {}GB */".format( + hex(high_mem_hpa2_addr[i]), int(high_mem_hpa2_addr[i], 16) / 1024 / 1024 / 1024), file=config) + print("\t\t.length = {}UL,\t/* {}MB */".format( + hex(high_mem_hpa_len[i]), high_mem_hpa_len[i] / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RAM", file=config) + print("\t},", file=config) + print("", file=config) + elif (high_mem_hpa_len[i] != 0): + print("\t{\t/* high mem after 4GB*/", file=config) + print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format( + hex(FOUR_GBYTE)), file=config) + print("\t\t.length = {}UL,\t/* {}MB */".format( + hex(high_mem_hpa_len[i]), high_mem_hpa_len[i] / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RAM", file=config) + print("\t},", file=config) + print("", file=config) + elif(high_mem_hpa2_len[i] != 0): + print("\t{\t/* HPA2 after 4GB*/", file=config) + print("\t\t.baseaddr = {}UL,\t/* 4 GB */".format( + hex(FOUR_GBYTE)), file=config) + print("\t\t.length = {}UL,\t/* {}MB */".format( + hex(high_mem_hpa2_len[i]), high_mem_hpa2_len[i] / 1024 / 1024), file=config) + print("\t\t.type = E820_TYPE_RAM", file=config) + print("\t},", file=config) + print("", file=config) + print("};", file=config) + print("", file=config) + print("/**", file=config) print(" * @pre vm != NULL", file=config) print("*/", file=config) print("void create_prelaunched_vm_e820(struct acrn_vm *vm)", file=config) print("{", file=config) - print("\tvm->e820_entry_num = VE820_ENTRIES_{};".format(board_name), file=config) - print("\tvm->e820_entries = ve820_entry;", file=config) + for i in range(board_cfg_lib.VM_COUNT): + print("\tif (vm->vm_id == {}U)".format(hex(i)), file=config) + print("\t{", file=config) + print("\t\tvm->e820_entry_num = VM{}_VE820_ENTRIES_{};".format(i, board_name), file=config) + print("\t\tvm->e820_entries = vm{}_ve820_entry;".format(i), file=config) + print("\t}", file=config) + print("", file=config) + print("}", file=config) return err_dic @@ -144,9 +192,24 @@ def generate_file(config): err_dic['board config: generate ve820.c failed'] = "Unknow type of host physical address size" return err_dic - hpa_size = hpa_size_list[0] - if pre_vm_cnt != 0 and ('0x' in hpa_size or '0X' in hpa_size): - err_dic = ve820_per_launch(config, hpa_size) + # read HPA2 mem size from scenario.xml + hpa2_size_list = board_cfg_lib.get_sub_leaf_tag( + board_cfg_lib.SCENARIO_INFO_FILE, "memory", "size_hpa2") + ret = board_cfg_lib.is_hpa_size(hpa2_size_list) + if not ret: + board_cfg_lib.print_red("Unknow type of second host physical address size", err=True) + err_dic['board config: generate ve820.c failed'] = "Unknow type of second host physical address size" + return err_dic + + # HPA size for both VMs should have valid length. + for i in range(board_cfg_lib.VM_COUNT): + if hpa_size_list[i] == '0x0' or hpa_size_list[i] == '0X0': + board_cfg_lib.print_red("HPA size should not be zero", err=True) + err_dic['board config: generate ve820.c failed'] = "HPA size should not be zero" + return err_dic + + if pre_vm_cnt != 0: + err_dic = ve820_per_launch(config, hpa_size_list, hpa2_size_list) else: non_ve820_pre_launch(config) diff --git a/misc/acrn-config/scenario_config/scenario_item.py b/misc/acrn-config/scenario_config/scenario_item.py index 9f53ca711..28e560c32 100644 --- a/misc/acrn-config/scenario_config/scenario_item.py +++ b/misc/acrn-config/scenario_config/scenario_item.py @@ -179,6 +179,8 @@ class MemInfo: """ This is Abstract of class of memory setting information """ mem_start_hpa = {} mem_size = {} + mem_start_hpa2 = {} + mem_size_hpa2 = {} def __init__(self, scenario_file): self.scenario_info = scenario_file @@ -192,6 +194,10 @@ class MemInfo: self.scenario_info, "memory", "start_hpa") self.mem_size = scenario_cfg_lib.get_leaf_tag_map( self.scenario_info, "memory", "size") + self.mem_start_hpa2 = scenario_cfg_lib.get_leaf_tag_map( + self.scenario_info, "memory", "start_hpa2") + self.mem_size_hpa2 = scenario_cfg_lib.get_leaf_tag_map( + self.scenario_info, "memory", "size_hpa2") def check_item(self): """ @@ -200,6 +206,8 @@ class MemInfo: """ scenario_cfg_lib.mem_start_hpa_check(self.mem_start_hpa, "memory", "start_hpa") scenario_cfg_lib.mem_size_check(self.mem_size, "memory", "size") + scenario_cfg_lib.mem_start_hpa_check(self.mem_start_hpa2, "memory", "start_hpa2") + scenario_cfg_lib.mem_size_check(self.mem_size_hpa2, "memory", "size_hpa2") class CfgPci: diff --git a/misc/acrn-config/scenario_config/vm_configurations_c.py b/misc/acrn-config/scenario_config/vm_configurations_c.py index 8463ada52..eaa9f1666 100644 --- a/misc/acrn-config/scenario_config/vm_configurations_c.py +++ b/misc/acrn-config/scenario_config/vm_configurations_c.py @@ -463,6 +463,8 @@ def gen_logical_partition_source(vm_info, config): print("\t\t.memory = {", file=config) print("\t\t\t.start_hpa = VM{0}_CONFIG_MEM_START_HPA,".format(i), file=config) print("\t\t\t.size = VM{0}_CONFIG_MEM_SIZE,".format(i), file=config) + print("\t\t\t.start_hpa2 = VM{0}_CONFIG_MEM_START_HPA2,".format(i), file=config) + print("\t\t\t.size_hpa2 = VM{0}_CONFIG_MEM_SIZE_HPA2,".format(i), file=config) print("\t\t},", file=config) is_need_epc(vm_info.epc_section, i, config) print("\t\t.os_config = {", file=config) @@ -600,6 +602,8 @@ def gen_hybrid_source(vm_info, config): if i == 0: print("\t\t\t.start_hpa = VM0_CONFIG_MEM_START_HPA,", file=config) print("\t\t\t.size = VM0_CONFIG_MEM_SIZE,", file=config) + print("\t\t\t.start_hpa2 = VM0_CONFIG_MEM_START_HPA2,", file=config) + print("\t\t\t.size_hpa2 = VM0_CONFIG_MEM_SIZE_HPA2,", file=config) elif i == 1: print("\t\t\t.start_hpa = 0UL,", file=config) print("\t\t\t.size = CONFIG_SOS_RAM_SIZE,", file=config) diff --git a/misc/acrn-config/scenario_config/vm_configurations_h.py b/misc/acrn-config/scenario_config/vm_configurations_h.py index d564e744f..05ce22aae 100644 --- a/misc/acrn-config/scenario_config/vm_configurations_h.py +++ b/misc/acrn-config/scenario_config/vm_configurations_h.py @@ -138,6 +138,8 @@ def logic_max_vm_num(config): print(" *\tVMX_CONFIG_VCPU_AFFINITY", file=config) print(" *\tVMX_CONFIG_MEM_START_HPA", file=config) print(" *\tVMX_CONFIG_MEM_SIZE", file=config) + print(" *\tVMX_CONFIG_MEM_START_HPA2", file=config) + print(" *\tVMX_CONFIG_MEM_SIZE_HPA2", file=config) print(" *\tVMX_CONFIG_OS_BOOTARG_ROOT", file=config) print(" *\tVMX_CONFIG_OS_BOOTARG_MAX_CPUS", file=config) print(" *\tVMX_CONFIG_OS_BOOTARG_CONSOLE", file=config) @@ -171,7 +173,11 @@ def gen_logical_partition_header(vm_info, config): print("#define VM{0}_CONFIG_MEM_START_HPA\t\t{1}UL".format( i, vm_info.mem_info.mem_start_hpa[i]), file=config) print("#define VM{0}_CONFIG_MEM_SIZE\t\t\t{1}UL".format( - i, vm_info.mem_info.mem_size[0]), file=config) + i, vm_info.mem_info.mem_size[i]), file=config) + print("#define VM{0}_CONFIG_MEM_START_HPA2\t\t{1}UL".format( + i, vm_info.mem_info.mem_start_hpa2[i]), file=config) + print("#define VM{0}_CONFIG_MEM_SIZE_HPA2\t\t\t{1}UL".format( + i, vm_info.mem_info.mem_size_hpa2[i]), file=config) print('#define VM{0}_CONFIG_OS_BOOTARG_ROOT\t\t"root={1} "'.format( i, vm_info.os_cfg.kern_root_dev[i]), file=config) print('#define VM{0}_CONFIG_OS_BOOTARG_MAXCPUS\t\t"maxcpus={1} "'.format( @@ -271,6 +277,9 @@ def gen_hybrid_header(vm_info, config): print("#define VM0_CONFIG_MEM_START_HPA\t{0}UL".format( vm_info.mem_info.mem_start_hpa[0]), file=config) print("#define VM0_CONFIG_MEM_SIZE\t\t{0}UL".format(vm_info.mem_info.mem_size[0]), file=config) + print("#define VM0_CONFIG_MEM_START_HPA2\t{0}UL".format( + vm_info.mem_info.mem_start_hpa2[0]), file=config) + print("#define VM0_CONFIG_MEM_SIZE_HPA2\t\t{0}UL".format(vm_info.mem_info.mem_size_hpa2[0]), file=config) print("", file=config) print("#define SOS_VM_BOOTARGS\t\t\tSOS_ROOTFS\t\\", file=config) print('\t\t\t\t\t"rw rootwait "\t\\', file=config) diff --git a/misc/acrn-config/xmls/config-xmls/generic/logical_partition.xml b/misc/acrn-config/xmls/config-xmls/generic/logical_partition.xml index 91a9b6c0b..fda92fb2b 100644 --- a/misc/acrn-config/xmls/config-xmls/generic/logical_partition.xml +++ b/misc/acrn-config/xmls/config-xmls/generic/logical_partition.xml @@ -19,6 +19,8 @@ 0x100000000 0x20000000 + 0x0 + 0x0 ClearLinux @@ -65,7 +67,9 @@ 0x120000000 - 0x20000000 + 0x20000000 + 0x0 + 0x0 ClearLinux