diff --git a/hypervisor/arch/x86/mmu.c b/hypervisor/arch/x86/mmu.c
index b4193ece7..985791458 100644
--- a/hypervisor/arch/x86/mmu.c
+++ b/hypervisor/arch/x86/mmu.c
@@ -313,3 +313,17 @@ void flush_address_space(void *addr, uint64_t size)
 		n += CACHE_LINE_SIZE;
 	}
 }
+
+void flush_tlb(uint64_t addr)
+{
+	invlpg(addr);
+}
+
+void flush_tlb_range(uint64_t addr, uint64_t size)
+{
+	uint64_t linear_addr;
+
+	for (linear_addr = addr; linear_addr < (addr + size); linear_addr += PAGE_SIZE) {
+		invlpg(linear_addr);
+	}
+}
diff --git a/hypervisor/arch/x86/rtcm.c b/hypervisor/arch/x86/rtcm.c
index fe5426356..8e7aa27c1 100644
--- a/hypervisor/arch/x86/rtcm.c
+++ b/hypervisor/arch/x86/rtcm.c
@@ -24,17 +24,6 @@ static struct rtct_entry_data_rtcm_binary *rtcm_binary = NULL;
 
 static struct acpi_table_header *acpi_rtct_tbl = NULL;
 
-static inline void rtcm_flush_binary_tlb(void)
-{
-	uint64_t linear_addr, start_addr = (uint64_t)hpa2hva(rtcm_binary->address);
-	uint64_t end_addr = start_addr + rtcm_binary->size;
-
-	for (linear_addr = start_addr; linear_addr < end_addr; linear_addr += PAGE_SIZE) {
-		invlpg(linear_addr);
-	}
-
-}
-
 static inline void *get_rtct_entry_base()
 {
 	return (void *)acpi_rtct_tbl + sizeof(*acpi_rtct_tbl);
@@ -133,7 +122,7 @@ bool init_software_sram(bool is_bsp)
 			ASSERT(header->magic == RTCM_MAGIC, "Incorrect RTCM magic!");
 
 			/* Flush the TLB, so that BSP/AP can execute the RTCM ABI */
-			rtcm_flush_binary_tlb();
+			flush_tlb_range((uint64_t)hpa2hva(rtcm_binary->address), rtcm_binary->size);
 			rtcm_command_func = (rtcm_abi_func)(hpa2hva(rtcm_binary->address) + header->command_offset);
 			pr_info("rtcm command function is found at %llx", rtcm_command_func);
 			rtcm_ret_code = rtcm_command_func(RTCM_CMD_INIT_SOFTWARE_SRAM, get_rtct_entry_base());
@@ -149,7 +138,7 @@ bool init_software_sram(bool is_bsp)
 			bitmap_set_lock(get_pcpu_id(), &init_sw_sram_cpus_mask);
 			wait_sync_change(&init_sw_sram_cpus_mask, ALL_CPUS_MASK);
 			/* Flush the TLB on BSP and all APs to restore the NX for Software SRAM area */
-			rtcm_flush_binary_tlb();
+			flush_tlb_range((uint64_t)hpa2hva(rtcm_binary->address), rtcm_binary->size);
 
 			if (is_bsp) {
 				is_sw_sram_initialized = true;
diff --git a/hypervisor/include/arch/x86/asm/mmu.h b/hypervisor/include/arch/x86/asm/mmu.h
index e47875958..1abc08183 100644
--- a/hypervisor/include/arch/x86/asm/mmu.h
+++ b/hypervisor/include/arch/x86/asm/mmu.h
@@ -200,6 +200,12 @@ static inline uint64_t get_pae_pdpt_addr(uint64_t cr3)
 	return (cr3 & 0xFFFFFFE0UL);
 }
 
+/*
+ * flush TLB only for the specified page with the address
+ */
+void flush_tlb(uint64_t addr);
+void flush_tlb_range(uint64_t addr, uint64_t size);
+
 /**
  * @}
  */