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hv:Rename several APIs for vpic and vioapic

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vpic:
   vpic_set_irq         --> vpic_set_irqline
   vpic_get_irq_trigger --> vpic_get_irqline_trigger_mode
vioapic:
   vioapic_set_irq_nolock --> vioapic_set_irqline_nolock
   vioapic_set_irq        --> vioapic_set_irqline_lock
   vioapic_send_intr      --> vioapic_generate_intr

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
This commit is contained in:
Mingqiang Chi 2019-01-07 11:39:15 +08:00 committed by wenlingz
parent 070a56dbc4
commit 7907fef59e
8 changed files with 37 additions and 42 deletions
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6
doc/developer-guides/hld/hv-virt-interrupt.rst
View File

@ -144,10 +144,10 @@ vLAPIC APIs.
**Supported APIs:** **Supported APIs:**
.. doxygenfunction:: vioapic_set_irq .. doxygenfunction:: vioapic_set_irqline_lock
:project: Project ACRN :project: Project ACRN
.. doxygenfunction:: vioapic_set_irq_nolock .. doxygenfunction:: vioapic_set_irqline_nolock
:project: Project ACRN :project: Project ACRN
Virtual PIC Virtual PIC
@ -165,7 +165,7 @@ If an interrupt source from vPIC need to inject an interrupt, the
following APIs need be called, which will finally make a request for following APIs need be called, which will finally make a request for
*ACRN_REQUEST_EXTINT or ACRN_REQUEST_EVENT*: *ACRN_REQUEST_EXTINT or ACRN_REQUEST_EVENT*:
.. doxygenfunction:: vpic_set_irq .. doxygenfunction:: vpic_set_irqline
:project: Project ACRN :project: Project ACRN
The following APIs are used to query the vector needed to be injected and ACK The following APIs are used to query the vector needed to be injected and ACK

30
hypervisor/arch/x86/assign.c
View File

@ -124,16 +124,12 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
/* init polarity & pin state */ /* init polarity & pin state */
if ((rte.full & IOAPIC_RTE_INTPOL) != 0UL) { if ((rte.full & IOAPIC_RTE_INTPOL) != 0UL) {
if (entry->polarity == 0U) { if (entry->polarity == 0U) {
vioapic_set_irq_nolock(vm, vioapic_set_irqline_nolock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH);
(uint32_t)virt_sid->intx_id.pin,
GSI_SET_HIGH);
} }
entry->polarity = 1U; entry->polarity = 1U;
} else { } else {
if (entry->polarity == 1U) { if (entry->polarity == 1U) {
vioapic_set_irq_nolock(vm, vioapic_set_irqline_nolock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_LOW);
(uint32_t)virt_sid->intx_id.pin,
GSI_SET_LOW);
} }
entry->polarity = 0U; entry->polarity = 0U;
} }
@ -171,7 +167,7 @@ ptirq_build_physical_rte(struct acrn_vm *vm, struct ptirq_remapping_info *entry)
/* just update trigger mode */ /* just update trigger mode */
ioapic_get_rte(phys_irq, &phys_rte); ioapic_get_rte(phys_irq, &phys_rte);
rte.full = phys_rte.full & (~IOAPIC_RTE_TRGRMOD); rte.full = phys_rte.full & (~IOAPIC_RTE_TRGRMOD);
vpic_get_irq_trigger(vm, (uint32_t)virt_sid->intx_id.pin, &trigger); vpic_get_irqline_trigger_mode(vm, (uint32_t)virt_sid->intx_id.pin, &trigger);
if (trigger == LEVEL_TRIGGER) { if (trigger == LEVEL_TRIGGER) {
rte.full |= IOAPIC_RTE_TRGRLVL; rte.full |= IOAPIC_RTE_TRGRLVL;
} }
@ -377,15 +373,15 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
if (trigger_lvl) { if (trigger_lvl) {
if (entry->polarity != 0U) { if (entry->polarity != 0U) {
vioapic_set_irq(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_LOW); vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_LOW);
} else { } else {
vioapic_set_irq(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH); vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH);
} }
} else { } else {
if (entry->polarity != 0U) { if (entry->polarity != 0U) {
vioapic_set_irq(vm, (uint32_t)virt_sid->intx_id.pin, GSI_FALLING_PULSE); vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_FALLING_PULSE);
} else { } else {
vioapic_set_irq(vm, (uint32_t)virt_sid->intx_id.pin, GSI_RAISING_PULSE); vioapic_set_irqline_lock(vm, (uint32_t)virt_sid->intx_id.pin, GSI_RAISING_PULSE);
} }
} }
@ -401,11 +397,11 @@ static void ptirq_handle_intx(struct acrn_vm *vm,
enum vpic_trigger trigger; enum vpic_trigger trigger;
/* VPIN_PIC src means we have vpic enabled */ /* VPIN_PIC src means we have vpic enabled */
vpic_get_irq_trigger(vm, (uint32_t)virt_sid->intx_id.pin, &trigger); vpic_get_irqline_trigger_mode(vm, (uint32_t)virt_sid->intx_id.pin, &trigger);
if (trigger == LEVEL_TRIGGER) { if (trigger == LEVEL_TRIGGER) {
vpic_set_irq(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH); vpic_set_irqline(vm, (uint32_t)virt_sid->intx_id.pin, GSI_SET_HIGH);
} else { } else {
vpic_set_irq(vm, (uint32_t)virt_sid->intx_id.pin, GSI_RAISING_PULSE); vpic_set_irqline(vm, (uint32_t)virt_sid->intx_id.pin, GSI_RAISING_PULSE);
} }
break; break;
} }
@ -476,13 +472,13 @@ void ptirq_intx_ack(struct acrn_vm *vm, uint8_t virt_pin,
switch (vpin_src) { switch (vpin_src) {
case PTDEV_VPIN_IOAPIC: case PTDEV_VPIN_IOAPIC:
if (entry->polarity != 0U) { if (entry->polarity != 0U) {
vioapic_set_irq(vm, virt_pin, GSI_SET_HIGH); vioapic_set_irqline_lock(vm, virt_pin, GSI_SET_HIGH);
} else { } else {
vioapic_set_irq(vm, virt_pin, GSI_SET_LOW); vioapic_set_irqline_lock(vm, virt_pin, GSI_SET_LOW);
} }
break; break;
case PTDEV_VPIN_PIC: case PTDEV_VPIN_PIC:
vpic_set_irq(vm, virt_pin, GSI_SET_LOW); vpic_set_irqline(vm, virt_pin, GSI_SET_LOW);
break; break;
default: default:
/* /*

4
hypervisor/common/hypercall.c
View File

@ -356,11 +356,11 @@ int32_t hcall_set_irqline(const struct acrn_vm *vm, uint16_t vmid,
* number #2 to PIC IRQ #0. * number #2 to PIC IRQ #0.
*/ */
irq_pic = (ops->gsi == 2U) ? 0U : ops->gsi; irq_pic = (ops->gsi == 2U) ? 0U : ops->gsi;
vpic_set_irq(target_vm, irq_pic, ops->op); vpic_set_irqline(target_vm, irq_pic, ops->op);
} }
/* handle IOAPIC irqline */ /* handle IOAPIC irqline */
vioapic_set_irq(target_vm, ops->gsi, ops->op); vioapic_set_irqline_lock(target_vm, ops->gsi, ops->op);
ret = 0; ret = 0;
} }

4
hypervisor/debug/vuart.c
View File

@ -149,8 +149,8 @@ static void vuart_toggle_intr(const struct acrn_vuart *vu)
operation = (intr_reason != IIR_NOPEND) ? GSI_SET_HIGH : GSI_SET_LOW; operation = (intr_reason != IIR_NOPEND) ? GSI_SET_HIGH : GSI_SET_LOW;
} }
vpic_set_irq(vu->vm, vuart_com_irq, operation); vpic_set_irqline(vu->vm, vuart_com_irq, operation);
vioapic_set_irq(vu->vm, vuart_com_irq, operation); vioapic_set_irqline_lock(vu->vm, vuart_com_irq, operation);
} }
static void vuart_write(struct acrn_vm *vm, uint16_t offset_arg, static void vuart_write(struct acrn_vm *vm, uint16_t offset_arg,

18
hypervisor/dm/vioapic.c
View File

@ -45,7 +45,7 @@
* @pre pin < vioapic_pincount(vm) * @pre pin < vioapic_pincount(vm)
*/ */
static void static void
vioapic_send_intr(struct acrn_vioapic *vioapic, uint32_t pin) vioapic_generate_intr(struct acrn_vioapic *vioapic, uint32_t pin)
{ {
uint32_t vector, dest, delmode; uint32_t vector, dest, delmode;
union ioapic_rte rte; union ioapic_rte rte;
@ -92,14 +92,14 @@ vioapic_set_pinstate(struct acrn_vioapic *vioapic, uint16_t pin, uint32_t level)
&vioapic->pin_state[pin >> 6U]); &vioapic->pin_state[pin >> 6U]);
if (((rte.full & IOAPIC_RTE_INTPOL) != 0UL) if (((rte.full & IOAPIC_RTE_INTPOL) != 0UL)
&& old_lvl != level) { && old_lvl != level) {
vioapic_send_intr(vioapic, pin); vioapic_generate_intr(vioapic, pin);
} }
} else { } else {
/* set pin_state and deliver intrrupt according to polarity */ /* set pin_state and deliver intrrupt according to polarity */
bitmap_set_nolock(pin & 0x3FU, &vioapic->pin_state[pin >> 6U]); bitmap_set_nolock(pin & 0x3FU, &vioapic->pin_state[pin >> 6U]);
if (((rte.full & IOAPIC_RTE_INTPOL) == 0UL) if (((rte.full & IOAPIC_RTE_INTPOL) == 0UL)
&& old_lvl != level) { && old_lvl != level) {
vioapic_send_intr(vioapic, pin); vioapic_generate_intr(vioapic, pin);
} }
} }
} }
@ -108,7 +108,7 @@ vioapic_set_pinstate(struct acrn_vioapic *vioapic, uint16_t pin, uint32_t level)
/** /**
* @brief Set vIOAPIC IRQ line status. * @brief Set vIOAPIC IRQ line status.
* *
* Similar with vioapic_set_irq(),but would not make sure * Similar with vioapic_set_irqline_lock(),but would not make sure
* operation be done with ioapic lock. * operation be done with ioapic lock.
* *
* @param[in] vm Pointer to target VM * @param[in] vm Pointer to target VM
@ -120,7 +120,7 @@ vioapic_set_pinstate(struct acrn_vioapic *vioapic, uint16_t pin, uint32_t level)
* @return None * @return None
*/ */
void void
vioapic_set_irq_nolock(struct acrn_vm *vm, uint32_t irq, uint32_t operation) vioapic_set_irqline_nolock(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
{ {
struct acrn_vioapic *vioapic; struct acrn_vioapic *vioapic;
uint16_t pin = (uint16_t)irq; uint16_t pin = (uint16_t)irq;
@ -163,12 +163,12 @@ vioapic_set_irq_nolock(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
* @return None * @return None
*/ */
void void
vioapic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation) vioapic_set_irqline_lock(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
{ {
struct acrn_vioapic *vioapic = vm_ioapic(vm); struct acrn_vioapic *vioapic = vm_ioapic(vm);
spinlock_obtain(&(vioapic->mtx)); spinlock_obtain(&(vioapic->mtx));
vioapic_set_irq_nolock(vm, irq, operation); vioapic_set_irqline_nolock(vm, irq, operation);
spinlock_release(&(vioapic->mtx)); spinlock_release(&(vioapic->mtx));
} }
@ -391,7 +391,7 @@ vioapic_indirect_write(struct acrn_vioapic *vioapic, uint32_t addr,
&& vioapic_need_intr(vioapic, (uint16_t)pin)) { && vioapic_need_intr(vioapic, (uint16_t)pin)) {
dev_dbg(ACRN_DBG_IOAPIC, dev_dbg(ACRN_DBG_IOAPIC,
"ioapic pin%hhu: asserted at rtbl write", pin); "ioapic pin%hhu: asserted at rtbl write", pin);
vioapic_send_intr(vioapic, pin); vioapic_generate_intr(vioapic, pin);
} }
/* remap for ptdev */ /* remap for ptdev */
@ -486,7 +486,7 @@ vioapic_process_eoi(struct acrn_vm *vm, uint32_t vector)
if (vioapic_need_intr(vioapic, (uint16_t)pin)) { if (vioapic_need_intr(vioapic, (uint16_t)pin)) {
dev_dbg(ACRN_DBG_IOAPIC, dev_dbg(ACRN_DBG_IOAPIC,
"ioapic pin%hhu: asserted at eoi", pin); "ioapic pin%hhu: asserted at eoi", pin);
vioapic_send_intr(vioapic, pin); vioapic_generate_intr(vioapic, pin);
} }
} }
spinlock_release(&(vioapic->mtx)); spinlock_release(&(vioapic->mtx));

6
hypervisor/dm/vpic.c
View File

@ -205,7 +205,7 @@ static void vpic_notify_intr(struct acrn_vpic *vpic)
* to vioapic pin0 (irq2) * to vioapic pin0 (irq2)
* From MPSpec session 5.1 * From MPSpec session 5.1
*/ */
vioapic_set_irq(vpic->vm, 0U, GSI_RAISING_PULSE); vioapic_set_irqline_lock(vpic->vm, 0U, GSI_RAISING_PULSE);
} }
} else { } else {
dev_dbg(ACRN_DBG_PIC, dev_dbg(ACRN_DBG_PIC,
@ -455,7 +455,7 @@ static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin,
* *
* @return None * @return None
*/ */
void vpic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation) void vpic_set_irqline(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
{ {
struct acrn_vpic *vpic; struct acrn_vpic *vpic;
struct i8259_reg_state *i8259; struct i8259_reg_state *i8259;
@ -505,7 +505,7 @@ vpic_pincount(void)
* @pre vm->vpic != NULL * @pre vm->vpic != NULL
* @pre irq < NR_VPIC_PINS_TOTAL * @pre irq < NR_VPIC_PINS_TOTAL
*/ */
void vpic_get_irq_trigger(struct acrn_vm *vm, uint32_t irq, void vpic_get_irqline_trigger_mode(struct acrn_vm *vm, uint32_t irq,
enum vpic_trigger *trigger) enum vpic_trigger *trigger)
{ {
struct acrn_vpic *vpic; struct acrn_vpic *vpic;

6
hypervisor/include/arch/x86/guest/vioapic.h
View File

@ -82,12 +82,12 @@ void vioapic_reset(struct acrn_vioapic *vioapic);
* *
* @return None * @return None
*/ */
void vioapic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation); void vioapic_set_irqline_lock(struct acrn_vm *vm, uint32_t irq, uint32_t operation);
/** /**
* @brief Set vIOAPIC IRQ line status. * @brief Set vIOAPIC IRQ line status.
* *
* Similar with vioapic_set_irq(),but would not make sure * Similar with vioapic_set_irqline_lock(),but would not make sure
* operation be done with ioapic lock. * operation be done with ioapic lock.
* *
* @param[in] vm Pointer to target VM * @param[in] vm Pointer to target VM
@ -98,7 +98,7 @@ void vioapic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation);
* @pre irq < vioapic_pincount(vm) * @pre irq < vioapic_pincount(vm)
* @return None * @return None
*/ */
void vioapic_set_irq_nolock(struct acrn_vm *vm, uint32_t irq, uint32_t operation); void vioapic_set_irqline_nolock(struct acrn_vm *vm, uint32_t irq, uint32_t operation);
void vioapic_update_tmr(struct acrn_vcpu *vcpu); void vioapic_update_tmr(struct acrn_vcpu *vcpu);
uint32_t vioapic_pincount(const struct acrn_vm *vm); uint32_t vioapic_pincount(const struct acrn_vm *vm);

5
hypervisor/include/arch/x86/guest/vpic.h
View File

@ -150,7 +150,7 @@ void vpic_init(struct acrn_vm *vm);
* *
* @return None * @return None
*/ */
void vpic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation); void vpic_set_irqline(struct acrn_vm *vm, uint32_t irq, uint32_t operation);
/** /**
* @brief Get pending virtual interrupts for vPIC. * @brief Get pending virtual interrupts for vPIC.
@ -174,8 +174,7 @@ void vpic_pending_intr(struct acrn_vm *vm, uint32_t *vecptr);
* @pre vm != NULL * @pre vm != NULL
*/ */
void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector); void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector);
void vpic_get_irq_trigger(struct acrn_vm *vm, uint32_t irq, void vpic_get_irqline_trigger_mode(struct acrn_vm *vm, uint32_t irq, enum vpic_trigger *trigger);
enum vpic_trigger *trigger);
uint32_t vpic_pincount(void); uint32_t vpic_pincount(void);
/** /**