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internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085 Signed-off-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Eddie Dong
lijinxia
360
hypervisor/boot/dmar_parse.c
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360
hypervisor/boot/dmar_parse.c
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "bsp_cfg.h"
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#ifdef CONFIG_DMAR_PARSE_ENABLED
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#include <hypervisor.h>
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#include <hv_lib.h>
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#include <acrn_common.h>
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#include <hv_arch.h>
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#include <hv_debug.h>
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#include "vtd.h"
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#include "acpi.h"
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#define PCI_CONFIG_ADDRESS 0xcf8
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#define PCI_CONFIG_DATA 0xcfc
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#define PCI_CONFIG_ACCESS_EN 0x80000000
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enum acpi_dmar_type {
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ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
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ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
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ACPI_DMAR_TYPE_ROOT_ATS = 2,
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ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
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ACPI_DMAR_TYPE_NAMESPACE = 4,
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ACPI_DMAR_TYPE_RESERVED = 5
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};
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/* Values for entry_type in ACPI_DMAR_DEVICE_SCOPE - device types */
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enum acpi_dmar_scope_type {
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ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
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ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
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ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
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ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
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ACPI_DMAR_SCOPE_TYPE_HPET = 4,
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ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
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ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
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};
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struct acpi_table_dmar {
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/* Common ACPI table header */
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struct acpi_table_header header;
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/* Host address Width */
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uint8_t width;
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uint8_t flags;
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uint8_t reserved[10];
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};
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/* DMAR subtable header */
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struct acpi_dmar_header {
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uint16_t type;
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uint16_t length;
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};
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struct acpi_dmar_hardware_unit {
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struct acpi_dmar_header header;
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uint8_t flags;
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uint8_t reserved;
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uint16_t segment;
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/* register base address */
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uint64_t address;
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};
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struct find_iter_args {
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int i;
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struct acpi_dmar_hardware_unit *res;
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};
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struct acpi_dmar_pci_path {
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uint8_t device;
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uint8_t function;
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};
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struct acpi_dmar_device_scope {
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uint8_t entry_type;
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uint8_t length;
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uint16_t reserved;
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uint8_t enumeration_id;
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uint8_t bus;
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};
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typedef int (*dmar_iter_t)(struct acpi_dmar_header*, void*);
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static struct dmar_info dmar_info_parsed;
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static int dmar_unit_cnt;
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static void
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dmar_iterate_tbl(dmar_iter_t iter, void *arg)
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{
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struct acpi_table_dmar *dmar_tbl;
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struct acpi_dmar_header *dmar_header;
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char *ptr, *ptr_end;
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dmar_tbl = (struct acpi_table_dmar *)get_dmar_table();
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ASSERT(dmar_tbl != NULL, "");
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ptr = (char *)dmar_tbl + sizeof(*dmar_tbl);
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ptr_end = (char *)dmar_tbl + dmar_tbl->header.length;
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for (;;) {
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if (ptr >= ptr_end)
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break;
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dmar_header = (struct acpi_dmar_header *)ptr;
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if (dmar_header->length <= 0) {
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pr_err("drhd: corrupted DMAR table, l %d\n",
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dmar_header->length);
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break;
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}
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ptr += dmar_header->length;
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if (!iter(dmar_header, arg))
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break;
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}
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}
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static int
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drhd_count_iter(struct acpi_dmar_header *dmar_header, __unused void *arg)
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{
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if (dmar_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT)
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dmar_unit_cnt++;
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return 1;
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}
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static int
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drhd_find_iter(struct acpi_dmar_header *dmar_header, void *arg)
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{
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struct find_iter_args *args;
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if (dmar_header->type != ACPI_DMAR_TYPE_HARDWARE_UNIT)
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return 1;
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args = arg;
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if (args->i == 0) {
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args->res = (struct acpi_dmar_hardware_unit *)dmar_header;
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return 0;
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}
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args->i--;
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return 1;
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}
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static struct acpi_dmar_hardware_unit *
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drhd_find_by_index(int idx)
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{
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struct find_iter_args args;
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args.i = idx;
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args.res = NULL;
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dmar_iterate_tbl(drhd_find_iter, &args);
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return args.res;
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}
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static uint8_t get_secondary_bus(uint8_t bus, uint8_t dev, uint8_t func)
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{
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uint32_t data;
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io_write_long(PCI_CONFIG_ACCESS_EN | (bus << 16) | (dev << 11) |
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(func << 8) | 0x18, PCI_CONFIG_ADDRESS);
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data = io_read_long(PCI_CONFIG_DATA);
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return (data >> 8) & 0xff;
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}
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static uint16_t
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dmar_path_bdf(int path_len, int busno,
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const struct acpi_dmar_pci_path *path)
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{
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int i;
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uint8_t bus;
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uint8_t dev;
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uint8_t fun;
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bus = (uint8_t)busno;
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dev = path->device;
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fun = path->function;
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for (i = 1; i < path_len; i++) {
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bus = get_secondary_bus(bus, dev, fun);
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dev = path[i].device;
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fun = path[i].function;
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}
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return (bus << 8 | DEVFUN(dev, fun));
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}
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static int
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handle_dmar_devscope(struct dmar_dev_scope *dev_scope,
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void *addr, int remaining)
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{
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int path_len;
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uint16_t bdf;
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struct acpi_dmar_pci_path *path;
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struct acpi_dmar_device_scope *apci_devscope = addr;
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if (remaining < (int)sizeof(struct acpi_dmar_device_scope))
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return -1;
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if (remaining < apci_devscope->length)
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return -1;
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path = (struct acpi_dmar_pci_path *)(apci_devscope + 1);
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path_len = (apci_devscope->length -
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sizeof(struct acpi_dmar_device_scope)) /
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sizeof(struct acpi_dmar_pci_path);
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bdf = dmar_path_bdf(path_len, apci_devscope->bus, path);
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dev_scope->bus = (bdf >> 8) & 0xff;
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dev_scope->devfun = bdf & 0xff;
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return apci_devscope->length;
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}
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static uint32_t
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get_drhd_dev_scope_cnt(struct acpi_dmar_hardware_unit *drhd)
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{
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struct acpi_dmar_device_scope *scope;
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char *start;
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char *end;
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uint32_t count = 0;
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start = (char *)drhd + sizeof(struct acpi_dmar_hardware_unit);
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end = (char *)drhd + drhd->header.length;
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while (start < end) {
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scope = (struct acpi_dmar_device_scope *)start;
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if (scope->entry_type == ACPI_DMAR_SCOPE_TYPE_ENDPOINT ||
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scope->entry_type == ACPI_DMAR_SCOPE_TYPE_BRIDGE ||
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scope->entry_type == ACPI_DMAR_SCOPE_TYPE_NAMESPACE)
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count++;
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start += scope->length;
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}
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return count;
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}
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static int
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handle_one_drhd(struct acpi_dmar_hardware_unit *acpi_drhd,
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struct dmar_drhd *drhd)
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{
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struct dmar_dev_scope *dev_scope;
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struct acpi_dmar_device_scope *ads;
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int remaining, consumed;
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char *cp;
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uint32_t dev_count;
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drhd->segment = acpi_drhd->segment;
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drhd->flags = acpi_drhd->flags;
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drhd->reg_base_addr = acpi_drhd->address;
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if (drhd->flags & DRHD_FLAG_INCLUDE_PCI_ALL_MASK) {
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drhd->dev_cnt = 0;
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drhd->devices = NULL;
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return 0;
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}
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dev_count = get_drhd_dev_scope_cnt(acpi_drhd);
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drhd->dev_cnt = dev_count;
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if (dev_count) {
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drhd->devices =
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calloc(dev_count, sizeof(struct dmar_dev_scope));
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ASSERT(drhd->devices, "");
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} else {
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drhd->devices = NULL;
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return 0;
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}
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remaining = acpi_drhd->header.length -
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sizeof(struct acpi_dmar_hardware_unit);
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dev_scope = drhd->devices;
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while (remaining > 0) {
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cp = (char *)acpi_drhd + acpi_drhd->header.length - remaining;
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consumed = handle_dmar_devscope(dev_scope, cp, remaining);
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if (((drhd->segment << 16) |
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(dev_scope->bus << 8) |
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dev_scope->devfun) == CONFIG_GPU_SBDF) {
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ASSERT(dev_count == 1, "no dedicated iommu for gpu");
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drhd->ignore = true;
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}
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if (consumed <= 0)
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break;
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remaining -= consumed;
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/* skip IOAPIC & HPET */
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ads = (struct acpi_dmar_device_scope *)cp;
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if (ads->entry_type != ACPI_DMAR_SCOPE_TYPE_IOAPIC &&
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ads->entry_type != ACPI_DMAR_SCOPE_TYPE_HPET)
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dev_scope++;
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else
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pr_dbg("drhd: skip dev_scope type %d",
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ads->entry_type);
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}
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return 0;
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}
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int parse_dmar_table(void)
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{
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int i;
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struct acpi_dmar_hardware_unit *acpi_drhd;
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/* find out how many dmar units */
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dmar_iterate_tbl(drhd_count_iter, NULL);
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/* alloc memory for dmar uint */
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dmar_info_parsed.drhd_units =
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calloc(dmar_unit_cnt, sizeof(struct dmar_drhd));
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ASSERT(dmar_info_parsed.drhd_units, "");
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dmar_info_parsed.drhd_count = dmar_unit_cnt;
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for (i = 0; i < dmar_unit_cnt; i++) {
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acpi_drhd = drhd_find_by_index(i);
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if (acpi_drhd == NULL)
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continue;
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if (acpi_drhd->flags & DRHD_FLAG_INCLUDE_PCI_ALL_MASK)
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ASSERT((i+1) == dmar_unit_cnt,
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"drhd with flags set should be the last one");
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handle_one_drhd(acpi_drhd, &dmar_info_parsed.drhd_units[i]);
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}
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return 0;
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}
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struct dmar_info *get_dmar_info(void)
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{
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parse_dmar_table();
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return &dmar_info_parsed;
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}
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#endif
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