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dm: add RTCT SSRAM entries from vSSRAM buffers

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add all L2 & L3 cache buffers to RTCT entries:
   - SSRAM WAY_MASK entry, cache ways bitmask indicates
     the cache ways used by specific cache buffer.

   -  SSRAM region entry, support format V2 only.

Tracked-On: #7010
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
This commit is contained in:
Yonghua Huang
2022-01-06 16:57:34 +03:00
committed by acrnsi-robot
parent 216c295cb4
commit 7aae9807b3
2 changed files with 93 additions and 2 deletions
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6
devicemodel/include/vssram.h
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@@ -33,6 +33,12 @@ struct rtct_entry_data_compatibility {
uint32_t rtcd_ver_Minor;
} __packed;
struct rtct_entry_data_ssram_waymask {
uint32_t cache_level;
uint32_t cache_id;
uint32_t waymask;
} __packed;
struct rtct_entry_data_ssram_v2 {
uint32_t cache_level;
uint32_t cache_id;