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hv: Introduce check_vm_vlapic_state API

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This patch introduces check_vm_vlapic_state API instead of is_lapic_pt_enabled
to check if all the vCPUs of a VM are using x2APIC mode and LAPIC
pass-through is enabled on all of them.

When the VM is in VM_VLAPIC_TRANSITION or VM_VLAPIC_DISABLED state,
following conditions apply.
1) For pass-thru MSI interrupts, interrupt source is not programmed.
2) For DM emulated device MSI interrupts, interrupt is not delivered.
3) For IPIs, it will work only if the sender and destination are both in x2APIC mode.

Tracked-On: #3253
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Sainath Grandhi
2019-06-10 22:22:32 -07:00
committed by wenlingz
parent f3627d4839
commit 7d44cd5c28
9 changed files with 98 additions and 35 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/common/hv_main.c
View File

@@ -27,7 +27,7 @@ void vcpu_thread(struct sched_object *obj)
init_vmcs(vcpu);
}
if (!is_lapic_pt_enabled(vcpu->vm)) {
if (!is_lapic_pt_enabled(vcpu)) {
/* handle pending softirq when irq enable*/
do_softirq();
CPU_IRQ_DISABLE();
@@ -64,7 +64,7 @@ void vcpu_thread(struct sched_object *obj)
profiling_pre_vmexit_handler(vcpu);
if (!is_lapic_pt_enabled(vcpu->vm)) {
if (!is_lapic_pt_enabled(vcpu)) {
CPU_IRQ_ENABLE();
}
/* Dispatch handler */

24
hypervisor/common/hypercall.c
View File

@@ -484,9 +484,27 @@ int32_t hcall_inject_msi(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
pr_err("%s: Unable copy param to vm\n", __func__);
} else {
/* For target cpu with lapic pt, send ipi instead of injection via vlapic */
if (is_lapic_pt_enabled(target_vm)) {
inject_msi_lapic_pt(target_vm, &msi);
ret = 0;
if (is_lapic_pt_configured(target_vm)) {
enum vm_vlapic_state vlapic_state = check_vm_vlapic_state(vm);
if (vlapic_state == VM_VLAPIC_X2APIC) {
/*
* All the vCPUs of VM are in x2APIC mode and LAPIC is PT
* Inject the vMSI as an IPI directly to VM
*/
inject_msi_lapic_pt(target_vm, &msi);
ret = 0;
} else if (vlapic_state == VM_VLAPIC_XAPIC) {
/*
* All the vCPUs of VM are in xAPIC and use vLAPIC
* Inject using vLAPIC
*/
ret = vlapic_intr_msi(target_vm, msi.msi_addr, msi.msi_data);
} else {
/*
* For cases VM_VLAPIC_DISABLED and VM_VLAPIC_TRANSITION
* Silently drop interrupt
*/
}
} else {
ret = vlapic_intr_msi(target_vm, msi.msi_addr, msi.msi_data);
}