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hv: pSRAM: add pSRAM initialization codes
1.We added a function init_psram to initialize pSRAM as well as some definitions. Both AP and BSP shall call init_psram to make sure pSRAM is initialized, which is required by PTCM. BSP: To parse PTCT and find the entry of PTCM command function, then call PTCM ABI. AP: Wait until BSP has done the parsing work, then call the PTCM ABI. Synchronization of AP and BSP is ensured, both inside and outside PTCM. 2. Added calls of init_psram in init_pcpu_post to initialize pSRAM in HV booting phase Tracked-On: #5330 Signed-off-by: Qian Wang <qian1.wang@intel.com>
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@ -212,6 +212,7 @@ ifeq ($(CONFIG_MULTIBOOT2),y)
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BOOT_C_SRCS += boot/multiboot2.c
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endif
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BOOT_C_SRCS += boot/reloc.c
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BOOT_C_SRCS += arch/x86/ptcm.c
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# hardware management component
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HW_S_SRCS += arch/x86/idt.S
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@ -28,6 +28,7 @@
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#include <uart16550.h>
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#include <vpci.h>
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#include <ivshmem.h>
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#include <ptcm.h>
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#define CPU_UP_TIMEOUT 100U /* millisecond */
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#define CPU_DOWN_TIMEOUT 100U /* millisecond */
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@ -266,11 +267,15 @@ void init_pcpu_post(uint16_t pcpu_id)
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}
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ASSERT(get_pcpu_id() == BSP_CPU_ID, "");
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init_psram(true);
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} else {
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pr_dbg("Core %hu is up", pcpu_id);
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pr_warn("Skipping VM configuration check which should be done before building HV binary.");
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init_psram(false);
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/* Initialize secondary processor interrupts. */
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init_interrupt(pcpu_id);
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89
hypervisor/arch/x86/ptcm.c
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89
hypervisor/arch/x86/ptcm.c
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@ -0,0 +1,89 @@
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/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <bits.h>
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#include <logmsg.h>
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#include <misc_cfg.h>
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#include <mmu.h>
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#include <ptcm.h>
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/* is_psram_initialized is used to tell whether psram is successfully initialized for all cores */
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volatile bool is_psram_initialized = false;
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#ifdef CONFIG_PSRAM_ENABLED
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static struct ptct_entry_data_ptcm_binary *ptcm_binary = NULL;
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static struct acpi_table_header *acpi_ptct_tbl = NULL;
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static inline void *get_ptct_address()
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{
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return (void *)acpi_ptct_tbl + sizeof(*acpi_ptct_tbl);
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}
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static void parse_ptct(void)
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{
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/* TODO: Will add in the next patch */
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}
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/*
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* Function to initialize pSRAM. Both BSP and APs shall call this function to
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* make sure pSRAM is initialized, which is required by PTCM.
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* BSP:
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* To parse PTCT and find the entry of PTCM command function
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* AP:
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* Wait until BSP has done the parsing work, then call the PTCM ABI.
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*
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* Synchronization of AP and BSP is ensured, both inside and outside PTCM.
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* BSP shall be the last to finish the call.
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*/
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void init_psram(bool is_bsp)
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{
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int32_t ptcm_ret_code;
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struct ptcm_header *header;
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ptcm_abi_func ptcm_command_func = NULL;
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static uint64_t init_psram_cpus_mask = (1UL << BSP_CPU_ID);
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/*
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* When we shut down an RTVM, its pCPUs will be re-initialized
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* we must ensure init_psram() will only be executed at the first time when a pcpu is booted
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* That's why we add "!is_psram_initialized" as an condition.
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*/
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if (!is_psram_initialized && (acpi_ptct_tbl != NULL)) {
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if (is_bsp) {
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parse_ptct();
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bitmap_clear_lock(get_pcpu_id(), &init_psram_cpus_mask);
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}
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wait_sync_change(&init_psram_cpus_mask, 0UL);
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pr_info("PTCT is parsed by BSP");
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header = hpa2hva(ptcm_binary->address);
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pr_info("ptcm_bin_address:%llx, ptcm magic:%x, ptcm version:%x",
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ptcm_binary->address, header->magic, header->version);
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ASSERT(header->magic == PTCM_MAGIC, "Incorrect PTCM magic!");
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ptcm_command_func = (ptcm_abi_func)(hpa2hva(ptcm_binary->address) + header->command_offset);
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pr_info("ptcm command function is found at %llx",ptcm_command_func);
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ptcm_ret_code = ptcm_command_func(PTCM_CMD_INIT_PSRAM, get_ptct_address());
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pr_info("ptcm initialization return %d", ptcm_ret_code);
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/* return 0 for success, -1 for failure */
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ASSERT(ptcm_ret_code == 0);
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bitmap_set_lock(get_pcpu_id(), &init_psram_cpus_mask);
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wait_sync_change(&init_psram_cpus_mask, ALL_CPUS_MASK);
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if (is_bsp) {
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is_psram_initialized = true;
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pr_info("BSP pSRAM has been initialized\n");
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}
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}
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}
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#else
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void init_psram(__unused bool is_bsp)
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{
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}
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#endif
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31
hypervisor/include/arch/x86/ptcm.h
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31
hypervisor/include/arch/x86/ptcm.h
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@ -0,0 +1,31 @@
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/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PTCM_H
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#define PTCM_H
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#include <ptct.h>
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#define MSABI __attribute__((ms_abi))
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typedef int32_t MSABI (*ptcm_abi_func)(uint32_t command, void *command_struct);
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#define PTCM_CMD_INIT_PSRAM (int32_t)1U
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#define PTCM_CMD_CPUID (int32_t)2U
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#define PTCM_CMD_RDMSR (int32_t)3U
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#define PTCM_CMD_WRMSR (int32_t)4U
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#define PTCM_MAGIC 0x5054434dU
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struct ptcm_header {
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uint32_t magic;
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uint32_t version;
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uint64_t command_offset;
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} __packed;
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extern volatile bool is_psram_initialized;
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void init_psram(bool is_bsp);
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#endif /* PTCM_H */
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20
hypervisor/include/arch/x86/ptct.h
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20
hypervisor/include/arch/x86/ptct.h
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/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PTCT_H
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#define PTCT_H
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#include <acpi.h>
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struct ptct_entry_data_ptcm_binary
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{
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uint64_t address;
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uint32_t size;
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} __packed;
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#endif /* PTCT_H */
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