github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-13 04:50:07 +00:00
Code Issues Projects Releases Wiki Activity

HV: treewide: fix violations of coding guideline C-TY-27 & C-TY-28

Browse Source 
The coding guideline rules C-TY-27 and C-TY-28, combined, requires that
assignment and arithmetic operations shall be applied only on operands of the
same kind. This patch either adds explicit type casts or adjust types of
variables to align the types of operands.

The only semantic change introduced by this patch is the promotion of the
second argument of set_vmcs_bit() and clear_vmcs_bit() to
uint64_t (formerly uint32_t). This avoids clear_vmcs_bit() to accidentally
clears the upper 32 bits of the requested VMCS field.

Other than that, this patch has no semantic change. Specifically this patch
is not meant to fix buggy narrowing operations, only to make these
operations explicit.

Tracked-On: #6776
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Junjie Mao
2021-10-29 16:02:10 +08:00
committed by wenlingz
parent 2c86795fa8
commit 83a938bae6
27 changed files with 51 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/dm/vpci/pci_pt.c
View File

@@ -378,7 +378,7 @@ static void init_bars(struct pci_vdev *vdev, bool is_sriov_bar)
pci_pdev_write_cfg(pbdf, offset, 4U, lo);
vbar->mask = size32 & mask;
vbar->bar_type.bits &= (~mask);
vbar->bar_type.bits &= (uint32_t)(~mask);
vbar->size = (uint64_t)size32 & mask;
if (is_prelaunched_vm(vpci2vm(vdev->vpci))) {

2
hypervisor/dm/vpci/vdev.c
View File

@@ -140,7 +140,7 @@ static void pci_vdev_update_vbar_base(struct pci_vdev *vdev, uint32_t idx)
* Currently, we don't support the reprogram of PIO bar of pass-thru devs,
* If guest tries to reprogram, hv will inject #GP to guest.
*/
if ((vdev->pdev != NULL) && ((lo & PCI_BASE_ADDRESS_IO_MASK) != vbar->base_hpa)) {
if ((vdev->pdev != NULL) && ((lo & PCI_BASE_ADDRESS_IO_MASK) != (uint32_t)vbar->base_hpa)) {
struct acrn_vcpu *vcpu = vcpu_from_pid(vpci2vm(vdev->vpci), get_pcpu_id());
if (vcpu != NULL) {
vcpu_inject_gp(vcpu, 0U);

4
hypervisor/dm/vpci/vmcs9900.c
View File

@@ -49,7 +49,7 @@ static int32_t vmcs9900_mmio_handler(struct io_request *io_req, void *data)
struct pci_vbar *vbar = &vdev->vbars[MCS9900_MMIO_BAR];
uint16_t offset;
offset = mmio->address - vbar->base_gpa;
offset = (uint16_t)(mmio->address - vbar->base_gpa);
if (mmio->direction == ACRN_IOREQ_DIR_READ) {
mmio->value = vuart_read_reg(vu, offset);
@@ -165,7 +165,7 @@ const struct pci_vdev_ops vmcs9900_ops = {
int32_t create_vmcs9900_vdev(struct acrn_vm *vm, struct acrn_vdev *dev)
{
uint32_t i;
uint16_t i;
struct acrn_vm_config *vm_config = get_vm_config(vm->vm_id);
struct acrn_vm_pci_dev_config *dev_config = NULL;
int32_t ret = -EINVAL;

2
hypervisor/dm/vpci/vmsix.c
View File

@@ -137,7 +137,7 @@ int32_t add_vmsix_capability(struct pci_vdev *vdev, uint32_t entry_num, uint8_t
(void)memset(&msixcap, 0U, sizeof(struct msixcap));
msixcap.capid = PCIY_MSIX;
msixcap.msgctrl = entry_num - 1U;
msixcap.msgctrl = (uint16_t)entry_num - 1U;
/* - MSI-X table start at offset 0 */
msixcap.table_info = bar_num;

16
hypervisor/dm/vpci/vpci.c
View File

@@ -119,15 +119,15 @@ static bool vpci_pio_cfgdata_read(struct acrn_vcpu *vcpu, uint16_t addr, size_t
struct acrn_vpci *vpci = &vm->vpci;
union pci_cfg_addr_reg cfg_addr;
union pci_bdf bdf;
uint16_t offset = addr - PCI_CONFIG_DATA;
uint32_t val = ~0U;
struct acrn_pio_request *pio_req = &vcpu->req.reqs.pio_request;
cfg_addr.value = atomic_readandclear32(&vpci->addr.value);
if (cfg_addr.bits.enable != 0U) {
if (pci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) {
uint32_t offset = (uint16_t)cfg_addr.bits.reg_num + (addr - PCI_CONFIG_DATA);
if (pci_is_valid_access(offset, bytes)) {
bdf.value = cfg_addr.bits.bdf;
ret = vpci_read_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, &val);
ret = vpci_read_cfg(vpci, bdf, offset, bytes, &val);
}
}
@@ -152,13 +152,13 @@ static bool vpci_pio_cfgdata_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t
struct acrn_vpci *vpci = &vm->vpci;
union pci_cfg_addr_reg cfg_addr;
union pci_bdf bdf;
uint16_t offset = addr - PCI_CONFIG_DATA;
cfg_addr.value = atomic_readandclear32(&vpci->addr.value);
if (cfg_addr.bits.enable != 0U) {
if (pci_is_valid_access(cfg_addr.bits.reg_num + offset, bytes)) {
uint32_t offset = (uint16_t)cfg_addr.bits.reg_num + (addr - PCI_CONFIG_DATA);
if (pci_is_valid_access(offset, bytes)) {
bdf.value = cfg_addr.bits.bdf;
ret = vpci_write_cfg(vpci, bdf, cfg_addr.bits.reg_num + offset, bytes, val);
ret = vpci_write_cfg(vpci, bdf, offset, bytes, val);
}
}
@@ -672,7 +672,7 @@ struct pci_vdev *vpci_init_vdev(struct acrn_vpci *vpci, struct acrn_vm_pci_dev_c
*/
static int32_t vpci_init_vdevs(struct acrn_vm *vm)
{
uint32_t idx;
uint16_t idx;
struct acrn_vpci *vpci = &(vm->vpci);
const struct acrn_vm_config *vm_config = get_vm_config(vpci2vm(vpci)->vm_id);
int32_t ret = 0;
@@ -843,7 +843,7 @@ uint32_t vpci_add_capability(struct pci_vdev *vdev, uint8_t *capdata, uint8_t ca
#define CAP_START_OFFSET PCI_CFG_HEADER_LENGTH
uint8_t capoff, reallen;
uint16_t sts;
uint32_t sts;
uint32_t ret = 0U;
reallen = roundup(caplen, 4U); /* dword aligned */

4
hypervisor/dm/vpci/vroot_port.c
View File

@@ -121,7 +121,7 @@ int32_t create_vrp(struct acrn_vm *vm, struct acrn_vdev *dev)
struct pci_vdev *vdev;
struct vrp_config *vrp_config;
int i;
uint16_t i;
vrp_config = (struct vrp_config*)dev->args;
@@ -134,7 +134,7 @@ int32_t create_vrp(struct acrn_vm *vm, struct acrn_vdev *dev)
for (i = 0U; i < vm_config->pci_dev_num; i++) {
dev_config = &vm_config->pci_devs[i];
if (dev_config->vrp_sec_bus == vrp_config->secondary_bus) {
dev_config->vbdf.value = dev->slot;
dev_config->vbdf.value = (uint16_t)dev->slot;
dev_config->pbdf.value = vrp_config->phy_bdf;
dev_config->vrp_max_payload = vrp_config->max_payload;
dev_config->vdev_ops = &vrp_ops;

2
hypervisor/dm/vpci/vsriov.c
View File

@@ -114,7 +114,7 @@ static void create_vf(struct pci_vdev *pf_vdev, union pci_bdf vf_bdf, uint16_t v
pr_err("PF %x:%x.%x can't creat VF, unset VF_ENABLE",
pf_vdev->bdf.bits.b, pf_vdev->bdf.bits.d, pf_vdev->bdf.bits.f);
} else {
uint16_t bar_idx;
uint32_t bar_idx;
struct pci_vbar *vf_vbar;
/* VF bars information from its PF SRIOV capability, no need to access physical device */