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HV: instr_emul: keep using enum vm_reg_name for registers

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The vm_reg_name is a good example of a collection of discrete values. This patch
replaces signed integers with this type whenever applicable to avoid dependence
on the underlying value of such enumeration constants.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Junjie Mao 2018-07-04 00:41:11 +08:00 committed by lijinxia
parent edc793145a
commit 845437646f
3 changed files with 74 additions and 69 deletions
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7
hypervisor/arch/x86/guest/instr_emul.c
View File

@ -671,8 +671,9 @@ emulate_movs(struct vcpu *vcpu, __unused uint64_t gpa, struct vie *vie,
{ {
uint64_t dstaddr, srcaddr; uint64_t dstaddr, srcaddr;
uint64_t rcx, rdi, rsi, rflags; uint64_t rcx, rdi, rsi, rflags;
int error, fault, seg, repeat; int error, fault, repeat;
uint8_t opsize; uint8_t opsize;
enum vm_reg_name seg;
opsize = (vie->op.op_byte == 0xA4U) ? 1U : vie->opsize; opsize = (vie->op.op_byte == 0xA4U) ? 1U : vie->opsize;
error = 0; error = 0;
@ -700,7 +701,7 @@ emulate_movs(struct vcpu *vcpu, __unused uint64_t gpa, struct vie *vie,
} }
} }
seg = (vie->segment_override != 0U) ? vie->segment_register : VM_REG_GUEST_DS; seg = (vie->segment_override != 0U) ? (vie->segment_register) : VM_REG_GUEST_DS;
error = get_gla(vcpu, vie, paging, opsize, vie->addrsize, error = get_gla(vcpu, vie, paging, opsize, vie->addrsize,
PROT_READ, seg, VM_REG_GUEST_RSI, &srcaddr, &fault); PROT_READ, seg, VM_REG_GUEST_RSI, &srcaddr, &fault);
if ((error != 0) || (fault != 0)) if ((error != 0) || (fault != 0))
@ -1735,7 +1736,7 @@ vie_advance(struct vie *vie)
} }
static bool static bool
segment_override(uint8_t x, int *seg) segment_override(uint8_t x, enum vm_reg_name *seg)
{ {
switch (x) { switch (x) {

30
hypervisor/arch/x86/guest/instr_emul_wrapper.c
View File

@ -10,18 +10,19 @@
#include "instr_emul.h" #include "instr_emul.h"
static int static int
encode_vmcs_seg_desc(int seg, uint32_t *base, uint32_t *lim, uint32_t *acc); encode_vmcs_seg_desc(enum vm_reg_name seg,
uint32_t *base, uint32_t *lim, uint32_t *acc);
static int32_t static int32_t
get_vmcs_field(int ident); get_vmcs_field(enum vm_reg_name ident);
static bool static bool
is_segment_register(int reg); is_segment_register(enum vm_reg_name reg);
static bool static bool
is_descriptor_table(int reg); is_descriptor_table(enum vm_reg_name reg);
int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval) int vm_get_register(struct vcpu *vcpu, enum vm_reg_name reg, uint64_t *retval)
{ {
struct run_context *cur_context; struct run_context *cur_context;
@ -46,7 +47,7 @@ int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval)
return 0; return 0;
} }
int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val) int vm_set_register(struct vcpu *vcpu, enum vm_reg_name reg, uint64_t val)
{ {
struct run_context *cur_context; struct run_context *cur_context;
@ -71,7 +72,8 @@ int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val)
return 0; return 0;
} }
int vm_set_seg_desc(struct vcpu *vcpu, int seg, struct seg_desc *ret_desc) int vm_set_seg_desc(struct vcpu *vcpu, enum vm_reg_name seg,
struct seg_desc *ret_desc)
{ {
int error; int error;
uint32_t base, limit, access; uint32_t base, limit, access;
@ -93,7 +95,8 @@ int vm_set_seg_desc(struct vcpu *vcpu, int seg, struct seg_desc *ret_desc)
return 0; return 0;
} }
int vm_get_seg_desc(struct vcpu *vcpu, int seg, struct seg_desc *desc) int vm_get_seg_desc(struct vcpu *vcpu, enum vm_reg_name seg,
struct seg_desc *desc)
{ {
int error; int error;
uint32_t base, limit, access; uint32_t base, limit, access;
@ -115,7 +118,7 @@ int vm_get_seg_desc(struct vcpu *vcpu, int seg, struct seg_desc *desc)
return 0; return 0;
} }
static bool is_descriptor_table(int reg) static bool is_descriptor_table(enum vm_reg_name reg)
{ {
switch (reg) { switch (reg) {
case VM_REG_GUEST_IDTR: case VM_REG_GUEST_IDTR:
@ -126,7 +129,7 @@ static bool is_descriptor_table(int reg)
} }
} }
static bool is_segment_register(int reg) static bool is_segment_register(enum vm_reg_name reg)
{ {
switch (reg) { switch (reg) {
case VM_REG_GUEST_ES: case VM_REG_GUEST_ES:
@ -143,8 +146,9 @@ static bool is_segment_register(int reg)
} }
} }
static int encode_vmcs_seg_desc(int seg, uint32_t *base, uint32_t *lim, static int
uint32_t *acc) encode_vmcs_seg_desc(enum vm_reg_name seg,
uint32_t *base, uint32_t *lim, uint32_t *acc)
{ {
switch (seg) { switch (seg) {
case VM_REG_GUEST_ES: case VM_REG_GUEST_ES:
@ -204,7 +208,7 @@ static int encode_vmcs_seg_desc(int seg, uint32_t *base, uint32_t *lim,
return 0; return 0;
} }
static int32_t get_vmcs_field(int ident) static int32_t get_vmcs_field(enum vm_reg_name ident)
{ {
switch (ident) { switch (ident) {
case VM_REG_GUEST_CR0: case VM_REG_GUEST_CR0:

106
hypervisor/arch/x86/guest/instr_emul_wrapper.h
View File

@ -31,6 +31,52 @@
#define INSTR_EMUL_WRAPPER_H #define INSTR_EMUL_WRAPPER_H
#include <cpu.h> #include <cpu.h>
/*
* Identifiers for architecturally defined registers.
*/
enum vm_reg_name {
VM_REG_GUEST_RAX,
VM_REG_GUEST_RBX,
VM_REG_GUEST_RCX,
VM_REG_GUEST_RDX,
VM_REG_GUEST_RBP,
VM_REG_GUEST_RSI,
VM_REG_GUEST_R8,
VM_REG_GUEST_R9,
VM_REG_GUEST_R10,
VM_REG_GUEST_R11,
VM_REG_GUEST_R12,
VM_REG_GUEST_R13,
VM_REG_GUEST_R14,
VM_REG_GUEST_R15,
VM_REG_GUEST_RDI,
VM_REG_GUEST_CR0,
VM_REG_GUEST_CR3,
VM_REG_GUEST_CR4,
VM_REG_GUEST_DR7,
VM_REG_GUEST_RSP,
VM_REG_GUEST_RIP,
VM_REG_GUEST_RFLAGS,
VM_REG_GUEST_ES,
VM_REG_GUEST_CS,
VM_REG_GUEST_SS,
VM_REG_GUEST_DS,
VM_REG_GUEST_FS,
VM_REG_GUEST_GS,
VM_REG_GUEST_LDTR,
VM_REG_GUEST_TR,
VM_REG_GUEST_IDTR,
VM_REG_GUEST_GDTR,
VM_REG_GUEST_EFER,
VM_REG_GUEST_CR2,
VM_REG_GUEST_PDPTE0,
VM_REG_GUEST_PDPTE1,
VM_REG_GUEST_PDPTE2,
VM_REG_GUEST_PDPTE3,
VM_REG_GUEST_INTR_SHADOW,
VM_REG_LAST
};
struct vie_op { struct vie_op {
uint8_t op_byte; /* actual opcode byte */ uint8_t op_byte; /* actual opcode byte */
uint8_t op_type; /* type of operation (e.g. MOV) */ uint8_t op_type; /* type of operation (e.g. MOV) */
@ -67,9 +113,9 @@ struct vie {
uint8_t imm_bytes; uint8_t imm_bytes;
uint8_t scale; uint8_t scale;
int base_register; /* VM_REG_GUEST_xyz */ enum vm_reg_name base_register; /* VM_REG_GUEST_xyz */
int index_register; /* VM_REG_GUEST_xyz */ enum vm_reg_name index_register; /* VM_REG_GUEST_xyz */
int segment_register; /* VM_REG_GUEST_xyz */ enum vm_reg_name segment_register; /* VM_REG_GUEST_xyz */
int64_t displacement; /* optional addr displacement */ int64_t displacement; /* optional addr displacement */
int64_t immediate; /* optional immediate operand */ int64_t immediate; /* optional immediate operand */
@ -139,56 +185,10 @@ struct emul_cnx {
struct vcpu *vcpu; struct vcpu *vcpu;
}; };
/* int vm_get_register(struct vcpu *vcpu, enum vm_reg_name reg, uint64_t *retval);
* Identifiers for architecturally defined registers. int vm_set_register(struct vcpu *vcpu, enum vm_reg_name reg, uint64_t val);
*/ int vm_get_seg_desc(struct vcpu *vcpu, enum vm_reg_name reg,
enum vm_reg_name {
VM_REG_GUEST_RAX,
VM_REG_GUEST_RBX,
VM_REG_GUEST_RCX,
VM_REG_GUEST_RDX,
VM_REG_GUEST_RBP,
VM_REG_GUEST_RSI,
VM_REG_GUEST_R8,
VM_REG_GUEST_R9,
VM_REG_GUEST_R10,
VM_REG_GUEST_R11,
VM_REG_GUEST_R12,
VM_REG_GUEST_R13,
VM_REG_GUEST_R14,
VM_REG_GUEST_R15,
VM_REG_GUEST_RDI,
VM_REG_GUEST_CR0,
VM_REG_GUEST_CR3,
VM_REG_GUEST_CR4,
VM_REG_GUEST_DR7,
VM_REG_GUEST_RSP,
VM_REG_GUEST_RIP,
VM_REG_GUEST_RFLAGS,
VM_REG_GUEST_ES,
VM_REG_GUEST_CS,
VM_REG_GUEST_SS,
VM_REG_GUEST_DS,
VM_REG_GUEST_FS,
VM_REG_GUEST_GS,
VM_REG_GUEST_LDTR,
VM_REG_GUEST_TR,
VM_REG_GUEST_IDTR,
VM_REG_GUEST_GDTR,
VM_REG_GUEST_EFER,
VM_REG_GUEST_CR2,
VM_REG_GUEST_PDPTE0,
VM_REG_GUEST_PDPTE1,
VM_REG_GUEST_PDPTE2,
VM_REG_GUEST_PDPTE3,
VM_REG_GUEST_INTR_SHADOW,
VM_REG_LAST
};
int vm_get_register(struct vcpu *vcpu, int reg, uint64_t *retval);
int vm_set_register(struct vcpu *vcpu, int reg, uint64_t val);
int vm_get_seg_desc(struct vcpu *vcpu, int reg,
struct seg_desc *ret_desc); struct seg_desc *ret_desc);
int vm_set_seg_desc(struct vcpu *vcpu, int reg, int vm_set_seg_desc(struct vcpu *vcpu, enum vm_reg_name reg,
struct seg_desc *desc); struct seg_desc *desc);
#endif #endif