HV: RDT: add CDP support in ACRN

CDP is an extension of CAT. It enables isolation and separate prioritization of
code and data fetches to the L2 or L3 cache in a software configurable manner,
depending on hardware support.

This commit adds a Kconfig switch "CDP_ENABLED" which depends on "RDT_ENABLED".
CDP will be enabled if the capability available and "CDP_ENABLED" is selected.

Tracked-On: #4604
Signed-off-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Vijay Dhanraj <vijay.dhanraj@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yan, Like
2020-04-09 10:49:00 +08:00
committed by wenlingz
parent 277c668b04
commit 869ccb7ba8
4 changed files with 41 additions and 12 deletions

View File

@@ -30,6 +30,8 @@ struct rdt_info {
uint32_t bitmask; /* A bitmask where each set bit indicates the corresponding cache way
may be used by other entities in the platform (e.g. GPU) */
uint16_t cbm_len; /* Length of Cache mask in bits */
bool is_cdp_enabled; /* True if support CDP */
uint32_t msr_qos_cfg; /* MSR addr to IA32_L3/L2_QOS_CFG */
} cache;
struct rdt_membw {
uint16_t mba_max; /* Max MBA delay throttling value supported */
@@ -42,7 +44,7 @@ struct rdt_info {
struct platform_clos_info *platform_clos_array; /* user configured mask and MSR info for each CLOS*/
};
void init_rdt_cap_info(void);
void init_rdt_info(void);
void setup_clos(uint16_t pcpu_id);
uint64_t clos2pqr_msr(uint16_t clos);
bool is_platform_rdt_capable(void);