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hv: virq: refine vcpu_inject_hi_exception()

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The MISRA-C Standards suggests use brackets to clarify the precedence
order of logical conjunctions.

Tracked-On: #861
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
This commit is contained in:
yuhong.tao@intel.com 2018-12-19 23:46:21 +08:00 committed by wenlingz
parent 3bfa695565
commit 88a7d8b2cc
1 changed files with 1 additions and 1 deletions
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2
hypervisor/arch/x86/virq.c
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@ -253,7 +253,7 @@ static int32_t vcpu_inject_hi_exception(struct acrn_vcpu *vcpu)
uint32_t vector = vcpu->arch.exception_info.exception;
int32_t ret;
if (vector == IDT_MC || vector == IDT_BP || vector == IDT_DB) {
if ((vector == IDT_MC) || (vector == IDT_BP) || (vector == IDT_DB)) {
vcpu_inject_exception(vcpu, vector);
ret = 1;
} else {