dm:gvt:update gvt bars before other pci devices write bar address

The current design has the following problem:
uos kernel may update gvt bars' regions,
but ACRN-DM doesn't know this update.
ACRN-DM only know out-of-date gvt bar regions,
For simplicity, mark these bar regions as OOD bar regions.
uos kernel may allocate OOD bar regions for
other pci devices, which will result in ACRN-DM
bar regions inconsistency with uos kernel.

The new design is the following:
When other pci device update bar regions
(1) ACRN-DM updates gvt bars' regions
provided by a system file.
(2) ACRN-DM updates this pci device bar regions

v5 -> v6:
	* add more comments

v4 -> v5:
	* remove & for callback func assignment

v3 -> v4:
	* compare gpu bar address to avoid unnecessary
	* unregistered/registered operation

v2 -> v3:
	* call unregister_bar and register_bar when update gvt bars
	* update gvt reserved regions when update gvt bars

Tracked-On: projectacrn#4005

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
This commit is contained in:
Junming Liu
2019-11-12 21:19:39 +00:00
committed by wenlingz
parent f27d47542a
commit 89908bf510
4 changed files with 106 additions and 19 deletions

View File

@@ -277,6 +277,7 @@ int pci_emul_alloc_bar(struct pci_vdev *pdi, int idx,
int pci_emul_alloc_pbar(struct pci_vdev *pdi, int idx,
uint64_t hostbase, enum pcibar_type type,
uint64_t size);
void pci_emul_free_bar(struct pci_vdev *pdi, int idx);
void pci_emul_free_bars(struct pci_vdev *pdi);
int pci_emul_add_capability(struct pci_vdev *dev, u_char *capdata,
int caplen);

View File

@@ -70,6 +70,8 @@ struct vmctx {
/* if gvt-g is enabled for current VM */
bool gvt_enabled;
void (*update_gvt_bar)(struct vmctx *ctx);
};
#define PROT_RW (PROT_READ | PROT_WRITE)