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vcpu: add ext context support for world switch
move most of fields from run_context into ext_context for world switch. these fields do not need doing runtime save/restore during vm exit/entry. v3: - update cr0/cr4 registers switch method v2: - use struct name ext_context instead of saved_context - updated according to previous v2 patch Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@@ -34,27 +34,15 @@
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#define CPU_CONTEXT_OFFSET_R15 120U
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#define CPU_CONTEXT_OFFSET_CR0 128U
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#define CPU_CONTEXT_OFFSET_CR2 136U
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#define CPU_CONTEXT_OFFSET_CR3 144U
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#define CPU_CONTEXT_OFFSET_CR4 152U
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#define CPU_CONTEXT_OFFSET_RIP 160U
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#define CPU_CONTEXT_OFFSET_RFLAGS 168U
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#define CPU_CONTEXT_OFFSET_TSC_OFFSET 184U
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#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 192U
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#define CPU_CONTEXT_OFFSET_IA32_STAR 200U
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#define CPU_CONTEXT_OFFSET_IA32_LSTAR 208U
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#define CPU_CONTEXT_OFFSET_IA32_FMASK 216U
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#define CPU_CONTEXT_OFFSET_IA32_KERNEL_GS_BASE 224U
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#define CPU_CONTEXT_OFFSET_CS 280U
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#define CPU_CONTEXT_OFFSET_SS 312U
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#define CPU_CONTEXT_OFFSET_DS 344U
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#define CPU_CONTEXT_OFFSET_ES 376U
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#define CPU_CONTEXT_OFFSET_FS 408U
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#define CPU_CONTEXT_OFFSET_GS 440U
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#define CPU_CONTEXT_OFFSET_TR 472U
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#define CPU_CONTEXT_OFFSET_IDTR 504U
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#define CPU_CONTEXT_OFFSET_LDTR 536U
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#define CPU_CONTEXT_OFFSET_GDTR 568U
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#define CPU_CONTEXT_OFFSET_FXSTORE_GUEST_AREA 608U
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#define CPU_CONTEXT_OFFSET_CR4 144U
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#define CPU_CONTEXT_OFFSET_RIP 152U
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#define CPU_CONTEXT_OFFSET_RFLAGS 160U
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#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 168U
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#define CPU_CONTEXT_OFFSET_IA32_EFER 176U
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#define CPU_CONTEXT_OFFSET_EXTCTX_START 184U
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#define CPU_CONTEXT_OFFSET_CR3 184U
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#define CPU_CONTEXT_OFFSET_IDTR 192U
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#define CPU_CONTEXT_OFFSET_LDTR 216U
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/*sizes of various registers within the VCPU data structure */
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#define VMX_CPU_S_FXSAVE_GUEST_AREA_SIZE GUEST_STATE_AREA_SIZE
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@@ -120,24 +108,41 @@ struct run_context {
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/** The guests CR registers 0, 2, 3 and 4. */
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uint64_t cr0;
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/* VMX_MACHINE_T_GUEST_CR2_OFFSET =
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* offsetof(struct run_context, cr2) = 128
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/* CPU_CONTEXT_OFFSET_CR2 =
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* offsetof(struct run_context, cr2) = 136
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*/
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uint64_t cr2;
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uint64_t cr3;
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uint64_t cr4;
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uint64_t rip;
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uint64_t rflags;
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uint64_t dr7;
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uint64_t tsc_offset;
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/* MSRs */
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/* VMX_MACHINE_T_GUEST_SPEC_CTRL_OFFSET =
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* offsetof(struct run_context, ia32_spec_ctrl) = 192
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/* CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL =
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* offsetof(struct run_context, ia32_spec_ctrl) = 168
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*/
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uint64_t ia32_spec_ctrl;
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uint64_t ia32_efer;
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};
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/*
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* extended context does not save/restore during vm exity/entry, it's mainly
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* used in trusty world switch
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*/
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struct ext_context {
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uint64_t cr3;
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/* segment registers */
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struct segment_sel idtr;
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struct segment_sel ldtr;
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struct segment_sel gdtr;
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struct segment_sel tr;
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struct segment_sel cs;
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struct segment_sel ss;
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struct segment_sel ds;
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struct segment_sel es;
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struct segment_sel fs;
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struct segment_sel gs;
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uint64_t ia32_star;
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uint64_t ia32_lstar;
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uint64_t ia32_fmask;
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@@ -145,26 +150,18 @@ struct run_context {
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uint64_t ia32_pat;
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uint64_t vmx_ia32_pat;
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uint64_t ia32_efer;
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uint32_t ia32_sysenter_cs;
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uint64_t ia32_sysenter_esp;
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uint64_t ia32_sysenter_eip;
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uint64_t ia32_debugctl;
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uint64_t dr7;
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uint64_t tsc_offset;
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uint64_t vmx_cr0;
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uint64_t vmx_cr4;
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/* segment registers */
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struct segment_sel cs;
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struct segment_sel ss;
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struct segment_sel ds;
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struct segment_sel es;
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struct segment_sel fs;
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struct segment_sel gs;
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struct segment_sel tr;
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struct segment_sel idtr;
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struct segment_sel ldtr;
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struct segment_sel gdtr;
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uint64_t vmx_cr0_read_shadow;
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uint64_t vmx_cr4_read_shadow;
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/* The 512 bytes area to save the FPU/MMX/SSE states for the guest */
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uint64_t
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@@ -182,9 +179,14 @@ struct event_injection_info {
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uint32_t error_code;
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};
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struct cpu_context {
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struct run_context run_ctx;
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struct ext_context ext_ctx;
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};
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struct vcpu_arch {
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int cur_context;
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struct run_context contexts[NR_WORLD];
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struct cpu_context contexts[NR_WORLD];
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/* A pointer to the VMCS for this CPU. */
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void *vmcs;
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