github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-07-03 18:46:33 +00:00
Code Issues Projects Releases Wiki Activity

HV: refine vmptable for partition mode

Browse Source 
Merge separated mptable.c of BOARDs to unified vmptable.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2019-01-07 09:55:45 +08:00 committed by wenlingz
parent f574d5926b
commit 8ad48ff488
9 changed files with 285 additions and 708 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/Makefile
View File

@ -202,7 +202,7 @@ C_SRCS += dm/vioapic.c
C_SRCS += dm/vpci/core.c
C_SRCS += dm/vpci/vpci.c
ifeq ($(CONFIG_PARTITION_MODE),y)
C_SRCS += partition/$(CONFIG_BOARD)/mptable.c
C_SRCS += dm/vmptable.c
C_SRCS += partition/$(CONFIG_BOARD)/vm_description.c
C_SRCS += dm/vpci/partition_mode.c
C_SRCS += dm/vpci/hostbridge.c

129
hypervisor/dm/vmptable.c Normal file
View File

@ -0,0 +1,129 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <hypervisor.h>
static struct mptable_info mptable_template = {
.mpfp = {
.signature = MPFP_SIG,
.pap = MPTABLE_BASE + sizeof(struct mpfps),
.length = 1U,
.spec_rev = MP_SPECREV,
},
.mpch = {
.signature = MPCH_SIG,
.spec_rev = MP_SPECREV,
.oem_id = MPCH_OEMID,
.product_id = MPCH_PRODID,
.apic_address = LAPIC_BASE,
},
.bus_entry_array = {
{
.type = MPCT_ENTRY_BUS,
.bus_id = 0U,
.bus_type = MPE_BUSNAME_PCI,
},
{
.type = MPCT_ENTRY_BUS,
.bus_id = 1U,
.bus_type = MPE_BUSNAME_ISA,
},
},
.int_entry_array = {
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_EXTINT,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 0U,
},
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_NMI,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 1U,
},
},
};
static struct proc_entry proc_entry_template = {
.type = MPCT_ENTRY_PROCESSOR,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES
};
static uint8_t mpt_compute_checksum(void *base, size_t len)
{
uint8_t *bytes;
uint8_t sum;
size_t length = len;
for (bytes = base, sum = 0U; length > 0U; length--) {
sum += *bytes;
bytes++;
}
return (256U - sum);
}
int32_t mptable_build(struct acrn_vm *vm)
{
char *startaddr;
char *curraddr;
struct mpcth *mpch;
struct mpfps *mpfp;
size_t mptable_length;
uint16_t i;
uint16_t vcpu_num = vm->vm_desc->vm_hw_num_cores;
struct mptable_info *mptable = &vm->mptable;
(void *)memcpy_s((void *)mptable, sizeof(struct mptable_info),
(const void *)&mptable_template, sizeof(struct mptable_info));
mptable->mpch.entry_count = vcpu_num + MPE_NUM_BUSES + MPEII_NUM_LOCAL_IRQ;
mptable->mpch.base_table_length = sizeof(struct mpcth)
+ vcpu_num * sizeof(struct proc_entry)
+ MPE_NUM_BUSES * sizeof(struct bus_entry)
+ MPEII_NUM_LOCAL_IRQ * sizeof(struct int_entry);
mptable_length = sizeof(struct mpfps) + mptable->mpch.base_table_length;
if (mptable_length > MPTABLE_MAX_LENGTH) {
return -1;
}
for (i = 0U; i < vcpu_num; i++) {
uint16_t pcpu_id = *(vm->vm_desc->vm_pcpu_ids + i);
(void *)memcpy_s((void *)(mptable->proc_entry_array + i), sizeof(struct proc_entry),
(const void *)&proc_entry_template, sizeof(struct proc_entry));
mptable->proc_entry_array[i].apic_id = per_cpu(lapic_id, pcpu_id);
if (i == 0) {
mptable->proc_entry_array[i].cpu_flags |= PROCENTRY_FLAG_BP;
}
}
/* Copy mptable info into guest memory */
copy_to_gpa(vm, (void *)mptable, MPTABLE_BASE, mptable_length);
startaddr = (char *)gpa2hva(vm, MPTABLE_BASE);
curraddr = startaddr;
stac();
mpfp = (struct mpfps *)curraddr;
mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(struct mpfps));
curraddr += sizeof(struct mpfps);
mpch = (struct mpcth *)curraddr;
mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length);
clac();
return 0U;
}

31
hypervisor/include/arch/x86/guest/mptable.h
View File

@ -1,31 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/************************************************************************
*
* FILE NAME
*
* mptable.h
*
* DESCRIPTION
*
* This file defines API and extern variable for VM mptable info
*
************************************************************************/
/**********************************/
/* EXTERNAL VARIABLES */
/**********************************/
#ifndef MPTABLE_H
#define MPTABLE_H
struct mptable_info;
extern struct mptable_info mptable_vm1;
extern struct mptable_info mptable_vm2;
int32_t mptable_build(struct acrn_vm *vm);
#endif /* MPTABLE_H */

1
hypervisor/include/arch/x86/guest/vm.h
View File

@ -154,6 +154,7 @@ struct acrn_vm {
struct vcpuid_entry vcpuid_entries[MAX_VM_VCPUID_ENTRIES];
struct acrn_vpci vpci;
#ifdef CONFIG_PARTITION_MODE
struct mptable_info mptable;
struct vm_description *vm_desc;
uint8_t vrtc_offset;
#endif

154
hypervisor/include/dm/mptable.h Normal file
View File

@ -0,0 +1,154 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/************************************************************************
*
* FILE NAME
*
* mptable.h
*
* DESCRIPTION
*
* This file defines API and extern variable for VM mptable info
*
************************************************************************/
/**********************************/
/* EXTERNAL VARIABLES */
/**********************************/
#ifndef MPTABLE_H
#define MPTABLE_H
#define MPTABLE_BASE 0xF0000U
/*
* floating pointer length + maximum length of configuration table
* ACRN uses contiguous guest memory from 0xF0000 to place floating pointer
* structure and config table. Maximum length of config table is 64K. So the
* maximum length of combined floating pointer and config table can go up to
* 64K + 16 bytes.Since we are left with only 64K from 0xF0000 to 0x100000(1MB)
* max length is limited to 64K.
*/
#define MPTABLE_MAX_LENGTH 65536U
#define LAPIC_VERSION 16U
#define MP_SPECREV 4U
#define MPFP_SIG "_MP_"
/* Configuration header defines */
#define MPCH_SIG "PCMP"
#define MPCH_OEMID "ACRN "
#define MPCH_OEMID_LEN 8U
#define MPCH_PRODID "Hypervisor "
#define MPCH_PRODID_LEN 12U
/* Processor entry defines */
#define MPEP_SIG_FAMILY 6U
#define MPEP_SIG_MODEL 26U
#define MPEP_SIG_STEPPING 5U
#define MPEP_SIG \
((MPEP_SIG_FAMILY << 8U) | \
(MPEP_SIG_MODEL << 4U) | \
(MPEP_SIG_STEPPING))
#define MPEP_FEATURES 0xBFEBFBFFU /* XXX Intel i7 */
/* Number of local intr entries */
#define MPEII_NUM_LOCAL_IRQ 2U
/* Bus entry defines */
#define MPE_NUM_BUSES 2U
#define MPE_BUSNAME_LEN 6U
#define MPE_BUSNAME_ISA "ISA "
#define MPE_BUSNAME_PCI "PCI "
/* Base table entries */
#define MPCT_ENTRY_PROCESSOR 0U
#define MPCT_ENTRY_BUS 1U
#define MPCT_ENTRY_LOCAL_INT 4U
#define PROCENTRY_FLAG_EN 0x01U
#define PROCENTRY_FLAG_BP 0x02U
#define INTENTRY_TYPE_NMI 1U
#define INTENTRY_TYPE_EXTINT 3U
#define INTENTRY_FLAGS_POLARITY_CONFORM 0x0U
#define INTENTRY_FLAGS_TRIGGER_CONFORM 0x0U
/* MP Floating Pointer Structure */
struct mpfps {
uint8_t signature[4];
uint32_t pap;
uint8_t length;
uint8_t spec_rev;
uint8_t checksum;
uint8_t config_type;
uint8_t mpfb2;
uint8_t mpfb3;
uint8_t mpfb4;
uint8_t mpfb5;
} __packed;
/* MP Configuration Table Header */
struct mpcth {
uint8_t signature[4];
uint16_t base_table_length;
uint8_t spec_rev;
uint8_t checksum;
uint8_t oem_id[8];
uint8_t product_id[12];
uint32_t oem_table_pointer;
uint16_t oem_table_size;
uint16_t entry_count;
uint32_t apic_address;
uint16_t extended_table_length;
uint8_t extended_table_checksum;
uint8_t reserved;
} __packed;
struct proc_entry {
uint8_t type;
uint8_t apic_id;
uint8_t apic_version;
uint8_t cpu_flags;
uint32_t cpu_signature;
uint32_t feature_flags;
uint32_t reserved1;
uint32_t reserved2;
} __packed;
struct bus_entry {
uint8_t type;
uint8_t bus_id;
uint8_t bus_type[6];
} __packed;
struct int_entry {
uint8_t type;
uint8_t int_type;
uint16_t int_flags;
uint8_t src_bus_id;
uint8_t src_bus_irq;
uint8_t dst_apic_id;
uint8_t dst_apic_int;
} __packed;
struct mptable_info {
struct mpfps mpfp;
struct mpcth mpch;
struct bus_entry bus_entry_array[MPE_NUM_BUSES];
struct int_entry int_entry_array[MPEII_NUM_LOCAL_IRQ];
struct proc_entry proc_entry_array[CONFIG_MAX_PCPU_NUM];
};
extern struct mptable_info mptable_vm1;
extern struct mptable_info mptable_vm2;
int32_t mptable_build(struct acrn_vm *vm);
#endif /* MPTABLE_H */

320
hypervisor/partition/apl-mrb/mptable.c
View File

@ -1,320 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <hypervisor.h>
#define MPTABLE_BASE 0xF0000U
/*
* floating pointer length + maximum length of configuration table
* ACRN uses contiguous guest memory from 0xF0000 to place floating pointer
* structure and config table. Maximum length of config table is 64K. So the
* maximum length of combined floating pointer and config table can go up to
* 64K + 16 bytes.Since we are left with only 64K from 0xF0000 to 0x100000(1MB)
* max length is limited to 64K.
*/
#define MPTABLE_MAX_LENGTH 65536U
#define LAPIC_VERSION 16U
#define MP_SPECREV 4U
#define MPFP_SIG "_MP_"
/* Configuration header defines */
#define MPCH_SIG "PCMP"
#define MPCH_OEMID "BHyVe "
#define MPCH_OEMID_LEN 8U
#define MPCH_PRODID "Hypervisor "
#define MPCH_PRODID_LEN 12U
/* Processor entry defines */
#define MPEP_SIG_FAMILY 6U
#define MPEP_SIG_MODEL 26U
#define MPEP_SIG_STEPPING 5U
#define MPEP_SIG \
((MPEP_SIG_FAMILY << 8U) | \
(MPEP_SIG_MODEL << 4U) | \
(MPEP_SIG_STEPPING))
#define MPEP_FEATURES 0xBFEBFBFFU /* XXX Intel i7 */
/* Number of local intr entries */
#define MPEII_NUM_LOCAL_IRQ 2U
/* Bus entry defines */
#define MPE_NUM_BUSES 2U
#define MPE_BUSNAME_LEN 6U
#define MPE_BUSNAME_ISA "ISA "
#define MPE_BUSNAME_PCI "PCI "
/* Base table entries */
#define MPCT_ENTRY_PROCESSOR 0U
#define MPCT_ENTRY_BUS 1U
#define MPCT_ENTRY_LOCAL_INT 4U
#define PROCENTRY_FLAG_EN 0x01U
#define PROCENTRY_FLAG_BP 0x02U
#define INTENTRY_TYPE_NMI 1U
#define INTENTRY_TYPE_EXTINT 3U
#define INTENTRY_FLAGS_POLARITY_CONFORM 0x0U
#define INTENTRY_FLAGS_TRIGGER_CONFORM 0x0U
#define VM1_NUM_CPUS 2U
#define VM2_NUM_CPUS 2U
/* MP Floating Pointer Structure */
struct mpfps {
uint8_t signature[4];
uint32_t pap;
uint8_t length;
uint8_t spec_rev;
uint8_t checksum;
uint8_t config_type;
uint8_t mpfb2;
uint8_t mpfb3;
uint8_t mpfb4;
uint8_t mpfb5;
} __packed;
/* MP Configuration Table Header */
struct mpcth {
uint8_t signature[4];
uint16_t base_table_length;
uint8_t spec_rev;
uint8_t checksum;
uint8_t oem_id[8];
uint8_t product_id[12];
uint32_t oem_table_pointer;
uint16_t oem_table_size;
uint16_t entry_count;
uint32_t apic_address;
uint16_t extended_table_length;
uint8_t extended_table_checksum;
uint8_t reserved;
} __packed;
struct proc_entry {
uint8_t type;
uint8_t apic_id;
uint8_t apic_version;
uint8_t cpu_flags;
uint32_t cpu_signature;
uint32_t feature_flags;
uint32_t reserved1;
uint32_t reserved2;
} __packed;
struct bus_entry {
uint8_t type;
uint8_t bus_id;
uint8_t bus_type[6];
} __packed;
struct int_entry {
uint8_t type;
uint8_t int_type;
uint16_t int_flags;
uint8_t src_bus_id;
uint8_t src_bus_irq;
uint8_t dst_apic_id;
uint8_t dst_apic_int;
} __packed;
struct mptable_info {
struct mpfps mpfp;
struct mpcth mpch;
struct bus_entry bus_entry_array[MPE_NUM_BUSES];
struct int_entry int_entry_array[MPEII_NUM_LOCAL_IRQ];
struct proc_entry proc_entry_array[];
};
struct mptable_info mptable_vm1 = {
.mpfp = {
.signature = MPFP_SIG,
.pap = MPTABLE_BASE + sizeof(struct mpfps),
.length = 1U,
.spec_rev = MP_SPECREV,
},
.mpch = {
.signature = MPCH_SIG,
.spec_rev = MP_SPECREV,
.oem_id = MPCH_OEMID,
.product_id = MPCH_PRODID,
.apic_address = LAPIC_BASE,
.entry_count = (VM1_NUM_CPUS + MPE_NUM_BUSES \
+ MPEII_NUM_LOCAL_IRQ),
.base_table_length = (sizeof(struct mpcth) \
+ VM1_NUM_CPUS * sizeof(struct proc_entry) \
+ MPE_NUM_BUSES * sizeof(struct bus_entry) \
+ MPEII_NUM_LOCAL_IRQ * sizeof(struct int_entry))
},
.proc_entry_array = {
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 0U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN | PROCENTRY_FLAG_BP,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 4U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
}
},
.bus_entry_array = {
{
.type = MPCT_ENTRY_BUS,
.bus_id = 0U,
.bus_type = MPE_BUSNAME_PCI,
},
{
.type = MPCT_ENTRY_BUS,
.bus_id = 1U,
.bus_type = MPE_BUSNAME_ISA,
},
},
.int_entry_array = {
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_EXTINT,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 0U,
},
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_NMI,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 1U,
},
},
};
struct mptable_info mptable_vm2 = {
.mpfp = {
.signature = MPFP_SIG,
.pap = MPTABLE_BASE + sizeof(struct mpfps),
.length = 1U,
.spec_rev = MP_SPECREV,
},
.mpch = {
.signature = MPCH_SIG,
.spec_rev = MP_SPECREV,
.oem_id = MPCH_OEMID,
.product_id = MPCH_PRODID,
.apic_address = LAPIC_BASE,
.entry_count = (VM2_NUM_CPUS + MPE_NUM_BUSES \
+ MPEII_NUM_LOCAL_IRQ),
.base_table_length = (sizeof(struct mpcth) \
+ VM2_NUM_CPUS * sizeof(struct proc_entry) \
+ MPE_NUM_BUSES * sizeof(struct bus_entry) \
+ MPEII_NUM_LOCAL_IRQ * sizeof(struct int_entry))
},
.proc_entry_array = {
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 6U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN | PROCENTRY_FLAG_BP,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 2U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
}
},
.bus_entry_array = {
{
.type = MPCT_ENTRY_BUS,
.bus_id = 0U,
.bus_type = MPE_BUSNAME_PCI,
},
{
.type = MPCT_ENTRY_BUS,
.bus_id = 1U,
.bus_type = MPE_BUSNAME_ISA,
},
},
.int_entry_array = {
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_EXTINT,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 0U,
},
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_NMI,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 1U,
},
},
};
static uint8_t mpt_compute_checksum(void *base, size_t len)
{
uint8_t *bytes;
uint8_t sum;
size_t length = len;
for (bytes = base, sum = 0U; length > 0U; length--) {
sum += *bytes;
bytes++;
}
return (256U - sum);
}
int32_t mptable_build(struct acrn_vm *vm)
{
char *startaddr;
char *curraddr;
struct mpcth *mpch;
struct mpfps *mpfp;
size_t mptable_length, table_length;
table_length = vm->vm_desc->mptable->mpch.base_table_length;
mptable_length = sizeof(struct mpfps) + table_length;
if (mptable_length > MPTABLE_MAX_LENGTH) {
return -1;
}
/* Copy mptable info into guest memory */
copy_to_gpa(vm, (void *)vm->vm_desc->mptable, MPTABLE_BASE, mptable_length);
startaddr = (char *)gpa2hva(vm, MPTABLE_BASE);
curraddr = startaddr;
stac();
mpfp = (struct mpfps *)curraddr;
mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(struct mpfps));
curraddr += sizeof(struct mpfps);
mpch = (struct mpcth *)curraddr;
mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length);
clac();
return 0U;
}

2
hypervisor/partition/apl-mrb/vm_description.c
View File

@ -168,7 +168,6 @@ struct vm_description_array vm_desc_partition = {
console=ttyS2 no_timer_check ignore_loglevel log_buf_len=16M \
consoleblank=0 tsc=reliable xapic_phys",
.vpci_vdev_array = &vpci_vdev_array1,
.mptable = &mptable_vm1,
},
{
@ -183,7 +182,6 @@ struct vm_description_array vm_desc_partition = {
console=ttyS2 no_timer_check ignore_loglevel log_buf_len=16M \
consoleblank=0 tsc=reliable xapic_phys",
.vpci_vdev_array = &vpci_vdev_array2,
.mptable = &mptable_vm2,
.lapic_pt = true,
},
}

352
hypervisor/partition/cb2_dnv/mptable.c
View File

@ -1,352 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <hypervisor.h>
#define MPTABLE_BASE 0xF0000U
/*
* floating pointer length + maximum length of configuration table
* ACRN uses contiguous guest memory from 0xF0000 to place floating pointer
* structure and config table. Maximum length of config table is 64K. So the
* maximum length of combined floating pointer and config table can go up to
* 64K + 16 bytes.Since we are left with only 64K from 0xF0000 to 0x100000(1MB)
* max length is limited to 64K.
*/
#define MPTABLE_MAX_LENGTH 65536U
#define LAPIC_VERSION 16U
#define MP_SPECREV 4U
#define MPFP_SIG "_MP_"
/* Configuration header defines */
#define MPCH_SIG "PCMP"
#define MPCH_OEMID "BHyVe "
#define MPCH_OEMID_LEN 8U
#define MPCH_PRODID "Hypervisor "
#define MPCH_PRODID_LEN 12U
/* Processor entry defines */
#define MPEP_SIG_FAMILY 6U
#define MPEP_SIG_MODEL 26U
#define MPEP_SIG_STEPPING 5U
#define MPEP_SIG \
((MPEP_SIG_FAMILY << 8U) | \
(MPEP_SIG_MODEL << 4U) | \
(MPEP_SIG_STEPPING))
#define MPEP_FEATURES 0xBFEBFBFFU /* XXX Intel i7 */
/* Number of local intr entries */
#define MPEII_NUM_LOCAL_IRQ 2U
/* Bus entry defines */
#define MPE_NUM_BUSES 2U
#define MPE_BUSNAME_LEN 6U
#define MPE_BUSNAME_ISA "ISA "
#define MPE_BUSNAME_PCI "PCI "
/* Base table entries */
#define MPCT_ENTRY_PROCESSOR 0U
#define MPCT_ENTRY_BUS 1U
#define MPCT_ENTRY_LOCAL_INT 4U
#define PROCENTRY_FLAG_EN 0x01U
#define PROCENTRY_FLAG_BP 0x02U
#define INTENTRY_TYPE_NMI 1U
#define INTENTRY_TYPE_EXTINT 3U
#define INTENTRY_FLAGS_POLARITY_CONFORM 0x0U
#define INTENTRY_FLAGS_TRIGGER_CONFORM 0x0U
#define VM1_NUM_CPUS 4U
#define VM2_NUM_CPUS 4U
/* MP Floating Pointer Structure */
struct mpfps {
uint8_t signature[4];
uint32_t pap;
uint8_t length;
uint8_t spec_rev;
uint8_t checksum;
uint8_t config_type;
uint8_t mpfb2;
uint8_t mpfb3;
uint8_t mpfb4;
uint8_t mpfb5;
} __packed;
/* MP Configuration Table Header */
struct mpcth {
uint8_t signature[4];
uint16_t base_table_length;
uint8_t spec_rev;
uint8_t checksum;
uint8_t oem_id[8];
uint8_t product_id[12];
uint32_t oem_table_pointer;
uint16_t oem_table_size;
uint16_t entry_count;
uint32_t apic_address;
uint16_t extended_table_length;
uint8_t extended_table_checksum;
uint8_t reserved;
} __packed;
struct proc_entry {
uint8_t type;
uint8_t apic_id;
uint8_t apic_version;
uint8_t cpu_flags;
uint32_t cpu_signature;
uint32_t feature_flags;
uint32_t reserved1;
uint32_t reserved2;
} __packed;
struct bus_entry {
uint8_t type;
uint8_t bus_id;
uint8_t bus_type[6];
} __packed;
struct int_entry {
uint8_t type;
uint8_t int_type;
uint16_t int_flags;
uint8_t src_bus_id;
uint8_t src_bus_irq;
uint8_t dst_apic_id;
uint8_t dst_apic_int;
} __packed;
struct mptable_info {
struct mpfps mpfp;
struct mpcth mpch;
struct bus_entry bus_entry_array[MPE_NUM_BUSES];
struct int_entry int_entry_array[MPEII_NUM_LOCAL_IRQ];
struct proc_entry proc_entry_array[];
};
struct mptable_info mptable_vm1 = {
.mpfp = {
.signature = MPFP_SIG,
.pap = MPTABLE_BASE + sizeof(struct mpfps),
.length = 1U,
.spec_rev = MP_SPECREV,
},
.mpch = {
.signature = MPCH_SIG,
.spec_rev = MP_SPECREV,
.oem_id = MPCH_OEMID,
.product_id = MPCH_PRODID,
.apic_address = LAPIC_BASE,
.entry_count = (VM1_NUM_CPUS + MPE_NUM_BUSES \
+ MPEII_NUM_LOCAL_IRQ),
.base_table_length = (sizeof(struct mpcth) \
+ VM1_NUM_CPUS * sizeof(struct proc_entry) \
+ MPE_NUM_BUSES * sizeof(struct bus_entry) \
+ MPEII_NUM_LOCAL_IRQ * sizeof(struct int_entry))
},
.proc_entry_array = {
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 0U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN | PROCENTRY_FLAG_BP,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 8U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 16U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 24U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
}
},
.bus_entry_array = {
{
.type = MPCT_ENTRY_BUS,
.bus_id = 0U,
.bus_type = MPE_BUSNAME_PCI,
},
{
.type = MPCT_ENTRY_BUS,
.bus_id = 1U,
.bus_type = MPE_BUSNAME_ISA,
},
},
.int_entry_array = {
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_EXTINT,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 0U,
},
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_NMI,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 1U,
},
},
};
struct mptable_info mptable_vm2 = {
.mpfp = {
.signature = MPFP_SIG,
.pap = MPTABLE_BASE + sizeof(struct mpfps),
.length = 1U,
.spec_rev = MP_SPECREV,
},
.mpch = {
.signature = MPCH_SIG,
.spec_rev = MP_SPECREV,
.oem_id = MPCH_OEMID,
.product_id = MPCH_PRODID,
.apic_address = LAPIC_BASE,
.entry_count = (VM2_NUM_CPUS + MPE_NUM_BUSES \
+ MPEII_NUM_LOCAL_IRQ),
.base_table_length = (sizeof(struct mpcth) \
+ VM2_NUM_CPUS * sizeof(struct proc_entry) \
+ MPE_NUM_BUSES * sizeof(struct bus_entry) \
+ MPEII_NUM_LOCAL_IRQ * sizeof(struct int_entry))
},
.proc_entry_array = {
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 28U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN | PROCENTRY_FLAG_BP,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 20U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 12U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN ,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES
},
{
.type = MPCT_ENTRY_PROCESSOR,
.apic_id = 4U,
.apic_version = LAPIC_VERSION,
.cpu_flags = PROCENTRY_FLAG_EN,
.cpu_signature = MPEP_SIG,
.feature_flags = MPEP_FEATURES,
}
},
.bus_entry_array = {
{
.type = MPCT_ENTRY_BUS,
.bus_id = 0U,
.bus_type = MPE_BUSNAME_PCI,
},
{
.type = MPCT_ENTRY_BUS,
.bus_id = 1U,
.bus_type = MPE_BUSNAME_ISA,
},
},
.int_entry_array = {
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_EXTINT,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 0U,
},
{
.type = MPCT_ENTRY_LOCAL_INT,
.int_type = INTENTRY_TYPE_NMI,
.int_flags = INTENTRY_FLAGS_POLARITY_CONFORM \
| INTENTRY_FLAGS_TRIGGER_CONFORM,
.dst_apic_id = 0xFFU,
.dst_apic_int = 1U,
},
},
};
static uint8_t mpt_compute_checksum(void *base, size_t len)
{
uint8_t *bytes;
uint8_t sum;
size_t length = len;
for (bytes = base, sum = 0U; length > 0U; length--) {
sum += *bytes;
bytes++;
}
return (256U - sum);
}
int32_t mptable_build(struct acrn_vm *vm)
{
char *startaddr;
char *curraddr;
struct mpcth *mpch;
struct mpfps *mpfp;
size_t mptable_length, table_length;
table_length = vm->vm_desc->mptable->mpch.base_table_length;
mptable_length = sizeof(struct mpfps) + table_length;
if (mptable_length > MPTABLE_MAX_LENGTH) {
return -1;
}
/* Copy mptable info into guest memory */
copy_to_gpa(vm, (void *)vm->vm_desc->mptable, MPTABLE_BASE, mptable_length);
startaddr = (char *)gpa2hva(vm, MPTABLE_BASE);
curraddr = startaddr;
stac();
mpfp = (struct mpfps *)curraddr;
mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(struct mpfps));
curraddr += sizeof(struct mpfps);
mpch = (struct mpcth *)curraddr;
mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length);
clac();
return 0U;
}

2
hypervisor/partition/cb2_dnv/vm_description.c
View File

@ -202,7 +202,6 @@ struct vm_description_array vm_desc_partition = {
"console=ttyS0 no_timer_check ignore_loglevel log_buf_len=16M "\
"consoleblank=0 tsc=reliable xapic_phys apic_debug",
.vpci_vdev_array = &vpci_vdev_array1,
.mptable = &mptable_vm1,
.lapic_pt = true,
},
@ -218,7 +217,6 @@ struct vm_description_array vm_desc_partition = {
"console=ttyS0 no_timer_check ignore_loglevel log_buf_len=16M "\
"consoleblank=0 tsc=reliable xapic_phys apic_debug",
.vpci_vdev_array = &vpci_vdev_array2,
.mptable = &mptable_vm2,
.lapic_pt = true,
},
}