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HV: move default ACPI info to default_acpi_info.h

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Given the reality that some of ACPI configrations are unlikey changed,
move these MACROs to a default header file.

The platform_acpi_info.h still has chance to override the default
definition by #undef with offline tool.

Tracked-On: #1520
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Victor Sun 2018-10-18 10:56:54 +08:00 committed by Xie, Nanlin
parent bd042352cd
commit 8b5d357f92
4 changed files with 53 additions and 70 deletions
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1
hypervisor/bsp/include/bsp_extern.h
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@ -18,6 +18,7 @@
#ifndef BSP_EXTERN_H #ifndef BSP_EXTERN_H
#define BSP_EXTERN_H #define BSP_EXTERN_H
#include "default_acpi_info.h"
#include "platform_acpi_info.h" #include "platform_acpi_info.h"
#define UOS_DEFAULT_START_ADDR (0x100000000UL) #define UOS_DEFAULT_START_ADDR (0x100000000UL)

52
hypervisor/bsp/include/default_acpi_info.h Normal file
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@ -0,0 +1,52 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/* Given the reality that some of ACPI configrations are unlikey changed,
* define these MACROs in this header file.
* The platform_acpi_info.h still has chance to override the default
* definition by #undef with offline tool.
*/
#ifndef DEFAULT_ACPI_INFO_H
#define DEFAULT_ACPI_INFO_H
/* APIC */
#define LAPIC_BASE 0xFEE00000UL
#define NR_IOAPICS 1U
#define IOAPIC0_BASE 0xFEC00000UL
#define IOAPIC1_BASE 0UL
/* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0x20U
#define PM1A_EVT_BIT_OFFSET 0U
#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_EVT_BIT_WIDTH 0U
#define PM1B_EVT_BIT_OFFSET 0U
#define PM1B_EVT_ACCESS_SIZE 0U
#define PM1B_EVT_ADDRESS 0UL
#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_CNT_BIT_WIDTH 0x10U
#define PM1A_CNT_BIT_OFFSET 0U
#define PM1A_CNT_ACCESS_SIZE 2U
#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_CNT_BIT_WIDTH 0U
#define PM1B_CNT_BIT_OFFSET 0U
#define PM1B_CNT_ACCESS_SIZE 0U
#define PM1B_CNT_ADDRESS 0UL
#define S3_PKG_VAL_PM1A 0x05U
#define S3_PKG_VAL_PM1B 0U
#define S3_PKG_RESERVED 0U
#define S5_PKG_VAL_PM1A 0x07U
#define S5_PKG_VAL_PM1B 0U
#define S5_PKG_RESERVED 0U
#endif /* DEFAULT_ACPI_INFO_H */

35
hypervisor/bsp/include/sbl/platform_acpi_info.h
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@ -12,46 +12,11 @@
#define ACPI_INFO_VALIDATED #define ACPI_INFO_VALIDATED
/* APIC */
#define LAPIC_BASE 0xFEE00000UL
#define NR_IOAPICS 1U
#define IOAPIC0_BASE 0xFEC00000UL
#define IOAPIC1_BASE 0UL
/* pm sstate data */ /* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0x20U
#define PM1A_EVT_BIT_OFFSET 0U
#define PM1A_EVT_ACCESS_SIZE 3U #define PM1A_EVT_ACCESS_SIZE 3U
#define PM1A_EVT_ADDRESS 0x400UL #define PM1A_EVT_ADDRESS 0x400UL
#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_EVT_BIT_WIDTH 0U
#define PM1B_EVT_BIT_OFFSET 0U
#define PM1B_EVT_ACCESS_SIZE 0U
#define PM1B_EVT_ADDRESS 0UL
#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_CNT_BIT_WIDTH 0x10U
#define PM1A_CNT_BIT_OFFSET 0U
#define PM1A_CNT_ACCESS_SIZE 2U
#define PM1A_CNT_ADDRESS 0x404UL #define PM1A_CNT_ADDRESS 0x404UL
#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_CNT_BIT_WIDTH 0U
#define PM1B_CNT_BIT_OFFSET 0U
#define PM1B_CNT_ACCESS_SIZE 0U
#define PM1B_CNT_ADDRESS 0UL
#define S3_PKG_VAL_PM1A 0x05U
#define S3_PKG_VAL_PM1B 0U
#define S3_PKG_RESERVED 0U
#define S5_PKG_VAL_PM1A 0x07U
#define S5_PKG_VAL_PM1B 0U
#define S5_PKG_RESERVED 0U
#define WAKE_VECTOR_32 0x7A86BBDCUL #define WAKE_VECTOR_32 0x7A86BBDCUL
#define WAKE_VECTOR_64 0x7A86BBE8UL #define WAKE_VECTOR_64 0x7A86BBE8UL

35
hypervisor/bsp/include/uefi/platform_acpi_info.h
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@ -10,46 +10,11 @@
#ifndef PLATFORM_ACPI_INFO_H #ifndef PLATFORM_ACPI_INFO_H
#define PLATFORM_ACPI_INFO_H #define PLATFORM_ACPI_INFO_H
/* APIC */
#define LAPIC_BASE 0xFEE00000UL
#define NR_IOAPICS 1U
#define IOAPIC0_BASE 0xFEC00000UL
#define IOAPIC1_BASE 0UL
/* pm sstate data */ /* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0U
#define PM1A_EVT_BIT_OFFSET 0U
#define PM1A_EVT_ACCESS_SIZE 0U #define PM1A_EVT_ACCESS_SIZE 0U
#define PM1A_EVT_ADDRESS 0UL #define PM1A_EVT_ADDRESS 0UL
#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_EVT_BIT_WIDTH 0U
#define PM1B_EVT_BIT_OFFSET 0U
#define PM1B_EVT_ACCESS_SIZE 0U
#define PM1B_EVT_ADDRESS 0UL
#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_CNT_BIT_WIDTH 0U
#define PM1A_CNT_BIT_OFFSET 0U
#define PM1A_CNT_ACCESS_SIZE 0U
#define PM1A_CNT_ADDRESS 0UL #define PM1A_CNT_ADDRESS 0UL
#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_CNT_BIT_WIDTH 0U
#define PM1B_CNT_BIT_OFFSET 0U
#define PM1B_CNT_ACCESS_SIZE 0U
#define PM1B_CNT_ADDRESS 0UL
#define S3_PKG_VAL_PM1A 0U
#define S3_PKG_VAL_PM1B 0U
#define S3_PKG_RESERVED 0U
#define S5_PKG_VAL_PM1A 0U
#define S5_PKG_VAL_PM1B 0U
#define S5_PKG_RESERVED 0U
#define WAKE_VECTOR_32 0UL #define WAKE_VECTOR_32 0UL
#define WAKE_VECTOR_64 0UL #define WAKE_VECTOR_64 0UL