hv: vcpuid: modify vcpuid according to msr ia32_misc_enable

According to SDM Vol4 2.1, modify vcpuid according to msr ia32_misc_enable:
- Clear CPUID.01H: ECX[3] if guest disabled monitor/mwait.
- Clear CPUID.80000001H: EDX[20] if guest set XD Bit Disable.
- Limit the CPUID leave maximum value to 2 if guest set Limit CPUID MAXVal.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Binbin Wu
2019-05-06 15:53:34 +08:00
committed by Eddie Dong
parent ef19ed8961
commit 8e310e6ea1
2 changed files with 61 additions and 3 deletions

View File

@@ -100,6 +100,8 @@
#define CPUID_EAX_XCR0_BNDREGS (1U<<3U)
/* CPUID.0DH.EAX.XCR0_BNDCSR */
#define CPUID_EAX_XCR0_BNDCSR (1U<<4U)
/* CPUID.80000001H.EDX.XD_BIT_AVAILABLE */
#define CPUID_EDX_XD_BIT_AVIL (1U<<20U)
/* CPUID source operands */
#define CPUID_VENDORSTRING 0U