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hv: vlapic: coding refine
Using __func__ instead of function string name. Using tab instead of more whitespace. Using macro instead of numeric constants. Remove unnecessary function declaration. Signed-off-by: Li, Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -86,18 +86,11 @@ do { \
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#endif
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/* TIMER_LVT bit[18:17] == 0x10 TSD DEADLINE mode */
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#define VLAPIC_TSCDEADLINE(lvt) (((lvt) & 0x60000) == 0x40000)
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#define VLAPIC_TSCDEADLINE(lvt) (((lvt) & APIC_LVTT_TM) == APIC_LVTT_TM_TSCDLT)
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/*APIC-v APIC-access address */
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static void *apicv_apic_access_addr;
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static int
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vlapic_write(struct vlapic *vlapic, int mmio_access, uint64_t offset,
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uint64_t data);
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static int
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vlapic_read(struct vlapic *vlapic, int mmio_access, uint64_t offset,
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uint64_t *data);
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static int
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apicv_set_intr_ready(struct vlapic *vlapic, int vector, bool level);
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@ -110,22 +103,12 @@ apicv_set_tmr(struct vlapic *vlapic, int vector, bool level);
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static void
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apicv_batch_set_tmr(struct vlapic *vlapic);
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/*
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* Returns 1 if the vcpu needs to be notified of the interrupt and 0 otherwise.
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*/
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static int
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vlapic_set_intr_ready(struct vlapic *vlapic, int vector, bool level);
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/*
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* Post an interrupt to the vcpu running on 'hostcpu'. This will use a
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* hardware assist if available (e.g. Posted Interrupt) or fall back to
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* sending an 'ipinum' to interrupt the 'hostcpu'.
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*/
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static void vlapic_set_error(struct vlapic *vlapic, uint32_t mask);
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static int vlapic_trigger_lvt(struct vlapic *vlapic, int vector);
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static uint64_t vlapic_get_apicbase(struct vlapic *vlapic);
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static int vlapic_set_apicbase(struct vlapic *vlapic, uint64_t val);
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static struct vlapic *
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vm_lapic_from_vcpu_id(struct vm *vm, int vcpu_id)
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@ -159,7 +142,7 @@ static int vm_apicid2vcpu_id(struct vm *vm, uint8_t lapicid)
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return vcpu->vcpu_id;
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}
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pr_err("vm_apicid2vcpu_id: bad lapicid %d", lapicid);
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pr_err("%s: bad lapicid %d", __func__, lapicid);
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return phy_cpu_num;
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}
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@ -267,6 +250,9 @@ vlapic_esr_write_handler(struct vlapic *vlapic)
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vlapic->esr_pending = 0;
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}
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/*
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* Returns 1 if the vcpu needs to be notified of the interrupt and 0 otherwise.
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*/
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static int
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vlapic_set_intr_ready(struct vlapic *vlapic, int vector, bool level)
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{
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@ -289,8 +275,7 @@ vlapic_set_intr_ready(struct vlapic *vlapic, int vector, bool level)
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if (vector < 16) {
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vlapic_set_error(vlapic, APIC_ESR_RECEIVE_ILLEGAL_VECTOR);
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dev_dbg(ACRN_DBG_LAPIC,
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"vlapic ignoring interrupt to vector %d",
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vector);
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"vlapic ignoring interrupt to vector %d", vector);
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return 1;
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}
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@ -368,8 +353,8 @@ lvt_off_to_idx(uint32_t offset)
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break;
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}
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ASSERT(index >= 0 && index <= VLAPIC_MAXLVT_INDEX,
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"lvt_off_to_idx: invalid lvt index %d for offset %#x",
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index, offset);
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"%s: invalid lvt index %d for offset %#x",
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__func__, index, offset);
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return index;
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}
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@ -587,7 +572,7 @@ vlapic_update_ppr(struct vlapic *vlapic)
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ppr = isrvec & 0xf0;
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vlapic->apic_page->ppr = ppr;
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dev_dbg(ACRN_DBG_LAPIC, "vlapic_update_ppr 0x%02x", ppr);
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dev_dbg(ACRN_DBG_LAPIC, "%s 0x%02x", __func__, ppr);
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}
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static void
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@ -1231,7 +1216,7 @@ vlapic_write(struct vlapic *vlapic, int mmio_access, uint64_t offset,
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int retval;
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ASSERT((offset & 0xf) == 0 && offset < CPU_PAGE_SIZE,
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"vlapic_write: invalid offset %#lx", offset);
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"%s: invalid offset %#lx", __func__, offset);
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dev_dbg(ACRN_DBG_LAPIC, "vlapic write offset %#lx, data %#lx",
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offset, data);
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@ -1351,12 +1336,12 @@ vlapic_reset(struct vlapic *vlapic)
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void
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vlapic_init(struct vlapic *vlapic)
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{
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ASSERT(vlapic->vm != NULL, "vlapic_init: vm is not initialized");
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ASSERT(vlapic->vm != NULL, "%s: vm is not initialized", __func__);
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ASSERT(vlapic->vcpu->vcpu_id >= 0 &&
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vlapic->vcpu->vcpu_id < phy_cpu_num,
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"vlapic_init: vcpu_id is not initialized");
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"%s: vcpu_id is not initialized", __func__);
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ASSERT(vlapic->apic_page != NULL,
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"vlapic_init: apic_page is not initialized");
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"%s: apic_page is not initialized", __func__);
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/*
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* If the vlapic is configured in x2apic mode then it will be
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@ -1462,8 +1447,8 @@ vlapic_enabled(struct vlapic *vlapic)
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{
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struct lapic *lapic = vlapic->apic_page;
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if ((vlapic->msr_apicbase & APICBASE_ENABLED) != 0 &&
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(lapic->svr & APIC_SVR_ENABLE) != 0)
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if ((vlapic->msr_apicbase & APICBASE_ENABLED) &&
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(lapic->svr & APIC_SVR_ENABLE))
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return true;
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else
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return false;
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@ -1674,7 +1659,7 @@ static int tsc_periodic_time(void *data)
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/* inject vcpu timer interrupt if existing */
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if (VLAPIC_TSCDEADLINE(lapic->lvt_timer))
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vlapic_intr_edge(vcpu, lapic->lvt_timer & 0xFF);
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vlapic_intr_edge(vcpu, lapic->lvt_timer & APIC_LVTT_VECTOR);
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return 0;
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}
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