From 8ed1d8aa5e649fa605086b4fd1932bdf385cf444 Mon Sep 17 00:00:00 2001 From: Tao Yuhong Date: Tue, 16 Mar 2021 07:09:26 -0400 Subject: [PATCH] DM: change high RAM start address to 4GB for post-launched VM ACRN didn't support dynamic memory allocation. SO it would reserve a big page pool and use the GPA as index to get a page to do EPT mapping. In order to save memory, we put high MMIO windows to [4G, 5G]. AFter we support dynamic page allocation for EPT mapping, we move high MMIO windows to where it used to ([256G, 512G]) for 39 bits physical address), we could move high memory to where is used to too ([4G, 4G + size]). Tracked-On: #5913 Signed-off-by: Tao Yuhong --- devicemodel/core/sw_load_common.c | 4 ++-- devicemodel/core/vmmapi.c | 3 ++- devicemodel/include/sw_load.h | 2 ++ 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/devicemodel/core/sw_load_common.c b/devicemodel/core/sw_load_common.c index 2914ddac5..6dbc024bf 100644 --- a/devicemodel/core/sw_load_common.c +++ b/devicemodel/core/sw_load_common.c @@ -58,7 +58,7 @@ static char bootargs[BOOT_ARG_LEN]; * 3: gpu_rsvd_bot - gpu_rsvd_top (reserved) 0x4004000 * 4: lowmem part2 - 0x80000000 (reserved) 0x0 * 5: 0xE0000000 - 0x100000000 MCFG, MMIO 512MB - * 6: 0x140000000 - highmem RAM highmem - 5GB + * 6: HIGHRAM_START_ADDR - mmio64 start RAM ctx->highmem * * FIXME: Do we need to reserve DSM and OPREGION for GVTD here. */ @@ -106,7 +106,7 @@ const struct e820_entry e820_default_entries[NUM_E820_ENTRIES] = { }, { /* 5GB to highmem */ - .baseaddr = PCI_EMUL_MEMLIMIT64, + .baseaddr = HIGHRAM_START_ADDR, .length = 0x0, .type = E820_TYPE_RESERVED }, diff --git a/devicemodel/core/vmmapi.c b/devicemodel/core/vmmapi.c index d7c2973fd..9b53ad78c 100644 --- a/devicemodel/core/vmmapi.c +++ b/devicemodel/core/vmmapi.c @@ -46,6 +46,7 @@ #include "dm.h" #include "pci_core.h" #include "log.h" +#include "sw_load.h" #define MAP_NOCORE 0 #define MAP_ALIGNED_SUPER 0 @@ -229,7 +230,7 @@ vm_create(const char *name, uint64_t req_buf, int *vcpu_num) ctx->gvt_enabled = false; ctx->fd = devfd; ctx->lowmem_limit = PCI_EMUL_MEMBASE32; - ctx->highmem_gpa_base = PCI_EMUL_MEMLIMIT64; + ctx->highmem_gpa_base = HIGHRAM_START_ADDR; ctx->name = (char *)(ctx + 1); strncpy(ctx->name, name, strnlen(name, PATH_MAX) + 1); diff --git a/devicemodel/include/sw_load.h b/devicemodel/include/sw_load.h index 78474204d..65b5970ea 100644 --- a/devicemodel/include/sw_load.h +++ b/devicemodel/include/sw_load.h @@ -43,6 +43,8 @@ #define LOWRAM_E820_ENTRY 1 #define HIGHRAM_E820_ENTRY 6 +#define HIGHRAM_START_ADDR 0x100000000UL /* 4GB */ + /* Defines a single entry in an E820 memory map. */ struct e820_entry { /** The base address of the memory range. */