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hv: pgtable: move pgtable definition to pgtable.h
This patch moves pgtable definition to pgtable.h and include the proper header file for page module. Tracked-On: #5830 Signed-off-by: Li Fei1 <fei1.li@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -29,7 +29,6 @@
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#include <types.h>
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#include <atomic.h>
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#include <page.h>
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#include <pgtable.h>
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#include <cpu_caps.h>
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#include <mmu.h>
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@ -4,15 +4,8 @@
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <types.h>
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#include <rtl.h>
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#include <cpufeatures.h>
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#include <pgtable.h>
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#include <bits.h>
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#include <page.h>
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#include <mmu.h>
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#include <trusty.h>
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#include <vtd.h>
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#include <security.h>
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#include <vm.h>
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#include <logmsg.h>
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@ -17,6 +17,9 @@ typedef void (*pge_handler)(uint64_t *pgentry, uint64_t size);
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*/
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#define INVALID_HPA (0x1UL << 52U)
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#define INVALID_GPA (0x1UL << 52U)
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struct acrn_vm;
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/* External Interfaces */
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/**
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* @brief Check if the GPA range is guest valid GPA or not
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@ -15,6 +15,7 @@
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#include <bits.h>
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#include <spinlock.h>
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#include <pgtable.h>
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#include <vcpu.h>
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#include <vioapic.h>
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#include <vpic.h>
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@ -8,7 +8,6 @@
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#define PAGE_H
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#include <spinlock.h>
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#include <board_info.h>
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#define PAGE_SHIFT 12U
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#define PAGE_SIZE (1U << PAGE_SHIFT)
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@ -29,30 +28,6 @@
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#define PT_PAGE_NUM(size) (((size) + PDE_SIZE - 1UL) >> PDE_SHIFT)
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/**
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* @brief Page tables level in IA32 paging mode
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*/
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enum _page_table_level {
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/**
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* @brief The PML4 level in the page tables
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*/
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IA32E_PML4 = 0,
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/**
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* @brief The Page-Directory-Pointer-Table level in the page tables
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*/
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IA32E_PDPT = 1,
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/**
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* @brief The Page-Directory level in the page tables
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*/
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IA32E_PD = 2,
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/**
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* @brief The Page-Table level in the page tables
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*/
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IA32E_PT = 3,
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};
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struct acrn_vm;
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struct page {
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uint8_t contents[PAGE_SIZE];
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} __aligned(PAGE_SIZE);
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@ -67,16 +42,6 @@ struct page_pool {
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struct page *dummy_page;
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};
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struct pgtable {
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uint64_t default_access_right;
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struct page_pool *pool;
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bool (*large_page_support)(enum _page_table_level level, uint64_t prot);
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uint64_t (*pgentry_present)(uint64_t pte);
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void (*clflush_pagewalk)(const void *p);
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void (*tweak_exe_right)(uint64_t *entry);
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void (*recover_exe_right)(uint64_t *entry);
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};
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struct page *alloc_page(struct page_pool *pool);
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void free_page(struct page_pool *pool, struct page *page);
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#endif /* PAGE_H */
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@ -136,6 +136,39 @@
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#define PML4E_PFN_MASK 0x0000FFFFFFFFF000UL
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#define PDPTE_PFN_MASK 0x0000FFFFFFFFF000UL
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#define PDE_PFN_MASK 0x0000FFFFFFFFF000UL
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/**
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* @brief Page tables level in IA32 paging mode
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*/
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enum _page_table_level {
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/**
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* @brief The PML4 level in the page tables
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*/
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IA32E_PML4 = 0,
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/**
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* @brief The Page-Directory-Pointer-Table level in the page tables
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*/
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IA32E_PDPT = 1,
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/**
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* @brief The Page-Directory level in the page tables
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*/
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IA32E_PD = 2,
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/**
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* @brief The Page-Table level in the page tables
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*/
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IA32E_PT = 3,
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};
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struct pgtable {
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uint64_t default_access_right;
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struct page_pool *pool;
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bool (*large_page_support)(enum _page_table_level level, uint64_t prot);
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uint64_t (*pgentry_present)(uint64_t pte);
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void (*clflush_pagewalk)(const void *p);
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void (*tweak_exe_right)(uint64_t *entry);
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void (*recover_exe_right)(uint64_t *entry);
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};
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/**
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* @brief Address space translation
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*
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