From 90d8e2856008eefdccc57f4b3c6f1f2eca0e4d5a Mon Sep 17 00:00:00 2001 From: Xiangyang Wu Date: Mon, 9 Jul 2018 14:53:03 +0800 Subject: [PATCH] HV:CPU: Narrow integer conversion There are some narrow integer conversion violations in the HV reported by static analysis tools. The narrow integer conversions are resolved by following methods: * Explicit type conversion as needed; * Update suffix of constant value as 'U' as needed. cked-on: ccm0001001-247033 Signed-off-by: Xiangyang Wu Reviewed-by: Junjie Mao --- hypervisor/arch/x86/cpu.c | 8 +- hypervisor/include/arch/x86/cpuid.h | 122 ++++++++++++++-------------- 2 files changed, 65 insertions(+), 65 deletions(-) diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index a006ec4c7..c9d6cae9d 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -114,7 +114,7 @@ static void get_cpu_capabilities(void) family = (eax >> 8U) & 0xffU; if (family == 0xFU) family += (eax >> 20U) & 0xffU; - boot_cpu_data.x86 = family; + boot_cpu_data.x86 = (uint8_t)family; model = (eax >> 4U) & 0xfU; if (family >= 0x06U) @@ -651,7 +651,7 @@ static void update_trampoline_code_refs(uint64_t dest_pa) val = dest_pa + (uint64_t)trampoline_fixup_target; ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_fixup_cs); - *(uint16_t *)(ptr) = (uint16_t)(val >> 4) & 0xFFFFU; + *(uint16_t *)(ptr) = (uint16_t)((val >> 4) & 0xFFFFU); ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_fixup_ip); *(uint16_t *)(ptr) = (uint16_t)(val & 0xfU); @@ -673,7 +673,7 @@ static void update_trampoline_code_refs(uint64_t dest_pa) /* update trampoline jump pointer with relocated offset */ ptr = HPA2HVA(dest_pa + (uint64_t)trampoline_start64_fixup); - *(uint32_t *)ptr += dest_pa; + *(uint32_t *)ptr += (uint32_t)dest_pa; } static uint64_t prepare_trampoline(void) @@ -690,7 +690,7 @@ static uint64_t prepare_trampoline(void) pr_dbg("trampoline code: %llx size %x", dest_pa, size); /* Copy segment for AP initialization code below 1MB */ - (void)memcpy_s(HPA2HVA(dest_pa), size, _ld_trampoline_load, size); + (void)memcpy_s(HPA2HVA(dest_pa), (size_t)size, _ld_trampoline_load, (size_t)size); update_trampoline_code_refs(dest_pa); trampoline_start16_paddr = dest_pa; diff --git a/hypervisor/include/arch/x86/cpuid.h b/hypervisor/include/arch/x86/cpuid.h index 439ecd94f..a5a69e0b3 100644 --- a/hypervisor/include/arch/x86/cpuid.h +++ b/hypervisor/include/arch/x86/cpuid.h @@ -15,73 +15,73 @@ #define CPUID_H_ /* CPUID bit definitions */ -#define CPUID_ECX_SSE3 (1UL<<0) -#define CPUID_ECX_PCLMUL (1UL<<1) -#define CPUID_ECX_DTES64 (1UL<<2) -#define CPUID_ECX_MONITOR (1UL<<3) -#define CPUID_ECX_DS_CPL (1UL<<4) -#define CPUID_ECX_VMX (1UL<<5) -#define CPUID_ECX_SMX (1UL<<6) -#define CPUID_ECX_EST (1UL<<7) -#define CPUID_ECX_TM2 (1UL<<8) -#define CPUID_ECX_SSSE3 (1UL<<9) -#define CPUID_ECX_CID (1UL<<10) -#define CPUID_ECX_FMA (1UL<<12) -#define CPUID_ECX_CX16 (1UL<<13) -#define CPUID_ECX_ETPRD (1UL<<14) -#define CPUID_ECX_PDCM (1UL<<15) -#define CPUID_ECX_DCA (1UL<<18) -#define CPUID_ECX_SSE4_1 (1UL<<19) -#define CPUID_ECX_SSE4_2 (1UL<<20) -#define CPUID_ECX_x2APIC (1UL<<21) -#define CPUID_ECX_MOVBE (1UL<<22) -#define CPUID_ECX_POPCNT (1UL<<23) -#define CPUID_ECX_AES (1UL<<25) -#define CPUID_ECX_XSAVE (1UL<<26) -#define CPUID_ECX_OSXSAVE (1UL<<27) -#define CPUID_ECX_AVX (1UL<<28) -#define CPUID_EDX_FPU (1UL<<0) -#define CPUID_EDX_VME (1UL<<1) -#define CPUID_EDX_DE (1UL<<2) -#define CPUID_EDX_PSE (1UL<<3) -#define CPUID_EDX_TSC (1UL<<4) -#define CPUID_EDX_MSR (1UL<<5) -#define CPUID_EDX_PAE (1UL<<6) -#define CPUID_EDX_MCE (1UL<<7) -#define CPUID_EDX_CX8 (1UL<<8) -#define CPUID_EDX_APIC (1UL<<9) -#define CPUID_EDX_SEP (1UL<<11) -#define CPUID_EDX_MTRR (1UL<<12) -#define CPUID_EDX_PGE (1UL<<13) -#define CPUID_EDX_MCA (1UL<<14) -#define CPUID_EDX_CMOV (1UL<<15) -#define CPUID_EDX_PAT (1UL<<16) -#define CPUID_EDX_PSE36 (1UL<<17) -#define CPUID_EDX_PSN (1UL<<18) -#define CPUID_EDX_CLF (1UL<<19) -#define CPUID_EDX_DTES (1UL<<21) -#define CPUID_EDX_ACPI (1UL<<22) -#define CPUID_EDX_MMX (1UL<<23) -#define CPUID_EDX_FXSR (1UL<<24) -#define CPUID_EDX_SSE (1UL<<25) -#define CPUID_EDX_SSE2 (1UL<<26) -#define CPUID_EDX_SS (1UL<<27) -#define CPUID_EDX_HTT (1UL<<28) -#define CPUID_EDX_TM1 (1UL<<29) -#define CPUID_EDX_IA64 (1UL<<30) -#define CPUID_EDX_PBE (1UL<<31) +#define CPUID_ECX_SSE3 (1U<<0) +#define CPUID_ECX_PCLMUL (1U<<1) +#define CPUID_ECX_DTES64 (1U<<2) +#define CPUID_ECX_MONITOR (1U<<3) +#define CPUID_ECX_DS_CPL (1U<<4) +#define CPUID_ECX_VMX (1U<<5) +#define CPUID_ECX_SMX (1U<<6) +#define CPUID_ECX_EST (1U<<7) +#define CPUID_ECX_TM2 (1U<<8) +#define CPUID_ECX_SSSE3 (1U<<9) +#define CPUID_ECX_CID (1U<<10) +#define CPUID_ECX_FMA (1U<<12) +#define CPUID_ECX_CX16 (1U<<13) +#define CPUID_ECX_ETPRD (1U<<14) +#define CPUID_ECX_PDCM (1U<<15) +#define CPUID_ECX_DCA (1U<<18) +#define CPUID_ECX_SSE4_1 (1U<<19) +#define CPUID_ECX_SSE4_2 (1U<<20) +#define CPUID_ECX_x2APIC (1U<<21) +#define CPUID_ECX_MOVBE (1U<<22) +#define CPUID_ECX_POPCNT (1U<<23) +#define CPUID_ECX_AES (1U<<25) +#define CPUID_ECX_XSAVE (1U<<26) +#define CPUID_ECX_OSXSAVE (1U<<27) +#define CPUID_ECX_AVX (1U<<28) +#define CPUID_EDX_FPU (1U<<0) +#define CPUID_EDX_VME (1U<<1) +#define CPUID_EDX_DE (1U<<2) +#define CPUID_EDX_PSE (1U<<3) +#define CPUID_EDX_TSC (1U<<4) +#define CPUID_EDX_MSR (1U<<5) +#define CPUID_EDX_PAE (1U<<6) +#define CPUID_EDX_MCE (1U<<7) +#define CPUID_EDX_CX8 (1U<<8) +#define CPUID_EDX_APIC (1U<<9) +#define CPUID_EDX_SEP (1U<<11) +#define CPUID_EDX_MTRR (1U<<12) +#define CPUID_EDX_PGE (1U<<13) +#define CPUID_EDX_MCA (1U<<14) +#define CPUID_EDX_CMOV (1U<<15) +#define CPUID_EDX_PAT (1U<<16) +#define CPUID_EDX_PSE36 (1U<<17) +#define CPUID_EDX_PSN (1U<<18) +#define CPUID_EDX_CLF (1U<<19) +#define CPUID_EDX_DTES (1U<<21) +#define CPUID_EDX_ACPI (1U<<22) +#define CPUID_EDX_MMX (1U<<23) +#define CPUID_EDX_FXSR (1U<<24) +#define CPUID_EDX_SSE (1U<<25) +#define CPUID_EDX_SSE2 (1U<<26) +#define CPUID_EDX_SS (1U<<27) +#define CPUID_EDX_HTT (1U<<28) +#define CPUID_EDX_TM1 (1U<<29) +#define CPUID_EDX_IA64 (1U<<30) +#define CPUID_EDX_PBE (1U<<31) /* CPUID.07H:EBX.TSC_ADJUST*/ -#define CPUID_EBX_TSC_ADJ (1UL<<1) +#define CPUID_EBX_TSC_ADJ (1U<<1) /* CPUID.07H:EDX.IBRS_IBPB*/ -#define CPUID_EDX_IBRS_IBPB (1UL<<26) +#define CPUID_EDX_IBRS_IBPB (1U<<26) /* CPUID.07H:EDX.STIBP*/ -#define CPUID_EDX_STIBP (1UL<<27) +#define CPUID_EDX_STIBP (1U<<27) /* CPUID.80000001H:EDX.Page1GB*/ -#define CPUID_EDX_PAGE1GB (1UL<<26) +#define CPUID_EDX_PAGE1GB (1U<<26) /* CPUID.07H:EBX.INVPCID*/ -#define CPUID_EBX_INVPCID (1UL<<10) +#define CPUID_EBX_INVPCID (1U<<10) /* CPUID.01H:ECX.PCID*/ -#define CPUID_ECX_PCID (1UL<<17) +#define CPUID_ECX_PCID (1U<<17) /* CPUID source operands */ #define CPUID_VENDORSTRING 0