mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-09-10 05:09:01 +00:00
config_tools: add a new entry MAX_EFI_MMAP_ENTRIES
It is used to specify the maximum number of EFI memmap entries. On some platforms, like Tiger Lake, the number of EFI memmap entries becomes 268 when the BIOS settings are changed. The current value of MAX_EFI_MMAP_ENTRIES (256) defined in hypervisor is not big enough to cover such cases. As the number of EFI memmap entries depends on the platforms and the BIOS settings, this patch introduces a new entry MAX_EFI_MMAP_ENTRIES in configurations so that it can be adjusted for different cases. Tracked-On: #6442 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
This commit is contained in:
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -57,6 +57,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -57,6 +57,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -60,6 +60,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -57,6 +57,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -60,6 +60,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -57,6 +57,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -57,6 +57,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -52,6 +52,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>300</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -55,6 +55,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>300</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -51,6 +51,7 @@
|
||||
</MEMORY>
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>300</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -52,6 +52,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>300</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -52,6 +52,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>300</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -44,6 +44,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -48,6 +48,7 @@
|
||||
|
||||
<CAPACITIES>
|
||||
<IOMMU_BUS_NUM>0x100</IOMMU_BUS_NUM>
|
||||
<MAX_EFI_MMAP_ENTRIES>256</MAX_EFI_MMAP_ENTRIES>
|
||||
<MAX_IR_ENTRIES>256</MAX_IR_ENTRIES>
|
||||
<MAX_IOAPIC_NUM>1</MAX_IOAPIC_NUM>
|
||||
<MAX_PCI_DEV_NUM>96</MAX_PCI_DEV_NUM>
|
||||
|
@@ -285,6 +285,11 @@ initialization.</xs:documentation>
|
||||
</xs:restriction>
|
||||
</xs:simpleType>
|
||||
</xs:element>
|
||||
<xs:element name="MAX_EFI_MMAP_ENTRIES" type="xs:integer" default="256">
|
||||
<xs:annotation>
|
||||
<xs:documentation>The maximum number of EFI memmap entries.</xs:documentation>
|
||||
</xs:annotation>
|
||||
</xs:element>
|
||||
<xs:element name="MAX_PT_IRQ_ENTRIES" type="xs:integer" default="256">
|
||||
<xs:annotation>
|
||||
<xs:documentation>The pre-defined number of interrupt sources of all pass-through devices.</xs:documentation>
|
||||
|
@@ -167,6 +167,10 @@
|
||||
<xsl:with-param name="key" select="'MAX_IOAPIC_NUM'" />
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="integer-by-key">
|
||||
<xsl:with-param name="key" select="'MAX_EFI_MMAP_ENTRIES'" />
|
||||
</xsl:call-template>
|
||||
|
||||
<xsl:call-template name="integer-by-key">
|
||||
<xsl:with-param name="key" select="'MAX_IR_ENTRIES'" />
|
||||
</xsl:call-template>
|
||||
|
Reference in New Issue
Block a user