github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-06-27 15:56:54 +00:00
Code Issues Projects Releases Wiki Activity

hv: fix 2 minor MISRA-C violations in inst_emul.c

Browse Source 
Signed integral type cast to unsigned. :  (unsigned long and long)

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Zide Chen 2019-01-11 15:38:27 -08:00 committed by wenlingz
parent 3a5b5b084f
commit 92d7018249
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/arch/x86/guest/instr_emul.c
View File

@ -784,7 +784,7 @@ static int32_t emulate_mov(struct acrn_vcpu *vcpu, const struct instr_emul_vie *
* REX.W + C7/0 mov r/m64, imm32 * REX.W + C7/0 mov r/m64, imm32
* (sign-extended to 64-bits) * (sign-extended to 64-bits)
*/ */
val = (uint64_t)vie->immediate & size2mask[size]; val = (uint64_t)(vie->immediate) & size2mask[size];
vie_mmio_write(vcpu, val); vie_mmio_write(vcpu, val);
break; break;
default: default:
@ -1546,7 +1546,7 @@ static int32_t emulate_bittest(struct acrn_vcpu *vcpu, const struct instr_emul_v
* "Range of Bit Positions Specified by Bit Offset Operands" * "Range of Bit Positions Specified by Bit Offset Operands"
*/ */
bitmask = ((uint64_t)vie->opsize * 8UL) - 1UL; bitmask = ((uint64_t)vie->opsize * 8UL) - 1UL;
bitoff = (uint64_t)vie->immediate & bitmask; bitoff = (uint64_t)(vie->immediate) & bitmask;
/* Copy the bit into the Carry flag in %rflags */ /* Copy the bit into the Carry flag in %rflags */
if ((val & (1UL << bitoff)) != 0U) { if ((val & (1UL << bitoff)) != 0U) {