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HV: treewide: fix violations of coding guideline C-TY-12

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The coding guideline rule C-TY-12 requires that 'all type conversions shall
be explicit'. Especially implicit cases on the signedness of variables
shall be avoided.

This patch either adds explicit type casts or adjust local variable types
to make sure that Booleans, signed and unsigned integers are not used
mixedly.

This patch has no semantic changes.

Tracked-On: #6776
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Junjie Mao
2021-10-29 14:58:39 +08:00
committed by wenlingz
parent db20e277b6
commit 9781873e77
10 changed files with 14 additions and 16 deletions
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4
hypervisor/arch/x86/cpu_caps.c
View File

@@ -189,7 +189,7 @@ bool is_ac_enabled(void)
{
bool ac_enabled = false;
if (has_core_cap(CORE_CAP_SPLIT_LOCK) && (msr_read(MSR_TEST_CTL) & MSR_TEST_CTL_AC_SPLITLOCK)) {
if (has_core_cap(CORE_CAP_SPLIT_LOCK) && ((msr_read(MSR_TEST_CTL) & MSR_TEST_CTL_AC_SPLITLOCK) != 0UL)) {
ac_enabled = true;
}
@@ -200,7 +200,7 @@ bool is_gp_enabled(void)
{
bool gp_enabled = false;
if (has_core_cap(CORE_CAP_UC_LOCK) && (msr_read(MSR_TEST_CTL) & MSR_TEST_CTL_GP_UCLOCK)) {
if (has_core_cap(CORE_CAP_UC_LOCK) && ((msr_read(MSR_TEST_CTL) & MSR_TEST_CTL_GP_UCLOCK) != 0UL)) {
gp_enabled = true;
}

2
hypervisor/arch/x86/cpu_state_tbl.c
View File

@@ -133,7 +133,7 @@ static struct cpu_state_info cpu_pm_state_info;
static int32_t get_state_tbl_idx(const char *cpuname)
{
int32_t i;
int32_t count = ARRAY_SIZE(cpu_state_tbl);
int32_t count = (int32_t)ARRAY_SIZE(cpu_state_tbl);
int32_t ret = -1;
if (cpuname != NULL) {

2
hypervisor/arch/x86/guest/guest_memory.c
View File

@@ -198,7 +198,7 @@ static int32_t local_gva2gpa_common(struct acrn_vcpu *vcpu, const struct page_wa
static int32_t local_gva2gpa_pae(struct acrn_vcpu *vcpu, struct page_walk_info *pw_info,
uint64_t gva, uint64_t *gpa, uint32_t *err_code)
{
int32_t index;
uint32_t index;
uint64_t *base;
uint64_t entry;
uint64_t addr;

2
hypervisor/arch/x86/guest/pm.c
View File

@@ -290,7 +290,7 @@ static bool rt_vm_pm1a_io_write(struct acrn_vcpu *vcpu, uint16_t addr, size_t wi
if (width != 2U) {
pr_dbg("Invalid address (0x%x) or width (0x%x)", addr, width);
} else {
if ((((v & VIRTUAL_PM1A_SLP_EN) != 0U) && (((v & VIRTUAL_PM1A_SLP_TYP) >> 10U) == 5U)) != 0U) {
if (((v & VIRTUAL_PM1A_SLP_EN) != 0U) && (((v & VIRTUAL_PM1A_SLP_TYP) >> 10U) == 5U)) {
poweroff_if_rt_vm(vcpu->vm);
}
}

4
hypervisor/arch/x86/trampoline.c
View File

@@ -63,7 +63,7 @@ static void update_trampoline_code_refs(uint64_t dest_pa)
{
void *ptr;
uint64_t val;
int32_t i;
uint32_t i;
/*
* calculate the fixup CS:IP according to fixup target address
@@ -88,7 +88,7 @@ static void update_trampoline_code_refs(uint64_t dest_pa)
*(uint64_t *)(ptr) += dest_pa;
ptr = hpa2hva(dest_pa + trampoline_relo_addr(&trampoline_pdpt_addr));
for (i = 0; i < 4; i++) {
for (i = 0U; i < 4U; i++) {
*(uint64_t *)(ptr + sizeof(uint64_t) * i) += dest_pa;
}