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hv: pgtable: fix 'Use of function like macro'

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Convert HPA2HVA, HVA2HPA, GPA2HVA and HVA2GPA to inline functions.

v1 -> v2:
 * Modify the following statement.
   rsdp = biosacpi_search_rsdp((char *)hpa2hva((uint64_t)(*addr << 4)),
                                                                0x400);
   Instead of "(uint64_t)(*addr << 4)", "(uint64_t)(*addr) << 4U" would
   be clearer.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Shiqing Gao
2018-09-06 13:50:10 +08:00
committed by lijinxia
parent 6ee9321bd8
commit 97aeb7f4ff
24 changed files with 142 additions and 116 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
hypervisor/arch/x86/guest/guest.c
View File

@@ -92,7 +92,7 @@ static int local_gva2gpa_common(struct vcpu *vcpu, struct page_walk_info *pw_inf
i--;
addr = addr & IA32E_REF_MASK;
base = GPA2HVA(vcpu->vm, addr);
base = gpa2hva(vcpu->vm, addr);
if (base == NULL) {
ret = -EFAULT;
goto out;
@@ -166,7 +166,7 @@ static int local_gva2gpa_pae(struct vcpu *vcpu, struct page_walk_info *pw_info,
int ret;
addr = pw_info->top_entry & 0xFFFFFFF0U;
base = GPA2HVA(vcpu->vm, addr);
base = gpa2hva(vcpu->vm, addr);
if (base == NULL) {
ret = -EFAULT;
goto out;
@@ -283,7 +283,7 @@ static inline uint32_t local_copy_gpa(const struct vm *vm, void *h_ptr, uint64_t
len = (size > (pg_size - offset_in_pg)) ?
(pg_size - offset_in_pg) : size;
g_ptr = HPA2HVA(hpa);
g_ptr = hpa2hva(hpa);
if (cp_from_vm) {
(void)memcpy_s(h_ptr, len, g_ptr, len);
@@ -399,13 +399,13 @@ void init_e820(void)
if (boot_regs[0] == MULTIBOOT_INFO_MAGIC) {
struct multiboot_info *mbi = (struct multiboot_info *)
(HPA2HVA((uint64_t)boot_regs[1]));
(hpa2hva((uint64_t)boot_regs[1]));
pr_info("Multiboot info detected\n");
if ((mbi->mi_flags & MULTIBOOT_INFO_HAS_MMAP) != 0U) {
struct multiboot_mmap *mmap =
(struct multiboot_mmap *)
HPA2HVA((uint64_t)mbi->mi_mmap_addr);
hpa2hva((uint64_t)mbi->mi_mmap_addr);
e820_entries = mbi->mi_mmap_length/
sizeof(struct multiboot_mmap);
if (e820_entries > E820_MAX_ENTRIES) {
@@ -671,7 +671,7 @@ static const uint64_t guest_init_gdt[] = {
uint64_t create_guest_init_gdt(struct vm *vm, uint32_t *limit)
{
void *gtd_addr = GPA2HVA(vm, GUEST_INIT_GDT_START);
void *gtd_addr = gpa2hva(vm, GUEST_INIT_GDT_START);
*limit = sizeof(guest_init_gdt) - 1U;
(void)memcpy_s(gtd_addr, 64U, guest_init_gdt, sizeof(guest_init_gdt));

2
hypervisor/arch/x86/guest/mptable.c
View File

@@ -301,7 +301,7 @@ int mptable_build(struct vm *vm)
struct mpfps *mpfp;
size_t mptable_length, table_length;
startaddr = (char *)GPA2HVA(vm, MPTABLE_BASE);
startaddr = (char *)gpa2hva(vm, MPTABLE_BASE);
table_length = vm->vm_desc->mptable->mpch.base_table_length;
mptable_length = sizeof(struct mpfps) + table_length;

4
hypervisor/arch/x86/guest/vlapic.c
View File

@@ -2096,7 +2096,7 @@ vlapic_apicv_get_apic_access_addr(__unused struct vm *vm)
(void)memset((void *)apicv_apic_access_addr, 0U, CPU_PAGE_SIZE);
}
return HVA2HPA(apicv_apic_access_addr);
return hva2hpa(apicv_apic_access_addr);
}
/**
@@ -2105,7 +2105,7 @@ vlapic_apicv_get_apic_access_addr(__unused struct vm *vm)
uint64_t
vlapic_apicv_get_apic_page_addr(struct acrn_vlapic *vlapic)
{
return HVA2HPA(&(vlapic->apic_page));
return hva2hpa(&(vlapic->apic_page));
}
/*

2
hypervisor/arch/x86/guest/vmsr.c
View File

@@ -102,7 +102,7 @@ void init_msr_emulation(struct vcpu *vcpu)
}
/* Set up MSR bitmap - pg 2904 24.6.9 */
value64 = HVA2HPA(vcpu->vm->arch_vm.msr_bitmap);
value64 = hva2hpa(vcpu->vm->arch_vm.msr_bitmap);
exec_vmwrite64(VMX_MSR_BITMAP_FULL, value64);
pr_dbg("VMX_MSR_BITMAP: 0x%016llx ", value64);
}

2
hypervisor/arch/x86/ioapic.c
View File

@@ -86,7 +86,7 @@ static void *map_ioapic(uint64_t ioapic_paddr)
/* At some point we may need to translate this paddr to a vaddr.
* 1:1 mapping for now.
*/
return HPA2HVA(ioapic_paddr);
return hpa2hva(ioapic_paddr);
}
static inline uint32_t

2
hypervisor/arch/x86/lapic.c
View File

@@ -177,7 +177,7 @@ static void map_lapic(void)
/* At some point we may need to translate this paddr to a vaddr. 1:1
* mapping for now.
*/
lapic_info.xapic.vaddr = HPA2HVA(lapic_info.xapic.paddr);
lapic_info.xapic.vaddr = hpa2hva(lapic_info.xapic.paddr);
}
void early_init_lapic(void)

8
hypervisor/arch/x86/mmu.c
View File

@@ -172,11 +172,11 @@ void invept(struct vcpu *vcpu)
struct invept_desc desc = {0};
if (cpu_has_vmx_ept_cap(VMX_EPT_INVEPT_SINGLE_CONTEXT)) {
desc.eptp = HVA2HPA(vcpu->vm->arch_vm.nworld_eptp) |
desc.eptp = hva2hpa(vcpu->vm->arch_vm.nworld_eptp) |
(3UL << 3U) | 6UL;
local_invept(INVEPT_TYPE_SINGLE_CONTEXT, desc);
if (vcpu->vm->sworld_control.flag.active != 0UL) {
desc.eptp = HVA2HPA(vcpu->vm->arch_vm.sworld_eptp)
desc.eptp = hva2hpa(vcpu->vm->arch_vm.sworld_eptp)
| (3UL << 3U) | 6UL;
local_invept(INVEPT_TYPE_SINGLE_CONTEXT, desc);
}
@@ -190,7 +190,7 @@ void invept(struct vcpu *vcpu)
uint64_t get_paging_pml4(void)
{
/* Return address to caller */
return HVA2HPA(mmu_pml4_addr);
return hva2hpa(mmu_pml4_addr);
}
void enable_paging(uint64_t pml4_base_addr)
@@ -254,7 +254,7 @@ void init_paging(void)
PTT_PRIMARY, MR_MODIFY);
/* Enable paging */
enable_paging(HVA2HPA(mmu_pml4_addr));
enable_paging(hva2hpa(mmu_pml4_addr));
}
void *alloc_paging_struct(void)

4
hypervisor/arch/x86/pagetable.c
View File

@@ -49,7 +49,7 @@ static int split_large_page(uint64_t *pte,
}
ref_prot = (ptt == PTT_PRIMARY) ? PAGE_TABLE : EPT_RWX;
set_pgentry(pte, HVA2HPA((void *)pbase) | ref_prot);
set_pgentry(pte, hva2hpa((void *)pbase) | ref_prot);
/* TODO: flush the TLB */
@@ -81,7 +81,7 @@ static inline int construct_pgentry(enum _page_table_type ptt, uint64_t *pde)
}
prot = (ptt == PTT_PRIMARY) ? PAGE_TABLE: EPT_RWX;
set_pgentry(pde, HVA2HPA(pd_page) | prot);
set_pgentry(pde, hva2hpa(pd_page) | prot);
return 0;
}

4
hypervisor/arch/x86/pm.c
View File

@@ -24,7 +24,7 @@ static void acpi_gas_write(struct acpi_generic_address *gas, uint32_t val)
uint16_t val16 = (uint16_t)val;
if (gas->space_id == SPACE_SYSTEM_MEMORY)
mmio_write16(val16, HPA2HVA(gas->address));
mmio_write16(val16, hpa2hva(gas->address));
else
pio_write16(val16, (uint16_t)gas->address);
}
@@ -34,7 +34,7 @@ static uint32_t acpi_gas_read(struct acpi_generic_address *gas)
uint32_t ret = 0U;
if (gas->space_id == SPACE_SYSTEM_MEMORY)
ret = mmio_read16(HPA2HVA(gas->address));
ret = mmio_read16(hpa2hva(gas->address));
else
ret = pio_read16((uint16_t)gas->address);

16
hypervisor/arch/x86/trusty.c
View File

@@ -105,7 +105,7 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
* of gpa_rebased to gpa_rebased + size
*/
sub_table_addr = alloc_paging_struct();
sworld_pml4e = HVA2HPA(sub_table_addr) | table_present;
sworld_pml4e = hva2hpa(sub_table_addr) | table_present;
set_pgentry((uint64_t *)pml4_base, sworld_pml4e);
nworld_pml4e = get_pgentry((uint64_t *)vm->arch_vm.nworld_eptp);
@@ -160,7 +160,7 @@ void destroy_secure_world(struct vm *vm, bool need_clr_mem)
}
if (need_clr_mem) {
/* clear trusty memory space */
(void)memset(HPA2HVA(hpa), 0U, size);
(void)memset(hpa2hva(hpa), 0U, size);
}
/* restore memory to SOS ept mapping */
@@ -316,12 +316,12 @@ void switch_world(struct vcpu *vcpu, int next_world)
/* load EPTP for next world */
if (next_world == NORMAL_WORLD) {
exec_vmwrite64(VMX_EPT_POINTER_FULL,
HVA2HPA(vcpu->vm->arch_vm.nworld_eptp) |
(3UL<<3) | 6UL);
hva2hpa(vcpu->vm->arch_vm.nworld_eptp) |
(3UL << 3) | 6UL);
} else {
exec_vmwrite64(VMX_EPT_POINTER_FULL,
HVA2HPA(vcpu->vm->arch_vm.sworld_eptp) |
(3UL<<3) | 6UL);
hva2hpa(vcpu->vm->arch_vm.sworld_eptp) |
(3UL << 3) | 6UL);
}
/* Update world index */
@@ -338,7 +338,7 @@ static bool setup_trusty_info(struct vcpu *vcpu,
struct trusty_mem *mem;
struct trusty_key_info *key_info;
mem = (struct trusty_mem *)(HPA2HVA(mem_base_hpa));
mem = (struct trusty_mem *)(hpa2hva(mem_base_hpa));
/* copy key_info to the first page of trusty memory */
(void)memcpy_s(&mem->first_page.data.key_info, sizeof(g_key_info),
@@ -442,7 +442,7 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
trusty_base_hpa = vm->sworld_control.sworld_memory.base_hpa;
exec_vmwrite64(VMX_EPT_POINTER_FULL,
HVA2HPA(vm->arch_vm.sworld_eptp) | (3UL<<3) | 6UL);
hva2hpa(vm->arch_vm.sworld_eptp) | (3UL << 3) | 6UL);
/* save Normal World context */
save_world_ctx(vcpu, &vcpu->arch_vcpu.contexts[NORMAL_WORLD].ext_ctx);

11
hypervisor/arch/x86/virq.c
View File

@@ -181,11 +181,12 @@ void dump_lapic(void)
{
dev_dbg(ACRN_DBG_INTR,
"LAPIC: TIME %08x, init=0x%x cur=0x%x ISR=0x%x IRR=0x%x",
mmio_read32(HPA2HVA(LAPIC_BASE + LAPIC_LVT_TIMER_REGISTER)),
mmio_read32(HPA2HVA(LAPIC_BASE + LAPIC_INITIAL_COUNT_REGISTER)),
mmio_read32(HPA2HVA(LAPIC_BASE + LAPIC_CURRENT_COUNT_REGISTER)),
mmio_read32(HPA2HVA(LAPIC_BASE + LAPIC_IN_SERVICE_REGISTER_7)),
mmio_read32(HPA2HVA(LAPIC_BASE + LAPIC_INT_REQUEST_REGISTER_7)));
mmio_read32(hpa2hva(LAPIC_BASE + LAPIC_LVT_TIMER_REGISTER)),
mmio_read32(hpa2hva(LAPIC_BASE + LAPIC_INITIAL_COUNT_REGISTER)),
mmio_read32(hpa2hva(LAPIC_BASE + LAPIC_CURRENT_COUNT_REGISTER)),
mmio_read32(hpa2hva(LAPIC_BASE + LAPIC_IN_SERVICE_REGISTER_7)),
mmio_read32(hpa2hva(LAPIC_BASE + LAPIC_INT_REQUEST_REGISTER_7))
);
}
/* SDM Vol3 -6.15, Table 6-4 - interrupt and exception classes */

14
hypervisor/arch/x86/vmx.c
View File

@@ -96,11 +96,11 @@ void exec_vmxon_instr(uint16_t pcpu_id)
CPU_CR_WRITE(cr4, tmp64 | CR4_VMXE);
/* Turn ON VMX */
vmxon_region_pa = HVA2HPA(vmxon_region_va);
vmxon_region_pa = hva2hpa(vmxon_region_va);
exec_vmxon(&vmxon_region_pa);
if (vcpu != NULL) {
vmcs_pa = HVA2HPA(vcpu->arch_vcpu.vmcs);
vmcs_pa = hva2hpa(vcpu->arch_vcpu.vmcs);
exec_vmptrld(&vmcs_pa);
}
}
@@ -112,7 +112,7 @@ void vmx_off(uint16_t pcpu_id)
uint64_t vmcs_pa;
if (vcpu != NULL) {
vmcs_pa = HVA2HPA(vcpu->arch_vcpu.vmcs);
vmcs_pa = hva2hpa(vcpu->arch_vcpu.vmcs);
exec_vmclear((void *)&vmcs_pa);
}
@@ -991,7 +991,7 @@ static void init_exec_ctrl(struct vcpu *vcpu)
* TODO: introduce API to make this data driven based
* on VMX_EPT_VPID_CAP
*/
value64 = HVA2HPA(vm->arch_vm.nworld_eptp) | (3UL << 3U) | 6UL;
value64 = hva2hpa(vm->arch_vm.nworld_eptp) | (3UL << 3U) | 6UL;
exec_vmwrite64(VMX_EPT_POINTER_FULL, value64);
pr_dbg("VMX_EPT_POINTER: 0x%016llx ", value64);
@@ -1022,10 +1022,10 @@ static void init_exec_ctrl(struct vcpu *vcpu)
exec_vmwrite32(VMX_CR3_TARGET_COUNT, 0U);
/* Set up IO bitmap register A and B - pg 2902 24.6.4 */
value64 = HVA2HPA(vm->arch_vm.iobitmap[0]);
value64 = hva2hpa(vm->arch_vm.iobitmap[0]);
exec_vmwrite64(VMX_IO_BITMAP_A_FULL, value64);
pr_dbg("VMX_IO_BITMAP_A: 0x%016llx ", value64);
value64 = HVA2HPA(vm->arch_vm.iobitmap[1]);
value64 = hva2hpa(vm->arch_vm.iobitmap[1]);
exec_vmwrite64(VMX_IO_BITMAP_B_FULL, value64);
pr_dbg("VMX_IO_BITMAP_B: 0x%016llx ", value64);
@@ -1149,7 +1149,7 @@ void init_vmcs(struct vcpu *vcpu)
(void)memcpy_s(vcpu->arch_vcpu.vmcs, 4U, (void *)&vmx_rev_id, 4U);
/* Execute VMCLEAR on current VMCS */
vmcs_pa = HVA2HPA(vcpu->arch_vcpu.vmcs);
vmcs_pa = hva2hpa(vcpu->arch_vcpu.vmcs);
exec_vmclear((void *)&vmcs_pa);
/* Load VMCS pointer */

32
hypervisor/arch/x86/vtd.c
View File

@@ -178,16 +178,17 @@ static void register_hrhd_units(void)
static uint32_t iommu_read32(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
{
return mmio_read32(HPA2HVA(dmar_uint->drhd->reg_base_addr + offset));
return mmio_read32(hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
}
static uint64_t iommu_read64(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
{
uint64_t value;
value = mmio_read32(HPA2HVA(dmar_uint->drhd->reg_base_addr + offset + 4U));
value = mmio_read32(hpa2hva(dmar_uint->drhd->reg_base_addr + offset +
4U));
value = value << 32U;
value = value | mmio_read32(HPA2HVA(dmar_uint->drhd->reg_base_addr +
value = value | mmio_read32(hpa2hva(dmar_uint->drhd->reg_base_addr +
offset));
return value;
@@ -196,7 +197,7 @@ static uint64_t iommu_read64(struct dmar_drhd_rt *dmar_uint, uint32_t offset)
static void iommu_write32(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint32_t value)
{
mmio_write32(value, HPA2HVA(dmar_uint->drhd->reg_base_addr + offset));
mmio_write32(value, hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
}
static void iommu_write64(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
@@ -205,10 +206,11 @@ static void iommu_write64(struct dmar_drhd_rt *dmar_uint, uint32_t offset,
uint32_t temp;
temp = (uint32_t)value;
mmio_write32(temp, HPA2HVA(dmar_uint->drhd->reg_base_addr + offset));
mmio_write32(temp, hpa2hva(dmar_uint->drhd->reg_base_addr + offset));
temp = (uint32_t)(value >> 32U);
mmio_write32(temp, HPA2HVA(dmar_uint->drhd->reg_base_addr + offset + 4U));
mmio_write32(temp,
hpa2hva(dmar_uint->drhd->reg_base_addr + offset + 4U));
}
static inline void
@@ -976,14 +978,15 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
void *root_table_vaddr = alloc_paging_struct();
if (root_table_vaddr != NULL) {
dmar_uint->root_table_addr = HVA2HPA(root_table_vaddr);
dmar_uint->root_table_addr = hva2hpa(root_table_vaddr);
} else {
ASSERT(false, "failed to allocate root table!");
return 1;
}
}
root_table = (struct dmar_root_entry *)HPA2HVA(dmar_uint->root_table_addr);
root_table =
(struct dmar_root_entry *)hpa2hva(dmar_uint->root_table_addr);
root_entry = root_table + bus;
@@ -994,7 +997,7 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
if (vaddr != NULL) {
/* create context table for the bus if not present */
context_table_addr = HVA2HPA(vaddr);
context_table_addr = hva2hpa(vaddr);
context_table_addr = context_table_addr >> 12;
@@ -1022,7 +1025,8 @@ static int add_iommu_device(struct iommu_domain *domain, uint16_t segment,
context_table_addr = context_table_addr << 12;
context_table = (struct dmar_context_entry *)HPA2HVA(context_table_addr);
context_table =
(struct dmar_context_entry *)hpa2hva(context_table_addr);
context_entry = context_table + devfun;
/* the context entry should not be present */
@@ -1114,14 +1118,16 @@ remove_iommu_device(struct iommu_domain *domain, uint16_t segment,
return 1;
}
root_table = (struct dmar_root_entry *)HPA2HVA(dmar_uint->root_table_addr);
root_table =
(struct dmar_root_entry *)hpa2hva(dmar_uint->root_table_addr);
root_entry = root_table + bus;
context_table_addr = dmar_get_bitslice(root_entry->lower,
ROOT_ENTRY_LOWER_CTP_MASK,
ROOT_ENTRY_LOWER_CTP_POS);
context_table_addr = context_table_addr << 12;
context_table = (struct dmar_context_entry *)HPA2HVA(context_table_addr);
context_table =
(struct dmar_context_entry *)hpa2hva(context_table_addr);
context_entry = context_table + devfun;
@@ -1303,7 +1309,7 @@ void init_iommu_vm0_domain(struct vm *vm0)
uint16_t devfun;
vm0->iommu = create_iommu_domain(vm0->vm_id,
HVA2HPA(vm0->arch_vm.nworld_eptp), 48U);
hva2hpa(vm0->arch_vm.nworld_eptp), 48U);
vm0_domain = (struct iommu_domain *) vm0->iommu;