From 97c9b240303602141fa116d5f315c62b6958b5fa Mon Sep 17 00:00:00 2001 From: "Xie, nanlin" Date: Sat, 23 Jan 2021 07:24:06 +0800 Subject: [PATCH] acrn-config: Reorg config tool folder Remove vm_configs folder and move all the XML files and generic code example into config_tools/data Tracked-On: #5644 Signed-off-by: Xie, nanlin --- CODEOWNERS | 13 +- Makefile | 4 +- devicemodel/samples | 2 +- doc/develop.rst | 6 +- hypervisor/Makefile | 2 +- hypervisor/scripts/genconf.sh | 2 +- hypervisor/scripts/makefile/cfg_update.mk | 6 +- hypervisor/scripts/makefile/config.mk | 10 +- hypervisor/scripts/makefile/kconfig.mk | 2 +- misc/acrn-config/xmls | 1 - misc/{acrn-config => config_tools}/README | 0 .../acpi_gen/__init__.py | 0 .../acpi_gen/acpi_const.py | 4 +- .../acpi_gen/asl_gen.py | 0 .../acpi_gen/bin_gen.py | 4 +- .../acpi_template}/template/apic.asl | 0 .../acpi_template}/template/dsdt.asl | 0 .../acpi_template}/template/dsdt_tpm2.asl | 0 .../acpi_template}/template/dsdt_tsn_otn1.asl | 0 .../acpi_template}/template/facp.asl | 0 .../acpi_template}/template/mcfg.asl | 0 .../acpi_template}/template/rsdp.asl | 0 .../acpi_template}/template/tpm2.asl | 0 .../acpi_template}/template/xsdt.asl | 0 .../acpi_template}/tgl-rvp/PTCT | Bin .../board_config/README | 0 .../board_config/acpi_platform_h.py | 0 .../board_config/board_c.py | 0 .../board_config/board_cfg_gen.py | 2 +- .../board_config/board_info_h.py | 0 .../board_config/misc_cfg_h.py | 0 .../board_config/pci_devices_h.py | 0 .../board_config/vbar_base_h.py | 0 .../config_app/app.py | 0 .../config_app/configs.py | 0 .../config_app/controller.py | 0 .../config_app/requirements | 0 .../config_app/static/main.js | 0 .../config_app/static/styles.css | 0 .../config_app/templates/base.html | 0 .../config_app/templates/launch.html | 0 .../config_app/templates/scenario.html | 0 .../config_app/views.py | 0 .../data/apl-mrb}/apl-mrb.xml | 0 .../data}/apl-mrb/hybrid.xml | 0 .../data}/apl-mrb/industry.xml | 0 .../data}/apl-mrb/logical_partition.xml | 0 .../data}/apl-mrb/sdc.xml | 0 .../data}/apl-mrb/sdc_launch_1uos_aaag.xml | 0 .../data}/apl-mrb/sdc_launch_1uos_aliaag.xml | 0 .../data}/apl-mrb/sdc_launch_1uos_laag.xml | 0 .../data/apl-up2-n3350}/apl-up2-n3350.xml | 0 .../data}/apl-up2-n3350/logical_partition.xml | 0 .../apl-up2-n3350/sdc_launch_1uos_laag.xml | 0 .../data/apl-up2}/apl-up2.xml | 0 .../data}/apl-up2/hybrid.xml | 0 .../data}/apl-up2/industry.xml | 0 .../data}/apl-up2/logical_partition.xml | 0 .../data}/apl-up2/sdc.xml | 0 .../data}/apl-up2/sdc_launch_1uos_aaag.xml | 0 .../data}/apl-up2/sdc_launch_1uos_laag.xml | 0 .../data/cfl-k700-i7}/cfl-k700-i7.xml | 0 .../data}/cfl-k700-i7/hybrid_rt.xml | 0 .../data}/cfl-k700-i7/industry.xml | 0 .../data/ehl-crb-b}/ehl-crb-b.xml | 0 .../data}/ehl-crb-b/hybrid.xml | 0 .../data}/ehl-crb-b/hybrid_rt.xml | 0 .../data}/ehl-crb-b/hybrid_rt_fusa.xml | 0 .../ehl-crb-b/hybrid_rt_launch_1uos_waag.xml | 0 .../data}/ehl-crb-b/industry.xml | 0 .../ehl-crb-b/industry_launch_1uos_hardrt.xml | 0 .../industry_launch_1uos_vxworks.xml | 0 .../ehl-crb-b/industry_launch_1uos_waag.xml | 0 .../data}/ehl-crb-b/industry_launch_2uos.xml | 0 .../data}/ehl-crb-b/industry_launch_6uos.xml | 0 .../data}/ehl-crb-b/logical_partition.xml | 0 .../data}/ehl-crb-b/sdc.xml | 0 .../data}/ehl-crb-b/sdc_launch_1uos_laag.xml | 0 .../ehl-crb-b/sdc_launch_1uos_zephyr.xml | 0 misc/config_tools/data/generic/generic.xml | 425 ++++++++++++++++++ misc/config_tools/data/generic/hybrid.xml | 225 ++++++++++ misc/config_tools/data/generic/hybrid_rt.xml | 261 +++++++++++ misc/config_tools/data/generic/industry.xml | 384 ++++++++++++++++ .../data}/generic/industry_launch_2uos.xml | 27 +- .../data/generic/logical_partition.xml | 194 ++++++++ .../data}/nuc6cayh/hybrid.xml | 0 .../data}/nuc6cayh/industry.xml | 0 .../nuc6cayh/industry_launch_1uos_hardrt.xml | 0 .../nuc6cayh/industry_launch_1uos_vxworks.xml | 0 .../nuc6cayh/industry_launch_1uos_waag.xml | 0 .../data}/nuc6cayh/industry_launch_2uos.xml | 0 .../data}/nuc6cayh/industry_launch_6uos.xml | 0 .../data}/nuc6cayh/logical_partition.xml | 0 .../data/nuc6cayh}/nuc6cayh.xml | 0 .../data}/nuc6cayh/sdc.xml | 0 .../data}/nuc6cayh/sdc_launch_1uos_laag.xml | 0 .../data}/nuc6cayh/sdc_launch_1uos_zephyr.xml | 0 .../data}/nuc7i7dnb/hybrid.xml | 0 .../nuc7i7dnb/hybrid_rt_launch_1uos_waag.xml | 0 .../data}/nuc7i7dnb/industry.xml | 0 .../nuc7i7dnb/industry_launch_1uos_hardrt.xml | 0 .../industry_launch_1uos_vxworks.xml | 0 .../nuc7i7dnb/industry_launch_1uos_waag.xml | 0 .../data}/nuc7i7dnb/industry_launch_2uos.xml | 0 .../data}/nuc7i7dnb/industry_launch_6uos.xml | 0 .../data}/nuc7i7dnb/logical_partition.xml | 0 .../data/nuc7i7dnb}/nuc7i7dnb.xml | 0 .../data}/nuc7i7dnb/sdc.xml | 0 .../data}/nuc7i7dnb/sdc_launch_1uos_laag.xml | 0 .../nuc7i7dnb/sdc_launch_1uos_zephyr.xml | 0 .../data/qemu}/qemu.xml | 0 .../data}/qemu/sdc.xml | 0 .../apl-mrb/acrn_guest.service | 0 .../apl-mrb/launch_uos.args | 0 .../apl-mrb/launch_uos.sh | 0 .../sample_launch_scripts/apl-mrb/runC.json | 0 .../apl-up2/launch_uos.sh | 0 .../sample_launch_scripts/launch_ubuntu.sh | 0 .../nuc/launch_hard_rt_vm.sh | 0 .../sample_launch_scripts/nuc/launch_uos.sh | 0 .../nuc/launch_vxworks.sh | 0 .../sample_launch_scripts/nuc/launch_win.sh | 0 .../nuc/launch_xenomai.sh | 0 .../nuc/launch_zephyr.sh | 0 .../data}/sample_launch_scripts/nuc/runC.json | 0 .../data}/tgl-rvp/hybrid.xml | 0 .../data}/tgl-rvp/hybrid_rt.xml | 0 .../tgl-rvp/hybrid_rt_launch_1uos_waag.xml | 0 .../data}/tgl-rvp/industry.xml | 0 .../tgl-rvp/industry_launch_1uos_waag.xml | 0 .../data}/tgl-rvp/industry_launch_2uos.xml | 0 .../data}/tgl-rvp/logical_partition.xml | 0 .../data}/tgl-rvp/sdc.xml | 0 .../data}/tgl-rvp/sdc_launch_1uos_laag.xml | 0 .../data}/tgl-rvp/sdc_launch_1uos_zephyr.xml | 0 .../data/tgl-rvp}/tgl-rvp.xml | 0 .../data}/whl-ipc-i5/hybrid.xml | 0 .../data}/whl-ipc-i5/hybrid_rt.xml | 0 .../whl-ipc-i5/hybrid_rt_launch_1uos_waag.xml | 0 .../data}/whl-ipc-i5/industry.xml | 0 .../industry_launch_1uos_hardrt.xml | 0 .../industry_launch_1uos_vxworks.xml | 0 .../whl-ipc-i5/industry_launch_1uos_waag.xml | 0 .../data}/whl-ipc-i5/industry_launch_2uos.xml | 0 .../data}/whl-ipc-i5/industry_launch_6uos.xml | 0 .../data}/whl-ipc-i5/logical_partition.xml | 0 .../data}/whl-ipc-i5/sdc.xml | 0 .../data}/whl-ipc-i5/sdc_launch_1uos_laag.xml | 0 .../whl-ipc-i5/sdc_launch_1uos_zephyr.xml | 0 .../data/whl-ipc-i5}/whl-ipc-i5.xml | 0 .../data}/whl-ipc-i7/hybrid.xml | 0 .../data}/whl-ipc-i7/hybrid_rt.xml | 0 .../whl-ipc-i7/hybrid_rt_launch_1uos_waag.xml | 0 .../data}/whl-ipc-i7/industry.xml | 0 .../industry_launch_1uos_hardrt.xml | 0 .../industry_launch_1uos_vxworks.xml | 0 .../whl-ipc-i7/industry_launch_1uos_waag.xml | 0 .../data}/whl-ipc-i7/industry_launch_2uos.xml | 0 .../data}/whl-ipc-i7/industry_launch_6uos.xml | 0 .../data}/whl-ipc-i7/logical_partition.xml | 0 .../data}/whl-ipc-i7/sdc.xml | 0 .../data}/whl-ipc-i7/sdc_launch_1uos_laag.xml | 0 .../whl-ipc-i7/sdc_launch_1uos_zephyr.xml | 0 .../data/whl-ipc-i7}/whl-ipc-i7.xml | 0 .../hv_config/board_defconfig.py | 0 .../hv_config/hv_item.py | 0 .../kconfig/LICENSE.kconfiglib | 0 .../kconfig/defconfig.py | 0 .../kconfig/generate_header.py | 0 .../kconfig/savedefconfig.py | 0 .../kconfig/silentoldconfig.py | 0 .../launch_config/README | 0 .../launch_config/com.py | 0 .../launch_config/launch_cfg_gen.py | 2 +- .../launch_config/launch_item.py | 0 .../launch_config/pt.py | 0 .../library/board_cfg_lib.py | 0 .../library/common.py | 2 +- .../library/hv_cfg_lib.py | 0 .../library/hypervisor_license | 0 .../library/launch_cfg_lib.py | 0 .../library/scenario_cfg_lib.py | 0 .../scenario_config/README | 0 .../scenario_config/ivshmem_cfg_h.py | 0 .../scenario_config/pci_dev_c.py | 0 .../scenario_config/pt_intx_c.py | 0 .../scenario_config/scenario_cfg_gen.py | 2 +- .../scenario_config/scenario_item.py | 0 .../scenario_config/vm_configurations_c.py | 0 .../scenario_config/vm_configurations_h.py | 0 .../static_allocators/hv_ram.py | 0 .../static_allocators/main.py | 0 .../target/README | 0 .../target/acpi.py | 0 .../target/board_parser.py | 0 .../target/clos.py | 0 .../target/dmar.py | 0 .../target/dmi.py | 0 .../target/misc.py | 0 .../target/parser_lib.py | 0 .../target/pci_dev.py | 0 .../xforms/config.h.xsl | 0 .../xforms/config.mk.xsl | 0 .../xforms/config_common.xsl | 0 misc/vm_configs/boards/cfl-k700-i7/board.c | 108 ----- .../boards/cfl-k700-i7/board_info.h | 18 - .../boards/cfl-k700-i7/pci_devices.h | 95 ---- .../boards/cfl-k700-i7/platform_acpi_info.h | 77 ---- misc/vm_configs/boards/ehl-crb-b/board.c | 137 ------ misc/vm_configs/boards/ehl-crb-b/board_info.h | 21 - .../vm_configs/boards/ehl-crb-b/pci_devices.h | 92 ---- .../boards/ehl-crb-b/platform_acpi_info.h | 90 ---- misc/vm_configs/boards/nuc7i7dnb/board.c | 112 ----- misc/vm_configs/boards/nuc7i7dnb/board_info.h | 18 - .../vm_configs/boards/nuc7i7dnb/pci_devices.h | 61 --- .../boards/nuc7i7dnb/platform_acpi_info.h | 73 --- misc/vm_configs/boards/whl-ipc-i5/board.c | 102 ----- .../vm_configs/boards/whl-ipc-i5/board_info.h | 18 - .../boards/whl-ipc-i5/pci_devices.h | 61 --- .../boards/whl-ipc-i5/platform_acpi_info.h | 77 ---- misc/vm_configs/boards/whl-ipc-i7/board.c | 106 ----- .../vm_configs/boards/whl-ipc-i7/board_info.h | 18 - .../boards/whl-ipc-i7/pci_devices.h | 61 --- .../boards/whl-ipc-i7/platform_acpi_info.h | 77 ---- .../scenarios/hybrid/ehl-crb-b/VM0/apic.asl | 46 -- .../scenarios/hybrid/ehl-crb-b/VM0/dsdt.asl | 21 - .../scenarios/hybrid/ehl-crb-b/VM0/facp.asl | 157 ------- .../scenarios/hybrid/ehl-crb-b/VM0/mcfg.asl | 27 -- .../scenarios/hybrid/ehl-crb-b/VM0/rsdp.asl | 16 - .../scenarios/hybrid/ehl-crb-b/VM0/xsdt.asl | 23 - .../hybrid/ehl-crb-b/ehl-crb-b.config | 38 -- .../scenarios/hybrid/ehl-crb-b/ivshmem_cfg.h | 9 - .../scenarios/hybrid/ehl-crb-b/misc_cfg.h | 82 ---- .../scenarios/hybrid/ehl-crb-b/pci_dev.c | 14 - .../scenarios/hybrid/ehl-crb-b/pt_intx.c | 10 - .../scenarios/hybrid/ehl-crb-b/vbar_base.h | 81 ---- .../scenarios/hybrid/nuc7i7dnb/VM0/apic.asl | 46 -- .../scenarios/hybrid/nuc7i7dnb/VM0/dsdt.asl | 21 - .../scenarios/hybrid/nuc7i7dnb/VM0/facp.asl | 157 ------- .../scenarios/hybrid/nuc7i7dnb/VM0/mcfg.asl | 27 -- .../scenarios/hybrid/nuc7i7dnb/VM0/rsdp.asl | 16 - .../scenarios/hybrid/nuc7i7dnb/VM0/xsdt.asl | 23 - .../scenarios/hybrid/nuc7i7dnb/ivshmem_cfg.h | 9 - .../scenarios/hybrid/nuc7i7dnb/misc_cfg.h | 62 --- .../hybrid/nuc7i7dnb/nuc7i7dnb.config | 37 -- .../scenarios/hybrid/nuc7i7dnb/pci_dev.c | 14 - .../scenarios/hybrid/nuc7i7dnb/pt_intx.c | 10 - .../scenarios/hybrid/nuc7i7dnb/vbar_base.h | 44 -- .../scenarios/hybrid/vm_configurations.c | 121 ----- .../scenarios/hybrid/vm_configurations.h | 36 -- .../scenarios/hybrid/whl-ipc-i5/VM0/apic.asl | 46 -- .../scenarios/hybrid/whl-ipc-i5/VM0/dsdt.asl | 21 - .../scenarios/hybrid/whl-ipc-i5/VM0/facp.asl | 157 ------- .../scenarios/hybrid/whl-ipc-i5/VM0/mcfg.asl | 27 -- .../scenarios/hybrid/whl-ipc-i5/VM0/rsdp.asl | 16 - .../scenarios/hybrid/whl-ipc-i5/VM0/xsdt.asl | 23 - .../scenarios/hybrid/whl-ipc-i5/ivshmem_cfg.h | 9 - .../scenarios/hybrid/whl-ipc-i5/misc_cfg.h | 67 --- .../scenarios/hybrid/whl-ipc-i5/pci_dev.c | 14 - .../scenarios/hybrid/whl-ipc-i5/pt_intx.c | 10 - .../scenarios/hybrid/whl-ipc-i5/vbar_base.h | 43 -- .../hybrid/whl-ipc-i5/whl-ipc-i5.config | 37 -- .../scenarios/hybrid/whl-ipc-i7/VM0/apic.asl | 46 -- .../scenarios/hybrid/whl-ipc-i7/VM0/dsdt.asl | 21 - .../scenarios/hybrid/whl-ipc-i7/VM0/facp.asl | 157 ------- .../scenarios/hybrid/whl-ipc-i7/VM0/mcfg.asl | 27 -- .../scenarios/hybrid/whl-ipc-i7/VM0/rsdp.asl | 16 - .../scenarios/hybrid/whl-ipc-i7/VM0/xsdt.asl | 23 - .../scenarios/hybrid/whl-ipc-i7/ivshmem_cfg.h | 9 - .../scenarios/hybrid/whl-ipc-i7/misc_cfg.h | 67 --- .../scenarios/hybrid/whl-ipc-i7/pci_dev.c | 14 - .../scenarios/hybrid/whl-ipc-i7/pt_intx.c | 10 - .../scenarios/hybrid/whl-ipc-i7/vbar_base.h | 43 -- .../hybrid/whl-ipc-i7/whl-ipc-i7.config | 37 -- .../hybrid_rt/cfl-k700-i7/VM0/apic.asl | 54 --- .../hybrid_rt/cfl-k700-i7/VM0/dsdt.asl | 32 -- .../hybrid_rt/cfl-k700-i7/VM0/facp.asl | 157 ------- .../hybrid_rt/cfl-k700-i7/VM0/mcfg.asl | 27 -- .../hybrid_rt/cfl-k700-i7/VM0/rsdp.asl | 16 - .../hybrid_rt/cfl-k700-i7/VM0/tpm2.asl | 23 - .../hybrid_rt/cfl-k700-i7/VM0/xsdt.asl | 24 - .../hybrid_rt/cfl-k700-i7/cfl-k700-i7.config | 38 -- .../hybrid_rt/cfl-k700-i7/ivshmem_cfg.h | 28 -- .../hybrid_rt/cfl-k700-i7/misc_cfg.h | 65 --- .../scenarios/hybrid_rt/cfl-k700-i7/pci_dev.c | 60 --- .../scenarios/hybrid_rt/cfl-k700-i7/pt_intx.c | 10 - .../hybrid_rt/cfl-k700-i7/vbar_base.h | 70 --- .../hybrid_rt/ehl-crb-b/VM0/apic.asl | 54 --- .../hybrid_rt/ehl-crb-b/VM0/dsdt.asl | 81 ---- .../hybrid_rt/ehl-crb-b/VM0/facp.asl | 170 ------- .../hybrid_rt/ehl-crb-b/VM0/mcfg.asl | 27 -- .../hybrid_rt/ehl-crb-b/VM0/rsdp.asl | 16 - .../hybrid_rt/ehl-crb-b/VM0/tpm2.asl | 23 - .../hybrid_rt/ehl-crb-b/VM0/xsdt.asl | 24 - .../hybrid_rt/ehl-crb-b/ehl-crb-b.config | 37 -- .../hybrid_rt/ehl-crb-b/ivshmem_cfg.h | 28 -- .../scenarios/hybrid_rt/ehl-crb-b/misc_cfg.h | 98 ---- .../scenarios/hybrid_rt/ehl-crb-b/pci_dev.c | 60 --- .../scenarios/hybrid_rt/ehl-crb-b/pt_intx.c | 10 - .../scenarios/hybrid_rt/ehl-crb-b/vbar_base.h | 86 ---- .../scenarios/hybrid_rt/vm_configurations.c | 143 ------ .../scenarios/hybrid_rt/vm_configurations.h | 36 -- .../hybrid_rt/whl-ipc-i5/VM0/apic.asl | 54 --- .../hybrid_rt/whl-ipc-i5/VM0/dsdt.asl | 32 -- .../hybrid_rt/whl-ipc-i5/VM0/facp.asl | 157 ------- .../hybrid_rt/whl-ipc-i5/VM0/mcfg.asl | 27 -- .../hybrid_rt/whl-ipc-i5/VM0/rsdp.asl | 16 - .../hybrid_rt/whl-ipc-i5/VM0/tpm2.asl | 23 - .../hybrid_rt/whl-ipc-i5/VM0/xsdt.asl | 24 - .../hybrid_rt/whl-ipc-i5/ivshmem_cfg.h | 28 -- .../scenarios/hybrid_rt/whl-ipc-i5/misc_cfg.h | 73 --- .../scenarios/hybrid_rt/whl-ipc-i5/pci_dev.c | 60 --- .../scenarios/hybrid_rt/whl-ipc-i5/pt_intx.c | 10 - .../hybrid_rt/whl-ipc-i5/vbar_base.h | 46 -- .../hybrid_rt/whl-ipc-i5/whl-ipc-i5.config | 37 -- .../hybrid_rt/whl-ipc-i7/VM0/apic.asl | 54 --- .../hybrid_rt/whl-ipc-i7/VM0/dsdt.asl | 32 -- .../hybrid_rt/whl-ipc-i7/VM0/facp.asl | 157 ------- .../hybrid_rt/whl-ipc-i7/VM0/mcfg.asl | 27 -- .../hybrid_rt/whl-ipc-i7/VM0/rsdp.asl | 16 - .../hybrid_rt/whl-ipc-i7/VM0/tpm2.asl | 23 - .../hybrid_rt/whl-ipc-i7/VM0/xsdt.asl | 24 - .../hybrid_rt/whl-ipc-i7/ivshmem_cfg.h | 28 -- .../scenarios/hybrid_rt/whl-ipc-i7/misc_cfg.h | 73 --- .../scenarios/hybrid_rt/whl-ipc-i7/pci_dev.c | 60 --- .../scenarios/hybrid_rt/whl-ipc-i7/pt_intx.c | 10 - .../hybrid_rt/whl-ipc-i7/vbar_base.h | 46 -- .../hybrid_rt/whl-ipc-i7/whl-ipc-i7.config | 37 -- .../industry/cfl-k700-i7/cfl-k700-i7.config | 38 -- .../industry/cfl-k700-i7/ivshmem_cfg.h | 9 - .../scenarios/industry/cfl-k700-i7/misc_cfg.h | 66 --- .../scenarios/industry/cfl-k700-i7/pci_dev.c | 14 - .../scenarios/industry/cfl-k700-i7/pt_intx.c | 10 - .../industry/cfl-k700-i7/vbar_base.h | 10 - .../industry/ehl-crb-b/ehl-crb-b.config | 38 -- .../industry/ehl-crb-b/ivshmem_cfg.h | 9 - .../scenarios/industry/ehl-crb-b/misc_cfg.h | 91 ---- .../scenarios/industry/ehl-crb-b/pci_dev.c | 14 - .../scenarios/industry/ehl-crb-b/pt_intx.c | 10 - .../scenarios/industry/ehl-crb-b/vbar_base.h | 10 - .../industry/nuc7i7dnb/ivshmem_cfg.h | 9 - .../scenarios/industry/nuc7i7dnb/misc_cfg.h | 66 --- .../industry/nuc7i7dnb/nuc7i7dnb.config | 37 -- .../scenarios/industry/nuc7i7dnb/pci_dev.c | 14 - .../scenarios/industry/nuc7i7dnb/pt_intx.c | 10 - .../scenarios/industry/nuc7i7dnb/vbar_base.h | 10 - .../scenarios/industry/vm_configurations.c | 164 ------- .../scenarios/industry/vm_configurations.h | 31 -- .../industry/whl-ipc-i5/ivshmem_cfg.h | 9 - .../scenarios/industry/whl-ipc-i5/misc_cfg.h | 66 --- .../scenarios/industry/whl-ipc-i5/pci_dev.c | 14 - .../scenarios/industry/whl-ipc-i5/pt_intx.c | 10 - .../scenarios/industry/whl-ipc-i5/vbar_base.h | 10 - .../industry/whl-ipc-i5/whl-ipc-i5.config | 37 -- .../industry/whl-ipc-i7/ivshmem_cfg.h | 9 - .../scenarios/industry/whl-ipc-i7/misc_cfg.h | 66 --- .../scenarios/industry/whl-ipc-i7/pci_dev.c | 14 - .../scenarios/industry/whl-ipc-i7/pt_intx.c | 10 - .../scenarios/industry/whl-ipc-i7/vbar_base.h | 10 - .../industry/whl-ipc-i7/whl-ipc-i7.config | 37 -- .../logical_partition/ehl-crb-b/VM0/apic.asl | 54 --- .../logical_partition/ehl-crb-b/VM0/dsdt.asl | 21 - .../logical_partition/ehl-crb-b/VM0/facp.asl | 157 ------- .../logical_partition/ehl-crb-b/VM0/mcfg.asl | 27 -- .../logical_partition/ehl-crb-b/VM0/rsdp.asl | 16 - .../logical_partition/ehl-crb-b/VM0/xsdt.asl | 23 - .../logical_partition/ehl-crb-b/VM1/apic.asl | 54 --- .../logical_partition/ehl-crb-b/VM1/dsdt.asl | 21 - .../logical_partition/ehl-crb-b/VM1/facp.asl | 157 ------- .../logical_partition/ehl-crb-b/VM1/mcfg.asl | 27 -- .../logical_partition/ehl-crb-b/VM1/rsdp.asl | 16 - .../logical_partition/ehl-crb-b/VM1/xsdt.asl | 23 - .../ehl-crb-b/ehl-crb-b.config | 38 -- .../logical_partition/ehl-crb-b/ivshmem_cfg.h | 9 - .../logical_partition/ehl-crb-b/misc_cfg.h | 75 ---- .../logical_partition/ehl-crb-b/pci_dev.c | 12 - .../logical_partition/ehl-crb-b/pt_intx.c | 10 - .../logical_partition/ehl-crb-b/vbar_base.h | 81 ---- .../logical_partition/nuc7i7dnb/VM0/apic.asl | 54 --- .../logical_partition/nuc7i7dnb/VM0/dsdt.asl | 21 - .../logical_partition/nuc7i7dnb/VM0/facp.asl | 157 ------- .../logical_partition/nuc7i7dnb/VM0/mcfg.asl | 27 -- .../logical_partition/nuc7i7dnb/VM0/rsdp.asl | 16 - .../logical_partition/nuc7i7dnb/VM0/xsdt.asl | 23 - .../logical_partition/nuc7i7dnb/VM1/apic.asl | 54 --- .../logical_partition/nuc7i7dnb/VM1/dsdt.asl | 21 - .../logical_partition/nuc7i7dnb/VM1/facp.asl | 157 ------- .../logical_partition/nuc7i7dnb/VM1/mcfg.asl | 27 -- .../logical_partition/nuc7i7dnb/VM1/rsdp.asl | 16 - .../logical_partition/nuc7i7dnb/VM1/xsdt.asl | 23 - .../logical_partition/nuc7i7dnb/ivshmem_cfg.h | 9 - .../logical_partition/nuc7i7dnb/misc_cfg.h | 50 --- .../nuc7i7dnb/nuc7i7dnb.config | 37 -- .../logical_partition/nuc7i7dnb/pci_dev.c | 62 --- .../logical_partition/nuc7i7dnb/pt_intx.c | 10 - .../logical_partition/nuc7i7dnb/vbar_base.h | 44 -- .../logical_partition/vm_configurations.c | 110 ----- .../logical_partition/vm_configurations.h | 33 -- .../logical_partition/whl-ipc-i5/VM0/apic.asl | 54 --- .../logical_partition/whl-ipc-i5/VM0/dsdt.asl | 21 - .../logical_partition/whl-ipc-i5/VM0/facp.asl | 157 ------- .../logical_partition/whl-ipc-i5/VM0/mcfg.asl | 27 -- .../logical_partition/whl-ipc-i5/VM0/rsdp.asl | 16 - .../logical_partition/whl-ipc-i5/VM0/xsdt.asl | 23 - .../logical_partition/whl-ipc-i5/VM1/apic.asl | 54 --- .../logical_partition/whl-ipc-i5/VM1/dsdt.asl | 21 - .../logical_partition/whl-ipc-i5/VM1/facp.asl | 157 ------- .../logical_partition/whl-ipc-i5/VM1/mcfg.asl | 27 -- .../logical_partition/whl-ipc-i5/VM1/rsdp.asl | 16 - .../logical_partition/whl-ipc-i5/VM1/xsdt.asl | 23 - .../whl-ipc-i5/ivshmem_cfg.h | 9 - .../logical_partition/whl-ipc-i5/misc_cfg.h | 55 --- .../logical_partition/whl-ipc-i5/pci_dev.c | 62 --- .../logical_partition/whl-ipc-i5/pt_intx.c | 10 - .../logical_partition/whl-ipc-i5/vbar_base.h | 43 -- .../whl-ipc-i5/whl-ipc-i5.config | 37 -- .../logical_partition/whl-ipc-i7/VM0/apic.asl | 54 --- .../logical_partition/whl-ipc-i7/VM0/dsdt.asl | 21 - .../logical_partition/whl-ipc-i7/VM0/facp.asl | 157 ------- .../logical_partition/whl-ipc-i7/VM0/mcfg.asl | 27 -- .../logical_partition/whl-ipc-i7/VM0/rsdp.asl | 16 - .../logical_partition/whl-ipc-i7/VM0/xsdt.asl | 23 - .../logical_partition/whl-ipc-i7/VM1/apic.asl | 54 --- .../logical_partition/whl-ipc-i7/VM1/dsdt.asl | 21 - .../logical_partition/whl-ipc-i7/VM1/facp.asl | 157 ------- .../logical_partition/whl-ipc-i7/VM1/mcfg.asl | 27 -- .../logical_partition/whl-ipc-i7/VM1/rsdp.asl | 16 - .../logical_partition/whl-ipc-i7/VM1/xsdt.asl | 23 - .../whl-ipc-i7/ivshmem_cfg.h | 9 - .../logical_partition/whl-ipc-i7/misc_cfg.h | 55 --- .../logical_partition/whl-ipc-i7/pci_dev.c | 62 --- .../logical_partition/whl-ipc-i7/pt_intx.c | 10 - .../logical_partition/whl-ipc-i7/vbar_base.h | 43 -- .../whl-ipc-i7/whl-ipc-i7.config | 37 -- .../xmls/config-xmls/generic/hybrid.xml | 212 --------- .../generic/hybrid_launch_1uos.xml | 43 -- .../xmls/config-xmls/generic/hybrid_rt.xml | 247 ---------- .../xmls/config-xmls/generic/industry.xml | 185 -------- .../generic/industry_launch_1uos.xml | 43 -- .../config-xmls/generic/logical_partition.xml | 184 -------- .../xmls/config-xmls/generic/sdc.xml | 180 -------- .../config-xmls/generic/sdc_launch_1uos.xml | 44 -- .../xmls/config-xmls/template/HV.xml | 62 --- .../xmls/config-xmls/template/KATA_VM.xml | 35 -- .../template/LAUNCH_POST_RT_VM.xml | 44 -- .../template/LAUNCH_POST_STD_VM.xml | 44 -- .../xmls/config-xmls/template/POST_RT_VM.xml | 38 -- .../xmls/config-xmls/template/POST_STD_VM.xml | 38 -- .../xmls/config-xmls/template/PRE_RT_VM.xml | 59 --- .../xmls/config-xmls/template/PRE_STD_VM.xml | 59 --- .../xmls/config-xmls/template/SAFETY_VM.xml | 60 --- .../xmls/config-xmls/template/SOS_VM.xml | 53 --- 452 files changed, 1533 insertions(+), 12205 deletions(-) delete mode 120000 misc/acrn-config/xmls rename misc/{acrn-config => config_tools}/README (100%) rename misc/{acrn-config => config_tools}/acpi_gen/__init__.py (100%) rename misc/{acrn-config => config_tools}/acpi_gen/acpi_const.py (94%) rename misc/{acrn-config => config_tools}/acpi_gen/asl_gen.py (100%) rename misc/{acrn-config => config_tools}/acpi_gen/bin_gen.py (97%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/apic.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/dsdt.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/dsdt_tpm2.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/dsdt_tsn_otn1.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/facp.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/mcfg.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/rsdp.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/tpm2.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/template/xsdt.asl (100%) rename misc/{vm_configs/acpi => config_tools/acpi_template}/tgl-rvp/PTCT (100%) rename misc/{acrn-config => config_tools}/board_config/README (100%) rename misc/{acrn-config => config_tools}/board_config/acpi_platform_h.py (100%) rename misc/{acrn-config => config_tools}/board_config/board_c.py (100%) rename misc/{acrn-config => config_tools}/board_config/board_cfg_gen.py (98%) rename misc/{acrn-config => config_tools}/board_config/board_info_h.py (100%) rename misc/{acrn-config => config_tools}/board_config/misc_cfg_h.py (100%) rename misc/{acrn-config => config_tools}/board_config/pci_devices_h.py (100%) rename misc/{acrn-config => config_tools}/board_config/vbar_base_h.py (100%) rename misc/{acrn-config => config_tools}/config_app/app.py (100%) rename misc/{acrn-config => config_tools}/config_app/configs.py (100%) rename misc/{acrn-config => config_tools}/config_app/controller.py (100%) rename misc/{acrn-config => config_tools}/config_app/requirements (100%) rename misc/{acrn-config => config_tools}/config_app/static/main.js (100%) rename misc/{acrn-config => config_tools}/config_app/static/styles.css (100%) rename misc/{acrn-config => config_tools}/config_app/templates/base.html (100%) rename misc/{acrn-config => config_tools}/config_app/templates/launch.html (100%) rename misc/{acrn-config => config_tools}/config_app/templates/scenario.html (100%) rename misc/{acrn-config => config_tools}/config_app/views.py (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/apl-mrb}/apl-mrb.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/hybrid.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/industry.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/logical_partition.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/sdc.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/sdc_launch_1uos_aaag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/sdc_launch_1uos_aliaag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-mrb/sdc_launch_1uos_laag.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/apl-up2-n3350}/apl-up2-n3350.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2-n3350/logical_partition.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2-n3350/sdc_launch_1uos_laag.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/apl-up2}/apl-up2.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2/hybrid.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2/industry.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2/logical_partition.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2/sdc.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2/sdc_launch_1uos_aaag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/apl-up2/sdc_launch_1uos_laag.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/cfl-k700-i7}/cfl-k700-i7.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/cfl-k700-i7/hybrid_rt.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/cfl-k700-i7/industry.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/ehl-crb-b}/ehl-crb-b.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/hybrid.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/hybrid_rt.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/hybrid_rt_fusa.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/hybrid_rt_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/industry.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/industry_launch_1uos_hardrt.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/industry_launch_1uos_vxworks.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/industry_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/industry_launch_2uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/industry_launch_6uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/logical_partition.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/sdc.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/sdc_launch_1uos_laag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/ehl-crb-b/sdc_launch_1uos_zephyr.xml (100%) create mode 100644 misc/config_tools/data/generic/generic.xml create mode 100644 misc/config_tools/data/generic/hybrid.xml create mode 100644 misc/config_tools/data/generic/hybrid_rt.xml create mode 100644 misc/config_tools/data/generic/industry.xml rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/generic/industry_launch_2uos.xml (78%) create mode 100644 misc/config_tools/data/generic/logical_partition.xml rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/hybrid.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/industry.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/industry_launch_1uos_hardrt.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/industry_launch_1uos_vxworks.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/industry_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/industry_launch_2uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/industry_launch_6uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/logical_partition.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/nuc6cayh}/nuc6cayh.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/sdc.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/sdc_launch_1uos_laag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc6cayh/sdc_launch_1uos_zephyr.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/hybrid.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/hybrid_rt_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/industry.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/industry_launch_1uos_hardrt.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/industry_launch_1uos_vxworks.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/industry_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/industry_launch_2uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/industry_launch_6uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/logical_partition.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/nuc7i7dnb}/nuc7i7dnb.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/sdc.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/sdc_launch_1uos_laag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/nuc7i7dnb/sdc_launch_1uos_zephyr.xml (100%) rename misc/{vm_configs/xmls/board-xmls => config_tools/data/qemu}/qemu.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/qemu/sdc.xml (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/apl-mrb/acrn_guest.service (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/apl-mrb/launch_uos.args (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/apl-mrb/launch_uos.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/apl-mrb/runC.json (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/apl-up2/launch_uos.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/launch_ubuntu.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/launch_hard_rt_vm.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/launch_uos.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/launch_vxworks.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/launch_win.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/launch_xenomai.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/launch_zephyr.sh (100%) rename misc/{vm_configs => config_tools/data}/sample_launch_scripts/nuc/runC.json (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/hybrid.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/hybrid_rt.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/hybrid_rt_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/industry.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/industry_launch_1uos_waag.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/industry_launch_2uos.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/logical_partition.xml (100%) rename misc/{vm_configs/xmls/config-xmls => config_tools/data}/tgl-rvp/sdc.xml (100%) rename misc/{vm_configs/xmls/config-xmls => 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misc/vm_configs/xmls/config-xmls/template/POST_STD_VM.xml delete mode 100644 misc/vm_configs/xmls/config-xmls/template/PRE_RT_VM.xml delete mode 100644 misc/vm_configs/xmls/config-xmls/template/PRE_STD_VM.xml delete mode 100644 misc/vm_configs/xmls/config-xmls/template/SAFETY_VM.xml delete mode 100644 misc/vm_configs/xmls/config-xmls/template/SOS_VM.xml diff --git a/CODEOWNERS b/CODEOWNERS index b7d7fb364..a46cb3ac8 100644 --- a/CODEOWNERS +++ b/CODEOWNERS @@ -16,13 +16,12 @@ Makefile @terryzouhao /hypervisor/ @anthonyzxu @dongyaozu /devicemodel/ @anthonyzxu @ywan170 /doc/ @dbkinder @deb-intel @NanlinXie -/misc/tools/acrn-crashlog/ @chengangc @dizhang417 -/misc/tools/acrnlog/ @ywan170 @liuyuan-GitHub -/misc/tools/acrntrace/ @ywan170 @liuyuan-GitHub -/misc/acrn-manager/ @ywan170 @liuyuan-GitHub -/misc/acrnbridge/ @ywan170 @liuyuan-GitHub -/misc/acrn-config/ @terryzouhao +/misc/debug_tools/acrn_crashlog/ @chengangc @dizhang417 +/misc/debug_tools/acrn_log/ @ywan170 @shuox +/misc/debug_tools/acrn_trace/ @ywan170 @shuox +/misc/services/acrn_manager/ @ywan170 @shuox +/misc/services/acrn_bridge/ @ywan170 @shuox +/misc/config_tools/ @terryzouhao /misc/Makefile @terryzouhao -/misc/efi-stub/ @terryzouhao *.rst @dbkinder @deb-intel @NanlinXie diff --git a/Makefile b/Makefile index 9399ab2e6..241743d16 100644 --- a/Makefile +++ b/Makefile @@ -68,12 +68,12 @@ O ?= build ROOT_OUT := $(shell mkdir -p $(O);cd $(O);pwd) HV_OUT := $(ROOT_OUT)/hypervisor DM_OUT := $(ROOT_OUT)/devicemodel -TOOLS_OUT := $(ROOT_OUT)/misc/tools +TOOLS_OUT := $(ROOT_OUT)/misc/debug_tools DOC_OUT := $(ROOT_OUT)/doc BUILD_VERSION ?= BUILD_TAG ?= HV_CFG_LOG = $(HV_OUT)/cfg.log -VM_CONFIGS_DIR = $(T)/misc/vm_configs +VM_CONFIGS_DIR = $(T)/misc/config_tools export TOOLS_OUT BOARD SCENARIO RELEASE diff --git a/devicemodel/samples b/devicemodel/samples index fafb38334..0096eebc2 120000 --- a/devicemodel/samples +++ b/devicemodel/samples @@ -1 +1 @@ -../misc/vm_configs/sample_launch_scripts/ \ No newline at end of file +../misc/config_tools/data/sample_launch_scripts/ \ No newline at end of file diff --git a/doc/develop.rst b/doc/develop.rst index 2b19faac3..359fb8025 100644 --- a/doc/develop.rst +++ b/doc/develop.rst @@ -19,10 +19,10 @@ Configuration and Tools user-guides/kernel-parameters user-guides/acrn-shell user-guides/acrn-dm-parameters - misc/tools/acrn-crashlog/README + misc/debug_tools/acrn_crashlog/README misc/packaging/README - misc/tools/** - misc/acrn-manager/** + misc/debug_tools/** + misc/services/acrn_manager/** Service VM Tutorials ******************** diff --git a/hypervisor/Makefile b/hypervisor/Makefile index 437086a4a..0f2c04145 100644 --- a/hypervisor/Makefile +++ b/hypervisor/Makefile @@ -382,7 +382,7 @@ pre_build: $(HV_CONFIG_H) $(HV_CONFIG_TIMESTAMP) $(MAKE) -C $(PRE_BUILD_DIR) BOARD=$(BOARD) SCENARIO=$(SCENARIO) TARGET_DIR=$(HV_CONFIG_DIR) @$(HV_OBJDIR)/hv_prebuild_check.out @echo "generate the binary of ACPI tables for pre-launched VMs ..." - python3 ../misc/acrn-config/acpi_gen/bin_gen.py --board $(BOARD) --scenario $(SCENARIO) --asl $(HV_CONFIG_DIR) --out $(HV_OBJDIR)/acpi + python3 ../misc/config_tools/acpi_gen/bin_gen.py --board $(BOARD) --scenario $(SCENARIO) --asl $(HV_CONFIG_DIR) --out $(HV_OBJDIR)/acpi .PHONY: header header: $(VERSION) $(HV_CONFIG_H) diff --git a/hypervisor/scripts/genconf.sh b/hypervisor/scripts/genconf.sh index b962a7f4c..f19642816 100644 --- a/hypervisor/scripts/genconf.sh +++ b/hypervisor/scripts/genconf.sh @@ -16,7 +16,7 @@ apply_patch () { fi } -tool_dir=${base_dir}/../misc/acrn-config +tool_dir=${base_dir}/../misc/config_tools diffconfig_list=${out}/.diffconfig python3 ${tool_dir}/board_config/board_cfg_gen.py --board ${board_xml} --scenario ${scenario_xml} --out ${out} && diff --git a/hypervisor/scripts/makefile/cfg_update.mk b/hypervisor/scripts/makefile/cfg_update.mk index 6192d7463..daf494a29 100644 --- a/hypervisor/scripts/makefile/cfg_update.mk +++ b/hypervisor/scripts/makefile/cfg_update.mk @@ -45,13 +45,13 @@ update_config: ifeq ($(CONFIG_XML_ENABLED),true) @if [ ! -f $(UPDATE_RESULT) ]; then \ mkdir -p $(dir $(UPDATE_RESULT));\ - python3 ../misc/acrn-config/board_config/board_cfg_gen.py --board $(BOARD_FILE) --scenario $(SCENARIO_FILE) --out $(TARGET_DIR) > $(UPDATE_RESULT);\ + python3 ../misc/config_tools/board_config/board_cfg_gen.py --board $(BOARD_FILE) --scenario $(SCENARIO_FILE) --out $(TARGET_DIR) > $(UPDATE_RESULT);\ cat $(UPDATE_RESULT);\ if [ "`sed -n /successfully/p $(UPDATE_RESULT)`" = "" ]; then rm -f $(UPDATE_RESULT); exit 1; fi;\ if [ "$(TARGET_DIR)" = "" ]; then \ - python3 ../misc/acrn-config/scenario_config/scenario_cfg_gen.py --board $(BOARD_FILE) --scenario $(SCENARIO_FILE) > $(UPDATE_RESULT);\ + python3 ../misc/config_tools/scenario_config/scenario_cfg_gen.py --board $(BOARD_FILE) --scenario $(SCENARIO_FILE) > $(UPDATE_RESULT);\ else \ - python3 ../misc/acrn-config/scenario_config/scenario_cfg_gen.py --board $(BOARD_FILE) --scenario $(SCENARIO_FILE) --out $(abspath $(TARGET_DIR)) > $(UPDATE_RESULT);\ + python3 ../misc/config_tools/scenario_config/scenario_cfg_gen.py --board $(BOARD_FILE) --scenario $(SCENARIO_FILE) --out $(abspath $(TARGET_DIR)) > $(UPDATE_RESULT);\ fi;\ cat $(UPDATE_RESULT);\ if [ "`sed -n /successfully/p $(UPDATE_RESULT)`" = "" ]; then rm -f $(UPDATE_RESULT); exit 1; fi;\ diff --git a/hypervisor/scripts/makefile/config.mk b/hypervisor/scripts/makefile/config.mk index 5dca53c42..08622b35b 100644 --- a/hypervisor/scripts/makefile/config.mk +++ b/hypervisor/scripts/makefile/config.mk @@ -50,13 +50,13 @@ endef # # * The _FILE (i.e. either BOARD_FILE or SCENARIO_FILE) will always hold the path to an existing XML file that # defines the effective board/scenario. If only a BOARD/SCENARIO name is given, a predefined configuration under -# misc/acrn-config/xmls will be used. +# misc/config_tools/data/$BOARD will be used. # define determine_config = ifneq ($($(1)),) ifneq ($(realpath $($(1))),) override $(1)_FILE := $($(1)) - override $(1) := $$(shell xmllint --xpath 'string(/acrn-config/@$(shell echo $(1) | tr A-Z a-z))' $$($(1)_FILE)) + override $(1) := $$(shell xmllint --xpath 'string(/config_tools/@$(shell echo $(1) | tr A-Z a-z))' $$($(1)_FILE)) else override $(1)_FILE := $(HV_PREDEFINED_$(1)_DIR)/$$($(1)).xml ifeq ($$(realpath $$($(1)_FILE)),) @@ -113,9 +113,9 @@ endef HV_BOARD_XML := $(HV_OBJDIR)/.board.xml HV_SCENARIO_XML := $(HV_OBJDIR)/.scenario.xml HV_UNIFIED_XML_IN := $(BASEDIR)/scripts/makefile/unified.xml.in -HV_PREDEFINED_BOARD_DIR := $(realpath $(BASEDIR)/../misc/acrn-config/xmls/board-xmls) -HV_PREDEFINED_SCENARIO_DIR = $(realpath $(BASEDIR)/../misc/acrn-config/xmls/config-xmls)/$(BOARD) -HV_CONFIG_TOOL_DIR := $(realpath $(BASEDIR)/../misc/acrn-config) +HV_PREDEFINED_BOARD_DIR := $(realpath $(BASEDIR)/../misc/config_tools/data)/$(BOARD) +HV_PREDEFINED_SCENARIO_DIR = $(realpath $(BASEDIR)/../misc/config_tools/data)/$(BOARD) +HV_CONFIG_TOOL_DIR := $(realpath $(BASEDIR)/../misc/config_tools) HV_CONFIG_XFORM_DIR := $(HV_CONFIG_TOOL_DIR)/xforms # Paths to the outputs: diff --git a/hypervisor/scripts/makefile/kconfig.mk b/hypervisor/scripts/makefile/kconfig.mk index 68ea52e8a..c0b9938c0 100644 --- a/hypervisor/scripts/makefile/kconfig.mk +++ b/hypervisor/scripts/makefile/kconfig.mk @@ -18,7 +18,7 @@ HV_DEFCONFIG := defconfig HV_CONFIG_H := include/config.h HV_CONFIG_MK := include/config.mk -KCONFIG_DIR := $(BASEDIR)/../misc/acrn-config/kconfig +KCONFIG_DIR := $(BASEDIR)/../misc/config_tools/kconfig # Backward-compatibility for RELEASE=(0|1) ifdef RELEASE diff --git a/misc/acrn-config/xmls b/misc/acrn-config/xmls deleted file mode 120000 index 5ab8fc36d..000000000 --- a/misc/acrn-config/xmls +++ /dev/null @@ -1 +0,0 @@ -../vm_configs/xmls/ \ No newline at end of file diff --git a/misc/acrn-config/README b/misc/config_tools/README similarity index 100% rename from misc/acrn-config/README rename to misc/config_tools/README diff --git a/misc/acrn-config/acpi_gen/__init__.py b/misc/config_tools/acpi_gen/__init__.py similarity index 100% rename from misc/acrn-config/acpi_gen/__init__.py rename to misc/config_tools/acpi_gen/__init__.py diff --git a/misc/acrn-config/acpi_gen/acpi_const.py b/misc/config_tools/acpi_gen/acpi_const.py similarity index 94% rename from misc/acrn-config/acpi_gen/acpi_const.py rename to misc/config_tools/acpi_gen/acpi_const.py index 4bd80edcf..25a56508c 100644 --- a/misc/acrn-config/acpi_gen/acpi_const.py +++ b/misc/config_tools/acpi_gen/acpi_const.py @@ -10,8 +10,8 @@ import os, sys sys.path.append(os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', 'library')) import common -VM_CONFIGS_PATH = os.path.join(common.SOURCE_ROOT_DIR, 'misc', 'vm_configs') -TEMPLATE_ACPI_PATH = os.path.join(VM_CONFIGS_PATH, 'acpi', 'template') +VM_CONFIGS_PATH = os.path.join(common.SOURCE_ROOT_DIR, 'misc', 'config_tools') +TEMPLATE_ACPI_PATH = os.path.join(VM_CONFIGS_PATH, 'acpi_template', 'template') ACPI_TABLE_LIST = [('rsdp.asl', 'rsdp.aml'), ('xsdt.asl', 'xsdt.aml'), ('facp.asl', 'facp.aml'), ('mcfg.asl', 'mcfg.aml'), ('apic.asl', 'apic.aml'), ('tpm2.asl', 'tpm2.aml'), diff --git a/misc/acrn-config/acpi_gen/asl_gen.py b/misc/config_tools/acpi_gen/asl_gen.py similarity index 100% rename from misc/acrn-config/acpi_gen/asl_gen.py rename to misc/config_tools/acpi_gen/asl_gen.py diff --git a/misc/acrn-config/acpi_gen/bin_gen.py b/misc/config_tools/acpi_gen/bin_gen.py similarity index 97% rename from misc/acrn-config/acpi_gen/bin_gen.py rename to misc/config_tools/acpi_gen/bin_gen.py index 4099b7342..18a9b0b27 100644 --- a/misc/acrn-config/acpi_gen/bin_gen.py +++ b/misc/config_tools/acpi_gen/bin_gen.py @@ -202,9 +202,7 @@ if __name__ == '__main__': description="the tool to generate ACPI binary for Pre-launched VMs.") parser.add_argument("--board", required=True, help="the board type.") parser.add_argument("--scenario", required=True, help="the scenario name.") - parser.add_argument("--asl", default=None, help="the input folder to store the ACPI ASL code. " - "If not specified, the path for the ASL code is" - "misc/vm_configs/scenarios/[scenario]/[board]/") + parser.add_argument("--asl", default=None, help="the input folder to store the ACPI ASL code. ") parser.add_argument("--out", default=None, help="the output folder to store the ACPI binary code. " "If not specified, the path for the binary code is" "build/acpi/") diff --git a/misc/vm_configs/acpi/template/apic.asl b/misc/config_tools/acpi_template/template/apic.asl similarity index 100% rename from misc/vm_configs/acpi/template/apic.asl rename to misc/config_tools/acpi_template/template/apic.asl diff --git a/misc/vm_configs/acpi/template/dsdt.asl b/misc/config_tools/acpi_template/template/dsdt.asl similarity index 100% rename from misc/vm_configs/acpi/template/dsdt.asl rename to misc/config_tools/acpi_template/template/dsdt.asl diff --git a/misc/vm_configs/acpi/template/dsdt_tpm2.asl b/misc/config_tools/acpi_template/template/dsdt_tpm2.asl similarity index 100% rename from misc/vm_configs/acpi/template/dsdt_tpm2.asl rename to misc/config_tools/acpi_template/template/dsdt_tpm2.asl diff --git a/misc/vm_configs/acpi/template/dsdt_tsn_otn1.asl b/misc/config_tools/acpi_template/template/dsdt_tsn_otn1.asl similarity index 100% rename from misc/vm_configs/acpi/template/dsdt_tsn_otn1.asl rename to misc/config_tools/acpi_template/template/dsdt_tsn_otn1.asl diff --git a/misc/vm_configs/acpi/template/facp.asl b/misc/config_tools/acpi_template/template/facp.asl similarity index 100% rename from misc/vm_configs/acpi/template/facp.asl rename to misc/config_tools/acpi_template/template/facp.asl diff --git a/misc/vm_configs/acpi/template/mcfg.asl b/misc/config_tools/acpi_template/template/mcfg.asl similarity index 100% rename from misc/vm_configs/acpi/template/mcfg.asl rename to misc/config_tools/acpi_template/template/mcfg.asl diff --git a/misc/vm_configs/acpi/template/rsdp.asl b/misc/config_tools/acpi_template/template/rsdp.asl similarity index 100% rename from misc/vm_configs/acpi/template/rsdp.asl rename to misc/config_tools/acpi_template/template/rsdp.asl diff --git a/misc/vm_configs/acpi/template/tpm2.asl b/misc/config_tools/acpi_template/template/tpm2.asl similarity index 100% rename from misc/vm_configs/acpi/template/tpm2.asl rename to misc/config_tools/acpi_template/template/tpm2.asl diff --git a/misc/vm_configs/acpi/template/xsdt.asl b/misc/config_tools/acpi_template/template/xsdt.asl similarity index 100% rename from misc/vm_configs/acpi/template/xsdt.asl rename to misc/config_tools/acpi_template/template/xsdt.asl diff --git a/misc/vm_configs/acpi/tgl-rvp/PTCT b/misc/config_tools/acpi_template/tgl-rvp/PTCT similarity index 100% rename from misc/vm_configs/acpi/tgl-rvp/PTCT rename to misc/config_tools/acpi_template/tgl-rvp/PTCT diff --git a/misc/acrn-config/board_config/README b/misc/config_tools/board_config/README similarity index 100% rename from misc/acrn-config/board_config/README rename to misc/config_tools/board_config/README diff --git a/misc/acrn-config/board_config/acpi_platform_h.py b/misc/config_tools/board_config/acpi_platform_h.py similarity index 100% rename from misc/acrn-config/board_config/acpi_platform_h.py rename to misc/config_tools/board_config/acpi_platform_h.py diff --git a/misc/acrn-config/board_config/board_c.py b/misc/config_tools/board_config/board_c.py similarity index 100% rename from misc/acrn-config/board_config/board_c.py rename to misc/config_tools/board_config/board_c.py diff --git a/misc/acrn-config/board_config/board_cfg_gen.py b/misc/config_tools/board_config/board_cfg_gen.py similarity index 98% rename from misc/acrn-config/board_config/board_cfg_gen.py rename to misc/config_tools/board_config/board_cfg_gen.py index 8d18f01f9..1f1ad0d9a 100755 --- a/misc/acrn-config/board_config/board_cfg_gen.py +++ b/misc/config_tools/board_config/board_cfg_gen.py @@ -17,7 +17,7 @@ import common import vbar_base_h ACRN_PATH = common.SOURCE_ROOT_DIR -ACRN_CONFIG_DEF = ACRN_PATH + "misc/vm_configs/" +ACRN_CONFIG_DEF = ACRN_PATH + "misc/config_tools/data/" ACRN_DEFAULT_ACPI = ACRN_PATH + "hypervisor/include/arch/x86/default_acpi_info.h" GEN_FILE = ["pci_devices.h", "board.c", "platform_acpi_info.h", "misc_cfg.h", diff --git a/misc/acrn-config/board_config/board_info_h.py b/misc/config_tools/board_config/board_info_h.py similarity index 100% rename from misc/acrn-config/board_config/board_info_h.py rename to misc/config_tools/board_config/board_info_h.py diff --git a/misc/acrn-config/board_config/misc_cfg_h.py b/misc/config_tools/board_config/misc_cfg_h.py similarity index 100% rename from misc/acrn-config/board_config/misc_cfg_h.py rename to misc/config_tools/board_config/misc_cfg_h.py diff --git a/misc/acrn-config/board_config/pci_devices_h.py b/misc/config_tools/board_config/pci_devices_h.py similarity index 100% rename from misc/acrn-config/board_config/pci_devices_h.py rename to misc/config_tools/board_config/pci_devices_h.py diff --git a/misc/acrn-config/board_config/vbar_base_h.py b/misc/config_tools/board_config/vbar_base_h.py similarity index 100% rename from misc/acrn-config/board_config/vbar_base_h.py rename to misc/config_tools/board_config/vbar_base_h.py diff --git a/misc/acrn-config/config_app/app.py b/misc/config_tools/config_app/app.py similarity index 100% rename from misc/acrn-config/config_app/app.py rename to misc/config_tools/config_app/app.py diff --git a/misc/acrn-config/config_app/configs.py b/misc/config_tools/config_app/configs.py similarity index 100% rename from misc/acrn-config/config_app/configs.py rename to misc/config_tools/config_app/configs.py diff --git a/misc/acrn-config/config_app/controller.py b/misc/config_tools/config_app/controller.py similarity index 100% rename from misc/acrn-config/config_app/controller.py rename to misc/config_tools/config_app/controller.py diff --git a/misc/acrn-config/config_app/requirements b/misc/config_tools/config_app/requirements similarity index 100% rename from misc/acrn-config/config_app/requirements rename to misc/config_tools/config_app/requirements diff --git a/misc/acrn-config/config_app/static/main.js b/misc/config_tools/config_app/static/main.js similarity index 100% rename from misc/acrn-config/config_app/static/main.js rename to misc/config_tools/config_app/static/main.js diff --git a/misc/acrn-config/config_app/static/styles.css b/misc/config_tools/config_app/static/styles.css similarity index 100% rename from misc/acrn-config/config_app/static/styles.css rename to misc/config_tools/config_app/static/styles.css diff --git a/misc/acrn-config/config_app/templates/base.html b/misc/config_tools/config_app/templates/base.html similarity index 100% rename from misc/acrn-config/config_app/templates/base.html rename to misc/config_tools/config_app/templates/base.html diff --git a/misc/acrn-config/config_app/templates/launch.html b/misc/config_tools/config_app/templates/launch.html similarity index 100% rename from misc/acrn-config/config_app/templates/launch.html rename to misc/config_tools/config_app/templates/launch.html diff --git a/misc/acrn-config/config_app/templates/scenario.html b/misc/config_tools/config_app/templates/scenario.html similarity index 100% rename from misc/acrn-config/config_app/templates/scenario.html rename to misc/config_tools/config_app/templates/scenario.html diff --git a/misc/acrn-config/config_app/views.py b/misc/config_tools/config_app/views.py similarity index 100% rename from misc/acrn-config/config_app/views.py rename to misc/config_tools/config_app/views.py diff --git a/misc/vm_configs/xmls/board-xmls/apl-mrb.xml b/misc/config_tools/data/apl-mrb/apl-mrb.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/apl-mrb.xml rename to misc/config_tools/data/apl-mrb/apl-mrb.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/hybrid.xml b/misc/config_tools/data/apl-mrb/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/hybrid.xml rename to misc/config_tools/data/apl-mrb/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/industry.xml b/misc/config_tools/data/apl-mrb/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/industry.xml rename to misc/config_tools/data/apl-mrb/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/logical_partition.xml b/misc/config_tools/data/apl-mrb/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/logical_partition.xml rename to misc/config_tools/data/apl-mrb/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/sdc.xml b/misc/config_tools/data/apl-mrb/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/sdc.xml rename to misc/config_tools/data/apl-mrb/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/sdc_launch_1uos_aaag.xml b/misc/config_tools/data/apl-mrb/sdc_launch_1uos_aaag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/sdc_launch_1uos_aaag.xml rename to misc/config_tools/data/apl-mrb/sdc_launch_1uos_aaag.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/sdc_launch_1uos_aliaag.xml b/misc/config_tools/data/apl-mrb/sdc_launch_1uos_aliaag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/sdc_launch_1uos_aliaag.xml rename to misc/config_tools/data/apl-mrb/sdc_launch_1uos_aliaag.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-mrb/sdc_launch_1uos_laag.xml b/misc/config_tools/data/apl-mrb/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-mrb/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/apl-mrb/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/board-xmls/apl-up2-n3350.xml b/misc/config_tools/data/apl-up2-n3350/apl-up2-n3350.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/apl-up2-n3350.xml rename to misc/config_tools/data/apl-up2-n3350/apl-up2-n3350.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2-n3350/logical_partition.xml b/misc/config_tools/data/apl-up2-n3350/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2-n3350/logical_partition.xml rename to misc/config_tools/data/apl-up2-n3350/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2-n3350/sdc_launch_1uos_laag.xml b/misc/config_tools/data/apl-up2-n3350/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2-n3350/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/apl-up2-n3350/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/board-xmls/apl-up2.xml b/misc/config_tools/data/apl-up2/apl-up2.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/apl-up2.xml rename to misc/config_tools/data/apl-up2/apl-up2.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2/hybrid.xml b/misc/config_tools/data/apl-up2/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2/hybrid.xml rename to misc/config_tools/data/apl-up2/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2/industry.xml b/misc/config_tools/data/apl-up2/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2/industry.xml rename to misc/config_tools/data/apl-up2/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2/logical_partition.xml b/misc/config_tools/data/apl-up2/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2/logical_partition.xml rename to misc/config_tools/data/apl-up2/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2/sdc.xml b/misc/config_tools/data/apl-up2/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2/sdc.xml rename to misc/config_tools/data/apl-up2/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2/sdc_launch_1uos_aaag.xml b/misc/config_tools/data/apl-up2/sdc_launch_1uos_aaag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2/sdc_launch_1uos_aaag.xml rename to misc/config_tools/data/apl-up2/sdc_launch_1uos_aaag.xml diff --git a/misc/vm_configs/xmls/config-xmls/apl-up2/sdc_launch_1uos_laag.xml b/misc/config_tools/data/apl-up2/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/apl-up2/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/apl-up2/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/board-xmls/cfl-k700-i7.xml b/misc/config_tools/data/cfl-k700-i7/cfl-k700-i7.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/cfl-k700-i7.xml rename to misc/config_tools/data/cfl-k700-i7/cfl-k700-i7.xml diff --git a/misc/vm_configs/xmls/config-xmls/cfl-k700-i7/hybrid_rt.xml b/misc/config_tools/data/cfl-k700-i7/hybrid_rt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/cfl-k700-i7/hybrid_rt.xml rename to misc/config_tools/data/cfl-k700-i7/hybrid_rt.xml diff --git a/misc/vm_configs/xmls/config-xmls/cfl-k700-i7/industry.xml b/misc/config_tools/data/cfl-k700-i7/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/cfl-k700-i7/industry.xml rename to misc/config_tools/data/cfl-k700-i7/industry.xml diff --git a/misc/vm_configs/xmls/board-xmls/ehl-crb-b.xml b/misc/config_tools/data/ehl-crb-b/ehl-crb-b.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/ehl-crb-b.xml rename to misc/config_tools/data/ehl-crb-b/ehl-crb-b.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid.xml b/misc/config_tools/data/ehl-crb-b/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid.xml rename to misc/config_tools/data/ehl-crb-b/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid_rt.xml b/misc/config_tools/data/ehl-crb-b/hybrid_rt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid_rt.xml rename to misc/config_tools/data/ehl-crb-b/hybrid_rt.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid_rt_fusa.xml b/misc/config_tools/data/ehl-crb-b/hybrid_rt_fusa.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid_rt_fusa.xml rename to misc/config_tools/data/ehl-crb-b/hybrid_rt_fusa.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid_rt_launch_1uos_waag.xml b/misc/config_tools/data/ehl-crb-b/hybrid_rt_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/hybrid_rt_launch_1uos_waag.xml rename to misc/config_tools/data/ehl-crb-b/hybrid_rt_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry.xml b/misc/config_tools/data/ehl-crb-b/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry.xml rename to misc/config_tools/data/ehl-crb-b/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_1uos_hardrt.xml b/misc/config_tools/data/ehl-crb-b/industry_launch_1uos_hardrt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_1uos_hardrt.xml rename to misc/config_tools/data/ehl-crb-b/industry_launch_1uos_hardrt.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_1uos_vxworks.xml b/misc/config_tools/data/ehl-crb-b/industry_launch_1uos_vxworks.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_1uos_vxworks.xml rename to misc/config_tools/data/ehl-crb-b/industry_launch_1uos_vxworks.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_1uos_waag.xml b/misc/config_tools/data/ehl-crb-b/industry_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_1uos_waag.xml rename to misc/config_tools/data/ehl-crb-b/industry_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_2uos.xml b/misc/config_tools/data/ehl-crb-b/industry_launch_2uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_2uos.xml rename to misc/config_tools/data/ehl-crb-b/industry_launch_2uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_6uos.xml b/misc/config_tools/data/ehl-crb-b/industry_launch_6uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/industry_launch_6uos.xml rename to misc/config_tools/data/ehl-crb-b/industry_launch_6uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/logical_partition.xml b/misc/config_tools/data/ehl-crb-b/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/logical_partition.xml rename to misc/config_tools/data/ehl-crb-b/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/sdc.xml b/misc/config_tools/data/ehl-crb-b/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/sdc.xml rename to misc/config_tools/data/ehl-crb-b/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/sdc_launch_1uos_laag.xml b/misc/config_tools/data/ehl-crb-b/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/ehl-crb-b/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/config-xmls/ehl-crb-b/sdc_launch_1uos_zephyr.xml b/misc/config_tools/data/ehl-crb-b/sdc_launch_1uos_zephyr.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/ehl-crb-b/sdc_launch_1uos_zephyr.xml rename to misc/config_tools/data/ehl-crb-b/sdc_launch_1uos_zephyr.xml diff --git a/misc/config_tools/data/generic/generic.xml b/misc/config_tools/data/generic/generic.xml new file mode 100644 index 000000000..09ffe4775 --- /dev/null +++ b/misc/config_tools/data/generic/generic.xml @@ -0,0 +1,425 @@ + + + BIOS Information + Vendor: Intel Corporation + Version: EHLSFWI1.R00.2224.A00.2005281500 + Release Date: 05/28/2020 + + + + Base Board Information + Manufacturer: Intel Corporation + Product Name: ElkhartLake LPDDR4x T3 CRB + Version: 2 + + + + 00:00.0 Host bridge: Intel Corporation Device 4532 + 00:02.0 VGA compatible controller: Intel Corporation Device 4571 + Region 0: Memory at 82000000 (64-bit, non-prefetchable) [size=16M] + Region 2: Memory at 70000000 (64-bit, prefetchable) [size=256M] + 00:08.0 System peripheral: Intel Corporation Device 4511 + Region 0: Memory at 834e4000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:10.0 Serial bus controller [0c80]: Intel Corporation Device 4b44 + Region 0: Memory at 83441000 (64-bit, non-prefetchable) [virtual] [size=4K] + 00:10.1 Serial bus controller [0c80]: Intel Corporation Device 4b45 + Region 0: Memory at 83444000 (64-bit, non-prefetchable) [virtual] [size=4K] + 00:13.0 Serial bus controller [0c80]: Intel Corporation Device 4b84 + Region 0: Memory at 834d8000 (64-bit, non-prefetchable) [disabled] [size=8K] + 00:13.4 Communication controller: Intel Corporation Device 4b88 + Region 0: Memory at 84600000 (64-bit, non-prefetchable) [size=16K] + 00:13.5 Communication controller: Intel Corporation Device 4b89 + Region 0: Memory at 845fc000 (64-bit, non-prefetchable) [size=16K] + 00:14.0 USB controller: Intel Corporation Device 4b7d + Region 0: Memory at 834c0000 (64-bit, non-prefetchable) [size=64K] + 00:14.2 RAM memory: Intel Corporation Device 4b7f + Region 0: Memory at 834d0000 (64-bit, non-prefetchable) [disabled] [size=16K] + Region 2: Memory at 834e7000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:15.0 Serial bus controller [0c80]: Intel Corporation Device 4b78 + Region 0: Memory at 83445000 (64-bit, non-prefetchable) [virtual] [size=4K] + 00:15.2 Serial bus controller [0c80]: Intel Corporation Device 4b7a + Region 0: Memory at 83446000 (64-bit, non-prefetchable) [virtual] [size=4K] + 00:15.3 Serial bus controller [0c80]: Intel Corporation Device 4b7b + Region 0: Memory at 83447000 (64-bit, non-prefetchable) [virtual] [size=4K] + 00:16.0 Communication controller: Intel Corporation Device 4b70 + Region 0: Memory at 834eb000 (64-bit, non-prefetchable) [size=4K] + 00:17.0 SATA controller: Intel Corporation Device 4b63 + Region 0: Memory at 834e2000 (32-bit, non-prefetchable) [size=8K] + Region 1: Memory at 834f6000 (32-bit, non-prefetchable) [size=256] + Region 5: Memory at 834f5000 (32-bit, non-prefetchable) [size=2K] + 00:19.0 Serial bus controller [0c80]: Intel Corporation Device 4b4b + Region 0: Memory at 83448000 (64-bit, non-prefetchable) [virtual] [size=4K] + 00:19.2 Communication controller: Intel Corporation Device 4b4d + Region 0: Memory at 83449000 (64-bit, non-prefetchable) [size=4K] + 00:1a.0 SD Host controller: Intel Corporation Device 4b47 + Region 0: Memory at 834ee000 (64-bit, non-prefetchable) [size=4K] + 00:1a.1 SD Host controller: Intel Corporation Device 4b48 + Region 0: Memory at 834ef000 (64-bit, non-prefetchable) [size=4K] + 00:1a.3 Non-VGA unclassified device: Intel Corporation Device 4b4a + Region 0: Memory at 83400000 (64-bit, non-prefetchable) [disabled] [size=256K] + 00:1b.0 Serial bus controller [0c80]: Intel Corporation Device 4bb9 + Region 0: Memory at 834da000 (64-bit, non-prefetchable) [size=8K] + 00:1b.1 Serial bus controller [0c80]: Intel Corporation Device 4bba + Region 0: Memory at 834dc000 (64-bit, non-prefetchable) [size=8K] + 00:1b.6 Serial bus controller [0c80]: Intel Corporation Device 4bbf + Region 0: Memory at 834de000 (64-bit, non-prefetchable) [size=8K] + 00:1c.0 PCI bridge: Intel Corporation Device 4b38 + 00:1d.0 System peripheral: Intel Corporation Device 4bb3 + Region 0: Memory at 83000000 (64-bit, non-prefetchable) [disabled] [size=2M] + 00:1d.1 Ethernet controller: Intel Corporation Device 4ba0 + Region 0: Memory at 83500000 (64-bit, non-prefetchable) [disabled] [size=256K] + 00:1d.2 Ethernet controller: Intel Corporation Device 4bb0 + Region 0: Memory at 83480000 (64-bit, non-prefetchable) [disabled] [size=256K] + 00:1e.0 Communication controller: Intel Corporation Device 4b28 + Region 0: Memory at 8344a000 (64-bit, non-prefetchable) [size=4K] + 00:1e.1 Communication controller: Intel Corporation Device 4b29 + Region 0: Memory at 8344b000 (64-bit, non-prefetchable) [size=4K] + 00:1e.4 Ethernet controller: Intel Corporation Device 4b32 + Region 0: Memory at 83442000 (64-bit, non-prefetchable) [disabled] [size=8K] + Region 2: Memory at 834f2000 (64-bit, non-prefetchable) [disabled] [size=4K] + 00:1f.0 ISA bridge: Intel Corporation Device 4b00 + 00:1f.3 Multimedia audio controller: Intel Corporation Device 4b58 + Region 0: Memory at 834d4000 (64-bit, non-prefetchable) [size=16K] + Region 4: Memory at 83200000 (64-bit, non-prefetchable) [size=1M] + 00:1f.4 SMBus: Intel Corporation Device 4b23 + Region 0: Memory at 834f3000 (64-bit, non-prefetchable) [size=256] + 00:1f.5 Serial bus controller [0c80]: Intel Corporation Device 4b24 + Region 0: Memory at 8344c000 (32-bit, non-prefetchable) [size=4K] + Region 1: Memory at 80000000 (32-bit, non-prefetchable) [size=32M] + 01:00.0 Non-Volatile memory controller: Silicon Motion, Inc. Device 2263 (rev 03) + Region 0: Memory at 83300000 (64-bit, non-prefetchable) [size=16K] + + + + 00:00.0 0600: 8086:4532 + 00:02.0 0300: 8086:4571 + 00:08.0 0880: 8086:4511 + 00:10.0 0c80: 8086:4b44 + 00:10.1 0c80: 8086:4b45 + 00:13.0 0c80: 8086:4b84 + 00:13.4 0780: 8086:4b88 + 00:13.5 0780: 8086:4b89 + 00:14.0 0c03: 8086:4b7d + 00:14.2 0500: 8086:4b7f + 00:15.0 0c80: 8086:4b78 + 00:15.2 0c80: 8086:4b7a + 00:15.3 0c80: 8086:4b7b + 00:16.0 0780: 8086:4b70 + 00:17.0 0106: 8086:4b63 + 00:19.0 0c80: 8086:4b4b + 00:19.2 0780: 8086:4b4d + 00:1a.0 0805: 8086:4b47 + 00:1a.1 0805: 8086:4b48 + 00:1a.3 0000: 8086:4b4a + 00:1b.0 0c80: 8086:4bb9 + 00:1b.1 0c80: 8086:4bba + 00:1b.6 0c80: 8086:4bbf + 00:1c.0 0604: 8086:4b38 + 00:1d.0 0880: 8086:4bb3 + 00:1d.1 0200: 8086:4ba0 + 00:1d.2 0200: 8086:4bb0 + 00:1e.0 0780: 8086:4b28 + 00:1e.1 0780: 8086:4b29 + 00:1e.4 0200: 8086:4b32 + 00:1f.0 0601: 8086:4b00 + 00:1f.3 0401: 8086:4b58 + 00:1f.4 0c05: 8086:4b23 + 00:1f.5 0c80: 8086:4b24 + 01:00.0 0108: 126f:2263 (rev 03) + + + + #define WAKE_VECTOR_32 0x66BB000CUL + #define WAKE_VECTOR_64 0x66BB0018UL + + + + #define RESET_REGISTER_ADDRESS 0xCF9UL + #define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO + #define RESET_REGISTER_VALUE 0x6U + + + + #define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO + #define PM1A_EVT_BIT_WIDTH 0x20U + #define PM1A_EVT_BIT_OFFSET 0x0U + #define PM1A_EVT_ADDRESS 0x1800UL + #define PM1A_EVT_ACCESS_SIZE 0x2U + #define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO + #define PM1B_EVT_BIT_WIDTH 0x0U + #define PM1B_EVT_BIT_OFFSET 0x0U + #define PM1B_EVT_ADDRESS 0x0UL + #define PM1B_EVT_ACCESS_SIZE 0x2U + #define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO + #define PM1A_CNT_BIT_WIDTH 0x10U + #define PM1A_CNT_BIT_OFFSET 0x0U + #define PM1A_CNT_ADDRESS 0x1804UL + #define PM1A_CNT_ACCESS_SIZE 0x2U + #define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO + #define PM1B_CNT_BIT_WIDTH 0x0U + #define PM1B_CNT_BIT_OFFSET 0x0U + #define PM1B_CNT_ADDRESS 0x0UL + #define PM1B_CNT_ACCESS_SIZE 0x2U + + + + #define S3_PKG_VAL_PM1A 0x5U + #define S3_PKG_VAL_PM1B 0U + #define S3_PKG_RESERVED 0x0U + + + + #define S5_PKG_VAL_PM1A 0x7U + #define S5_PKG_VAL_PM1B 0U + #define S5_PKG_RESERVED 0x0U + + + + #define DRHD_COUNT 3U + + #define DRHD0_DEV_CNT 0x1U + #define DRHD0_SEGMENT 0x0U + #define DRHD0_FLAGS 0x0U + #define DRHD0_REG_BASE 0xFED90000UL + #define DRHD0_IGNORE true + #define DRHD0_DEVSCOPE0_TYPE 0x1U + #define DRHD0_DEVSCOPE0_ID 0x0U + #define DRHD0_DEVSCOPE0_BUS 0x0U + #define DRHD0_DEVSCOPE0_PATH 0x10U + + #define DRHD1_DEV_CNT 0x2U + #define DRHD1_SEGMENT 0x0U + #define DRHD1_FLAGS 0x1U + #define DRHD1_REG_BASE 0xFED91000UL + #define DRHD1_IGNORE false + #define DRHD1_DEVSCOPE0_TYPE 0x3U + #define DRHD1_DEVSCOPE0_ID 0x2U + #define DRHD1_DEVSCOPE0_BUS 0x0U + #define DRHD1_DEVSCOPE0_PATH 0xf7U + #define DRHD1_DEVSCOPE1_TYPE 0x4U + #define DRHD1_DEVSCOPE1_ID 0x0U + #define DRHD1_DEVSCOPE1_BUS 0x0U + #define DRHD1_DEVSCOPE1_PATH 0xf6U + + #define DRHD2_DEV_CNT 0x3U + #define DRHD2_SEGMENT 0x0U + #define DRHD2_FLAGS 0x0U + #define DRHD2_REG_BASE 0x00UL + #define DRHD2_IGNORE false + #define DRHD2_DEVSCOPE0_TYPE 0x5U + #define DRHD2_DEVSCOPE0_ID 0x3U + #define DRHD2_DEVSCOPE0_BUS 0x0U + #define DRHD2_DEVSCOPE0_PATH 0xebU + #define DRHD2_DEVSCOPE1_TYPE 0x5U + #define DRHD2_DEVSCOPE1_ID 0x4U + #define DRHD2_DEVSCOPE1_BUS 0x0U + #define DRHD2_DEVSCOPE1_PATH 0xecU + #define DRHD2_DEVSCOPE2_TYPE 0x5U + #define DRHD2_DEVSCOPE2_ID 0x5U + #define DRHD2_DEVSCOPE2_BUS 0x0U + #define DRHD2_DEVSCOPE2_PATH 0xedU + + + + + "Genuine Intel(R) CPU 0000 @ 1.50GHz" + + + + {{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ + {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1816UL}, 0x02U, 0xFDU, 0x00U}, /* C2 */ + {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1819UL}, 0x03U, 0x418U, 0x00U}, /* C3 */ + + + + {0x5DDUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P0 */ + {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P1 */ + + + + /* PCI mmcfg base of MCFG */ + #define DEFAULT_PCI_MMCFG_BASE 0xc0000000UL + + + + rdt resources supported: L2 + rdt resource clos max: 16 + rdt resource mask max: '0xfff' + + + + 00000000-00000fff : Reserved + 00001000-0009efff : System RAM + 0009f000-000fffff : Reserved + 000a0000-000bffff : PCI Bus 0000:00 + 000f0000-000fffff : System ROM + 00100000-3fffffff : System RAM + 40000000-403fffff : Reserved + 40400000-6146bfff : System RAM + 6146c000-6146cfff : Reserved + 6146d000-6485cfff : System RAM + 6485d000-648b9fff : Unknown E820 type + 648ba000-66b8bfff : Reserved + 65043000-65052fff : pnp 00:03 + 66b8c000-66be5fff : ACPI Non-volatile Storage + 66be6000-66c4efff : ACPI Tables + 66c4f000-66c4ffff : System RAM + 66c50000-6fffffff : Reserved + 6c000000-6fffffff : Graphics Stolen Memory + 70000000-bfffffff : PCI Bus 0000:00 + 70000000-7fffffff : 0000:00:02.0 + 80000000-81ffffff : 0000:00:1f.5 + 82000000-82ffffff : 0000:00:02.0 + 83000000-831fffff : 0000:00:1d.0 + 83200000-832fffff : 0000:00:1f.3 + 83200000-832fffff : ICH HD audio + 83300000-833fffff : PCI Bus 0000:01 + 83300000-83303fff : 0000:01:00.0 + 83300000-83303fff : nvme + 83400000-8343ffff : 0000:00:1a.3 + 83440200-83440203 : INTC1033:01 + 83440204-83440207 : INTC1033:01 + 83441000-83441fff : 0000:00:10.0 + 83441000-834411ff : lpss_dev + 83441000-834411ff : i2c_designware.0 + 83441200-834412ff : lpss_priv + 83442000-83443fff : 0000:00:1e.4 + 83444000-83444fff : 0000:00:10.1 + 83444000-834441ff : lpss_dev + 83444000-834441ff : i2c_designware.1 + 83444200-834442ff : lpss_priv + 83445000-83445fff : 0000:00:15.0 + 83445000-834451ff : lpss_dev + 83445000-834451ff : i2c_designware.2 + 83445200-834452ff : lpss_priv + 83445800-83445fff : idma64.2 + 83445800-83445fff : idma64.2 + 83446000-83446fff : 0000:00:15.2 + 83446000-834461ff : lpss_dev + 83446000-834461ff : i2c_designware.3 + 83446200-834462ff : lpss_priv + 83446800-83446fff : idma64.3 + 83446800-83446fff : idma64.3 + 83447000-83447fff : 0000:00:15.3 + 83447000-834471ff : lpss_dev + 83447000-834471ff : i2c_designware.4 + 83447200-834472ff : lpss_priv + 83447800-83447fff : idma64.4 + 83447800-83447fff : idma64.4 + 83448000-83448fff : 0000:00:19.0 + 83448000-834481ff : lpss_dev + 83448000-834481ff : i2c_designware.5 + 83448200-834482ff : lpss_priv + 83448800-83448fff : idma64.5 + 83448800-83448fff : idma64.5 + 83449000-83449fff : 0000:00:19.2 + 83449000-834491ff : lpss_dev + 83449000-8344901f : serial + 83449200-834492ff : lpss_priv + 83449800-83449fff : idma64.6 + 83449800-83449fff : idma64.6 + 8344a000-8344afff : 0000:00:1e.0 + 8344a000-8344a1ff : lpss_dev + 8344a000-8344a01f : serial + 8344a200-8344a2ff : lpss_priv + 8344a800-8344afff : idma64.7 + 8344a800-8344afff : idma64.7 + 8344b000-8344bfff : 0000:00:1e.1 + 8344b000-8344b1ff : lpss_dev + 8344b000-8344b01f : serial + 8344b200-8344b2ff : lpss_priv + 8344b800-8344bfff : idma64.8 + 8344b800-8344bfff : idma64.8 + 8344c000-8344cfff : 0000:00:1f.5 + 83480000-834bffff : 0000:00:1d.2 + 834c0000-834cffff : 0000:00:14.0 + 834c0000-834cffff : xhci-hcd + 834d0000-834d3fff : 0000:00:14.2 + 834d4000-834d7fff : 0000:00:1f.3 + 834d4000-834d7fff : ICH HD audio + 834d8000-834d9fff : 0000:00:13.0 + 834da000-834dbfff : 0000:00:1b.0 + 834da000-834dbfff : 0000:00:1b.0 + 834dc000-834ddfff : 0000:00:1b.1 + 834dc000-834ddfff : 0000:00:1b.1 + 834de000-834dffff : 0000:00:1b.6 + 834de000-834dffff : 0000:00:1b.6 + 834e0200-834e0203 : INTC1033:00 + 834e0204-834e0207 : INTC1033:00 + 834e2000-834e3fff : 0000:00:17.0 + 834e2000-834e3fff : ahci + 834e4000-834e4fff : 0000:00:08.0 + 834e7000-834e7fff : 0000:00:14.2 + 834eb000-834ebfff : 0000:00:16.0 + 834ee000-834eefff : 0000:00:1a.0 + 834ee000-834eefff : mmc0 + 834ef000-834effff : 0000:00:1a.1 + 834f2000-834f2fff : 0000:00:1e.4 + 834f3000-834f30ff : 0000:00:1f.4 + 834f5000-834f57ff : 0000:00:17.0 + 834f5000-834f57ff : ahci + 834f6000-834f60ff : 0000:00:17.0 + 834f6000-834f60ff : ahci + 83500000-8353ffff : 0000:00:1d.1 + c0000000-cfffffff : PCI MMCONFIG 0000 [bus 00-ff] + c0000000-cfffffff : pnp 00:03 + fd000000-fd68ffff : pnp 00:04 + fd690000-fd69ffff : INTC1020:00 + fd6a0000-fd6affff : INTC1020:00 + fd6b0000-fd6bffff : INTC1020:00 + fd6c0000-fd6cffff : INTC1020:00 + fd6d0000-fd6dffff : INTC1020:00 + fd6e0000-fd6effff : INTC1020:00 + fd6f0000-fdffffff : pnp 00:04 + fe000000-fe01ffff : pnp 00:04 + fe032000-fe032fff : pnp 00:02 + fe033000-fe033fff : pnp 00:02 + fe200000-fe7fffff : pnp 00:04 + fec00000-fec003ff : IOAPIC 0 + fec80000-fecfffff : pnp 00:03 + fed00000-fed003ff : HPET 0 + fed00000-fed003ff : PNP0103:00 + fed20000-fed7ffff : Reserved + fed20000-fed7ffff : pnp 00:03 + fed90000-fed93fff : pnp 00:03 + feda0000-feda0fff : pnp 00:03 + feda1000-feda1fff : pnp 00:03 + fee00000-feefffff : pnp 00:03 + fee00000-fee00fff : Local APIC + ff300000-ffffffff : Reserved + 100000000-28fffffff : System RAM + 178800000-1798010f0 : Kernel code + 1798010f1-179f79dff : Kernel data + 17a147000-17a3fffff : Kernel bss + + + + /dev/nvme0n1p3: TYPE="ext4" + /dev/sda3: TYPE="ext4" + /dev/mmcblk0p3: TYPE="ext4" + + + + seri:/dev/ttyS0 type:mmio base:0x83449000 irq:33 bdf:"00:19.2" + seri:/dev/ttyS1 type:mmio base:0x8344A000 irq:16 bdf:"00:1e.0" + seri:/dev/ttyS2 type:mmio base:0x8344B000 irq:17 bdf:"00:1e.1" + seri:/dev/ttyS3 type:mmio base:0xfe042000 irq:3 + + + + 4, 5, 6, 7, 10, 11, 12, 13, 14, 15 + + + + 7960904 kB + + + + 0, 1, 2, 3 + + + + 16 + + + diff --git a/misc/config_tools/data/generic/hybrid.xml b/misc/config_tools/data/generic/hybrid.xml new file mode 100644 index 000000000..e0b2d1b84 --- /dev/null +++ b/misc/config_tools/data/generic/hybrid.xml @@ -0,0 +1,225 @@ + + + + + n + /dev/ttyS0 + 5 + 5 + 3 + 7 + 0x40000 + + + y + SCHED_BVT + y + + n + n + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + + y + n + y + n + n + + n + + + + + 0x2000 + + + 0x00010000 + 0x200000000 + 0x400000000 + 0x400000000 + + + 0x100 + 256 + 1 + 96 + 120 + 256 + 64 + 16 + + + 0x00000010 + + + + SAFETY_VM + ACRN PRE-LAUNCHED VM0 + + 0 + + + 3 + + + + + 0 + + + 0 + 0 + + + 0x100000000 + 0x20000000 + 0x0 + 0x0 + + + Zephyr + KERNEL_ZEPHYR + Zephyr_RawImage + + reboot=acpi + 0x8000 + 0x8000 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + COM2_BASE + COM2_IRQ + 1 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + + + n + n + + + + SOS_VM + ACRN SOS VM + + 0 + + + 0 + 1 + 2 + + + 0 + 0 + 0 + + + 0 + CONFIG_SOS_RAM_SIZE + + + ACRN Service OS + KERNEL_BZIMAGE + Linux_bzImage + + SOS_VM_BOOTARGS + + + VUART_LEGACY_PIO + SOS_COM1_BASE + SOS_COM1_IRQ + + + VUART_LEGACY_PIO + SOS_COM2_BASE + SOS_COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + + + /dev/sda3 + + rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 + i915.nuclear_pageflip=1 swiotlb=131072 + + + + + POST_STD_VM + + 0 + + + 2 + + + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 0 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + diff --git a/misc/config_tools/data/generic/hybrid_rt.xml b/misc/config_tools/data/generic/hybrid_rt.xml new file mode 100644 index 000000000..a0d25b672 --- /dev/null +++ b/misc/config_tools/data/generic/hybrid_rt.xml @@ -0,0 +1,261 @@ + + + + + n + /dev/ttyS0 + 5 + 5 + 3 + 7 + 0x40000 + + + y + SCHED_BVT + y + + n + n + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + + y + n + y + n + n + + y + hv:/shm_region_0, 2, 0:2 + + + + 0x2000 + + + 0x00010000 + 0x200000000 + 0x400000000 + 0x400000000 + + + 0x100 + 256 + 1 + 96 + 120 + 256 + 64 + 16 + + + 0x00000010 + + + + + PRE_RT_VM + ACRN PRE-LAUNCHED VM0 + + GUEST_FLAG_LAPIC_PASSTHROUGH + GUEST_FLAG_RT + + + 2 + 3 + + + 0 + 0 + + + 0 + 0 + + + 0x100000000 + 0x40000000 + 0x0 + 0x0 + + + PREEMPT-RT + KERNEL_BZIMAGE + RT_bzImage + + rw rootwait root=/dev/sda3 no_ipi_broadcast=1 console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel consoleblank=0 tsc=reliable clocksource=tsc x2apic_phys processor.max_cstate=0 intel_idle.max_cstate=0 intel_pstate=disable mce=ignore_ce audit=0 isolcpus=nohz,domain,1 nohz_full=1 rcu_nocbs=1 nosoftlockup idle=poll irqaffinity=0 reboot=acpi + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + COM2_BASE + COM2_IRQ + 1 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + 00:17.0 SATA controller: Intel Corporation Device 4b63 + 00:1d.2 Ethernet controller: Intel Corporation Device 4bb0 + + + y + + + + SOS_VM + ACRN SOS VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + CONFIG_SOS_RAM_SIZE + + + ACRN Service OS + KERNEL_BZIMAGE + Linux_bzImage + + SOS_VM_BOOTARGS + + + VUART_LEGACY_PIO + SOS_COM1_BASE + SOS_COM1_IRQ + + + VUART_LEGACY_PIO + SOS_COM2_BASE + SOS_COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 0 + 1 + + + + + + /dev/nvme0n1p3 + + rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 + i915.nuclear_pageflip=1 swiotlb=131072 + + + + + POST_STD_VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 0 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 0 + 1 + + + + POST_STD_VM + + 0 + + + 1 + + + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 0 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + diff --git a/misc/config_tools/data/generic/industry.xml b/misc/config_tools/data/generic/industry.xml new file mode 100644 index 000000000..ad83365b0 --- /dev/null +++ b/misc/config_tools/data/generic/industry.xml @@ -0,0 +1,384 @@ + + + + + n + /dev/ttyS3 + 5 + 5 + 3 + 7 + 0x40000 + + + y + SCHED_BVT + y + + y + n + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + + y + n + y + n + n + + n + + + + + 0x2000 + + + 0x00010000 + 0x200000000 + 0x400000000 + 0x400000000 + + + 0x100 + 256 + 1 + 96 + 120 + 256 + 64 + 16 + + + 0x00000010 + + + + SOS_VM + ACRN SOS VM + + 0 + + + 0 + + + 0 + 0x20000000 + + + ACRN Service OS + KERNEL_BZIMAGE + Linux_bzImage + + SOS_VM_BOOTARGS + + + VUART_LEGACY_PIO + SOS_COM1_BASE + SOS_COM1_IRQ + + + VUART_LEGACY_PIO + SOS_COM2_BASE + SOS_COM2_IRQ + 2 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + + + /dev/nvme0n1p3 + + rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 + i915.nuclear_pageflip=1 swiotlb=131072 + + + + + POST_STD_VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + POST_RT_VM + + 0 + + + 2 + 3 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + COM2_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + POST_STD_VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + POST_STD_VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + POST_STD_VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + POST_STD_VM + + 0 + + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + KATA_VM + + 0 + 1 + + + 0 + 0 + + + 0 + 0 + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + INVALID_COM_BASE + COM2_IRQ + 0 + 0 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + diff --git a/misc/vm_configs/xmls/config-xmls/generic/industry_launch_2uos.xml b/misc/config_tools/data/generic/industry_launch_2uos.xml similarity index 78% rename from misc/vm_configs/xmls/config-xmls/generic/industry_launch_2uos.xml rename to misc/config_tools/data/generic/industry_launch_2uos.xml index 2ff04f3dc..5472babe6 100644 --- a/misc/vm_configs/xmls/config-xmls/generic/industry_launch_2uos.xml +++ b/misc/config_tools/data/generic/industry_launch_2uos.xml @@ -1,9 +1,9 @@ - - - - + WINDOWS + no + 4096 + gvtd ovmf Enable @@ -20,7 +20,7 @@ - + @@ -34,20 +34,21 @@ - + WaaG - + ./win10-ltsc.img + - - - - + PREEMPT-RT LINUX + Hard RT + 1024 + ovmf Disable - + vuart1(tty) @@ -78,7 +79,7 @@ - + @stdio:stdio_port diff --git a/misc/config_tools/data/generic/logical_partition.xml b/misc/config_tools/data/generic/logical_partition.xml new file mode 100644 index 000000000..ff245895a --- /dev/null +++ b/misc/config_tools/data/generic/logical_partition.xml @@ -0,0 +1,194 @@ + + + + + n + /dev/ttyS0 + 5 + 5 + 3 + 7 + 0x40000 + + + y + SCHED_BVT + y + + n + n + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + 0xfff + + y + n + y + n + n + + n + + + + + 0x2000 + + + 0x00010000 + 0x200000000 + 0x400000000 + 0x400000000 + + + 0x100 + 256 + 1 + 96 + 120 + 64 + 64 + 16 + + + 0x00000010 + + + + PRE_STD_VM + ACRN PRE-LAUNCHED VM0 + + + + + + 0 + 2 + + + 0 + 0 + + + 0 + 0 + + + 0x100000000 + 0x20000000 + 0x0 + 0x0 + + + YOCTO + KERNEL_BZIMAGE + Linux_bzImage + + + rw rootwait root=/dev/sda3 console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel log_buf_len=16M consoleblank=0 tsc=reliable reboot=acpi + + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + COM2_BASE + COM2_IRQ + 1 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + + + + n + + + + PRE_STD_VM + ACRN PRE-LAUNCHED VM1 + + + + + 1 + 3 + + + 0 + 0 + + + 0 + 0 + + + 0x120000000 + 0x20000000 + 0x0 + 0x0 + + + YOCTO + KERNEL_BZIMAGE + Linux_bzImage + + + rw rootwait root=/dev/sda3 console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel log_buf_len=16M + consoleblank=0 tsc=reliable reboot=acpi + + + + VUART_LEGACY_PIO + COM1_BASE + COM1_IRQ + + + VUART_LEGACY_PIO + COM2_BASE + COM2_IRQ + 0 + 1 + + + INVALID_PCI_BASE + + + INVALID_PCI_BASE + 1 + 1 + + + + + + + n + + + diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/hybrid.xml b/misc/config_tools/data/nuc6cayh/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/hybrid.xml rename to misc/config_tools/data/nuc6cayh/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/industry.xml b/misc/config_tools/data/nuc6cayh/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/industry.xml rename to misc/config_tools/data/nuc6cayh/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_1uos_hardrt.xml b/misc/config_tools/data/nuc6cayh/industry_launch_1uos_hardrt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_1uos_hardrt.xml rename to misc/config_tools/data/nuc6cayh/industry_launch_1uos_hardrt.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_1uos_vxworks.xml b/misc/config_tools/data/nuc6cayh/industry_launch_1uos_vxworks.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_1uos_vxworks.xml rename to misc/config_tools/data/nuc6cayh/industry_launch_1uos_vxworks.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_1uos_waag.xml b/misc/config_tools/data/nuc6cayh/industry_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_1uos_waag.xml rename to misc/config_tools/data/nuc6cayh/industry_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_2uos.xml b/misc/config_tools/data/nuc6cayh/industry_launch_2uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_2uos.xml rename to misc/config_tools/data/nuc6cayh/industry_launch_2uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_6uos.xml b/misc/config_tools/data/nuc6cayh/industry_launch_6uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/industry_launch_6uos.xml rename to misc/config_tools/data/nuc6cayh/industry_launch_6uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/logical_partition.xml b/misc/config_tools/data/nuc6cayh/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/logical_partition.xml rename to misc/config_tools/data/nuc6cayh/logical_partition.xml diff --git a/misc/vm_configs/xmls/board-xmls/nuc6cayh.xml b/misc/config_tools/data/nuc6cayh/nuc6cayh.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/nuc6cayh.xml rename to misc/config_tools/data/nuc6cayh/nuc6cayh.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/sdc.xml b/misc/config_tools/data/nuc6cayh/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/sdc.xml rename to misc/config_tools/data/nuc6cayh/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/sdc_launch_1uos_laag.xml b/misc/config_tools/data/nuc6cayh/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/nuc6cayh/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc6cayh/sdc_launch_1uos_zephyr.xml b/misc/config_tools/data/nuc6cayh/sdc_launch_1uos_zephyr.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc6cayh/sdc_launch_1uos_zephyr.xml rename to misc/config_tools/data/nuc6cayh/sdc_launch_1uos_zephyr.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/hybrid.xml b/misc/config_tools/data/nuc7i7dnb/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/hybrid.xml rename to misc/config_tools/data/nuc7i7dnb/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/hybrid_rt_launch_1uos_waag.xml b/misc/config_tools/data/nuc7i7dnb/hybrid_rt_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/hybrid_rt_launch_1uos_waag.xml rename to misc/config_tools/data/nuc7i7dnb/hybrid_rt_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry.xml b/misc/config_tools/data/nuc7i7dnb/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry.xml rename to misc/config_tools/data/nuc7i7dnb/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_1uos_hardrt.xml b/misc/config_tools/data/nuc7i7dnb/industry_launch_1uos_hardrt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_1uos_hardrt.xml rename to misc/config_tools/data/nuc7i7dnb/industry_launch_1uos_hardrt.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_1uos_vxworks.xml b/misc/config_tools/data/nuc7i7dnb/industry_launch_1uos_vxworks.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_1uos_vxworks.xml rename to misc/config_tools/data/nuc7i7dnb/industry_launch_1uos_vxworks.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_1uos_waag.xml b/misc/config_tools/data/nuc7i7dnb/industry_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_1uos_waag.xml rename to misc/config_tools/data/nuc7i7dnb/industry_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_2uos.xml b/misc/config_tools/data/nuc7i7dnb/industry_launch_2uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_2uos.xml rename to misc/config_tools/data/nuc7i7dnb/industry_launch_2uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_6uos.xml b/misc/config_tools/data/nuc7i7dnb/industry_launch_6uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/industry_launch_6uos.xml rename to misc/config_tools/data/nuc7i7dnb/industry_launch_6uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/logical_partition.xml b/misc/config_tools/data/nuc7i7dnb/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/logical_partition.xml rename to misc/config_tools/data/nuc7i7dnb/logical_partition.xml diff --git a/misc/vm_configs/xmls/board-xmls/nuc7i7dnb.xml b/misc/config_tools/data/nuc7i7dnb/nuc7i7dnb.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/nuc7i7dnb.xml rename to misc/config_tools/data/nuc7i7dnb/nuc7i7dnb.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/sdc.xml b/misc/config_tools/data/nuc7i7dnb/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/sdc.xml rename to misc/config_tools/data/nuc7i7dnb/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/sdc_launch_1uos_laag.xml b/misc/config_tools/data/nuc7i7dnb/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/nuc7i7dnb/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/config-xmls/nuc7i7dnb/sdc_launch_1uos_zephyr.xml b/misc/config_tools/data/nuc7i7dnb/sdc_launch_1uos_zephyr.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/nuc7i7dnb/sdc_launch_1uos_zephyr.xml rename to misc/config_tools/data/nuc7i7dnb/sdc_launch_1uos_zephyr.xml diff --git a/misc/vm_configs/xmls/board-xmls/qemu.xml b/misc/config_tools/data/qemu/qemu.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/qemu.xml rename to misc/config_tools/data/qemu/qemu.xml diff --git a/misc/vm_configs/xmls/config-xmls/qemu/sdc.xml b/misc/config_tools/data/qemu/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/qemu/sdc.xml rename to misc/config_tools/data/qemu/sdc.xml diff --git a/misc/vm_configs/sample_launch_scripts/apl-mrb/acrn_guest.service b/misc/config_tools/data/sample_launch_scripts/apl-mrb/acrn_guest.service similarity index 100% rename from misc/vm_configs/sample_launch_scripts/apl-mrb/acrn_guest.service rename to misc/config_tools/data/sample_launch_scripts/apl-mrb/acrn_guest.service diff --git a/misc/vm_configs/sample_launch_scripts/apl-mrb/launch_uos.args b/misc/config_tools/data/sample_launch_scripts/apl-mrb/launch_uos.args similarity index 100% rename from misc/vm_configs/sample_launch_scripts/apl-mrb/launch_uos.args rename to misc/config_tools/data/sample_launch_scripts/apl-mrb/launch_uos.args diff --git a/misc/vm_configs/sample_launch_scripts/apl-mrb/launch_uos.sh b/misc/config_tools/data/sample_launch_scripts/apl-mrb/launch_uos.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/apl-mrb/launch_uos.sh rename to misc/config_tools/data/sample_launch_scripts/apl-mrb/launch_uos.sh diff --git a/misc/vm_configs/sample_launch_scripts/apl-mrb/runC.json b/misc/config_tools/data/sample_launch_scripts/apl-mrb/runC.json similarity index 100% rename from misc/vm_configs/sample_launch_scripts/apl-mrb/runC.json rename to misc/config_tools/data/sample_launch_scripts/apl-mrb/runC.json diff --git a/misc/vm_configs/sample_launch_scripts/apl-up2/launch_uos.sh b/misc/config_tools/data/sample_launch_scripts/apl-up2/launch_uos.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/apl-up2/launch_uos.sh rename to misc/config_tools/data/sample_launch_scripts/apl-up2/launch_uos.sh diff --git a/misc/vm_configs/sample_launch_scripts/launch_ubuntu.sh b/misc/config_tools/data/sample_launch_scripts/launch_ubuntu.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/launch_ubuntu.sh rename to misc/config_tools/data/sample_launch_scripts/launch_ubuntu.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/launch_hard_rt_vm.sh b/misc/config_tools/data/sample_launch_scripts/nuc/launch_hard_rt_vm.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/launch_hard_rt_vm.sh rename to misc/config_tools/data/sample_launch_scripts/nuc/launch_hard_rt_vm.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/launch_uos.sh b/misc/config_tools/data/sample_launch_scripts/nuc/launch_uos.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/launch_uos.sh rename to misc/config_tools/data/sample_launch_scripts/nuc/launch_uos.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/launch_vxworks.sh b/misc/config_tools/data/sample_launch_scripts/nuc/launch_vxworks.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/launch_vxworks.sh rename to misc/config_tools/data/sample_launch_scripts/nuc/launch_vxworks.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/launch_win.sh b/misc/config_tools/data/sample_launch_scripts/nuc/launch_win.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/launch_win.sh rename to misc/config_tools/data/sample_launch_scripts/nuc/launch_win.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/launch_xenomai.sh b/misc/config_tools/data/sample_launch_scripts/nuc/launch_xenomai.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/launch_xenomai.sh rename to misc/config_tools/data/sample_launch_scripts/nuc/launch_xenomai.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/launch_zephyr.sh b/misc/config_tools/data/sample_launch_scripts/nuc/launch_zephyr.sh similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/launch_zephyr.sh rename to misc/config_tools/data/sample_launch_scripts/nuc/launch_zephyr.sh diff --git a/misc/vm_configs/sample_launch_scripts/nuc/runC.json b/misc/config_tools/data/sample_launch_scripts/nuc/runC.json similarity index 100% rename from misc/vm_configs/sample_launch_scripts/nuc/runC.json rename to misc/config_tools/data/sample_launch_scripts/nuc/runC.json diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/hybrid.xml b/misc/config_tools/data/tgl-rvp/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/hybrid.xml rename to misc/config_tools/data/tgl-rvp/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/hybrid_rt.xml b/misc/config_tools/data/tgl-rvp/hybrid_rt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/hybrid_rt.xml rename to misc/config_tools/data/tgl-rvp/hybrid_rt.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/hybrid_rt_launch_1uos_waag.xml b/misc/config_tools/data/tgl-rvp/hybrid_rt_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/hybrid_rt_launch_1uos_waag.xml rename to misc/config_tools/data/tgl-rvp/hybrid_rt_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/industry.xml b/misc/config_tools/data/tgl-rvp/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/industry.xml rename to misc/config_tools/data/tgl-rvp/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/industry_launch_1uos_waag.xml b/misc/config_tools/data/tgl-rvp/industry_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/industry_launch_1uos_waag.xml rename to misc/config_tools/data/tgl-rvp/industry_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/industry_launch_2uos.xml b/misc/config_tools/data/tgl-rvp/industry_launch_2uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/industry_launch_2uos.xml rename to misc/config_tools/data/tgl-rvp/industry_launch_2uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/logical_partition.xml b/misc/config_tools/data/tgl-rvp/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/logical_partition.xml rename to misc/config_tools/data/tgl-rvp/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/sdc.xml b/misc/config_tools/data/tgl-rvp/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/sdc.xml rename to misc/config_tools/data/tgl-rvp/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/sdc_launch_1uos_laag.xml b/misc/config_tools/data/tgl-rvp/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/tgl-rvp/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/config-xmls/tgl-rvp/sdc_launch_1uos_zephyr.xml b/misc/config_tools/data/tgl-rvp/sdc_launch_1uos_zephyr.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/tgl-rvp/sdc_launch_1uos_zephyr.xml rename to misc/config_tools/data/tgl-rvp/sdc_launch_1uos_zephyr.xml diff --git a/misc/vm_configs/xmls/board-xmls/tgl-rvp.xml b/misc/config_tools/data/tgl-rvp/tgl-rvp.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/tgl-rvp.xml rename to misc/config_tools/data/tgl-rvp/tgl-rvp.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/hybrid.xml b/misc/config_tools/data/whl-ipc-i5/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/hybrid.xml rename to misc/config_tools/data/whl-ipc-i5/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/hybrid_rt.xml b/misc/config_tools/data/whl-ipc-i5/hybrid_rt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/hybrid_rt.xml rename to misc/config_tools/data/whl-ipc-i5/hybrid_rt.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/hybrid_rt_launch_1uos_waag.xml b/misc/config_tools/data/whl-ipc-i5/hybrid_rt_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/hybrid_rt_launch_1uos_waag.xml rename to misc/config_tools/data/whl-ipc-i5/hybrid_rt_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry.xml b/misc/config_tools/data/whl-ipc-i5/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry.xml rename to misc/config_tools/data/whl-ipc-i5/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_1uos_hardrt.xml b/misc/config_tools/data/whl-ipc-i5/industry_launch_1uos_hardrt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_1uos_hardrt.xml rename to misc/config_tools/data/whl-ipc-i5/industry_launch_1uos_hardrt.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_1uos_vxworks.xml b/misc/config_tools/data/whl-ipc-i5/industry_launch_1uos_vxworks.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_1uos_vxworks.xml rename to misc/config_tools/data/whl-ipc-i5/industry_launch_1uos_vxworks.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_1uos_waag.xml b/misc/config_tools/data/whl-ipc-i5/industry_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_1uos_waag.xml rename to misc/config_tools/data/whl-ipc-i5/industry_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_2uos.xml b/misc/config_tools/data/whl-ipc-i5/industry_launch_2uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_2uos.xml rename to misc/config_tools/data/whl-ipc-i5/industry_launch_2uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_6uos.xml b/misc/config_tools/data/whl-ipc-i5/industry_launch_6uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/industry_launch_6uos.xml rename to misc/config_tools/data/whl-ipc-i5/industry_launch_6uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/logical_partition.xml b/misc/config_tools/data/whl-ipc-i5/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/logical_partition.xml rename to misc/config_tools/data/whl-ipc-i5/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/sdc.xml b/misc/config_tools/data/whl-ipc-i5/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/sdc.xml rename to misc/config_tools/data/whl-ipc-i5/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/sdc_launch_1uos_laag.xml b/misc/config_tools/data/whl-ipc-i5/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/whl-ipc-i5/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i5/sdc_launch_1uos_zephyr.xml b/misc/config_tools/data/whl-ipc-i5/sdc_launch_1uos_zephyr.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i5/sdc_launch_1uos_zephyr.xml rename to misc/config_tools/data/whl-ipc-i5/sdc_launch_1uos_zephyr.xml diff --git a/misc/vm_configs/xmls/board-xmls/whl-ipc-i5.xml b/misc/config_tools/data/whl-ipc-i5/whl-ipc-i5.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/whl-ipc-i5.xml rename to misc/config_tools/data/whl-ipc-i5/whl-ipc-i5.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/hybrid.xml b/misc/config_tools/data/whl-ipc-i7/hybrid.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/hybrid.xml rename to misc/config_tools/data/whl-ipc-i7/hybrid.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/hybrid_rt.xml b/misc/config_tools/data/whl-ipc-i7/hybrid_rt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/hybrid_rt.xml rename to misc/config_tools/data/whl-ipc-i7/hybrid_rt.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/hybrid_rt_launch_1uos_waag.xml b/misc/config_tools/data/whl-ipc-i7/hybrid_rt_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/hybrid_rt_launch_1uos_waag.xml rename to misc/config_tools/data/whl-ipc-i7/hybrid_rt_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry.xml b/misc/config_tools/data/whl-ipc-i7/industry.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry.xml rename to misc/config_tools/data/whl-ipc-i7/industry.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_1uos_hardrt.xml b/misc/config_tools/data/whl-ipc-i7/industry_launch_1uos_hardrt.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_1uos_hardrt.xml rename to misc/config_tools/data/whl-ipc-i7/industry_launch_1uos_hardrt.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_1uos_vxworks.xml b/misc/config_tools/data/whl-ipc-i7/industry_launch_1uos_vxworks.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_1uos_vxworks.xml rename to misc/config_tools/data/whl-ipc-i7/industry_launch_1uos_vxworks.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_1uos_waag.xml b/misc/config_tools/data/whl-ipc-i7/industry_launch_1uos_waag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_1uos_waag.xml rename to misc/config_tools/data/whl-ipc-i7/industry_launch_1uos_waag.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_2uos.xml b/misc/config_tools/data/whl-ipc-i7/industry_launch_2uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_2uos.xml rename to misc/config_tools/data/whl-ipc-i7/industry_launch_2uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_6uos.xml b/misc/config_tools/data/whl-ipc-i7/industry_launch_6uos.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/industry_launch_6uos.xml rename to misc/config_tools/data/whl-ipc-i7/industry_launch_6uos.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/logical_partition.xml b/misc/config_tools/data/whl-ipc-i7/logical_partition.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/logical_partition.xml rename to misc/config_tools/data/whl-ipc-i7/logical_partition.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/sdc.xml b/misc/config_tools/data/whl-ipc-i7/sdc.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/sdc.xml rename to misc/config_tools/data/whl-ipc-i7/sdc.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/sdc_launch_1uos_laag.xml b/misc/config_tools/data/whl-ipc-i7/sdc_launch_1uos_laag.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/sdc_launch_1uos_laag.xml rename to misc/config_tools/data/whl-ipc-i7/sdc_launch_1uos_laag.xml diff --git a/misc/vm_configs/xmls/config-xmls/whl-ipc-i7/sdc_launch_1uos_zephyr.xml b/misc/config_tools/data/whl-ipc-i7/sdc_launch_1uos_zephyr.xml similarity index 100% rename from misc/vm_configs/xmls/config-xmls/whl-ipc-i7/sdc_launch_1uos_zephyr.xml rename to misc/config_tools/data/whl-ipc-i7/sdc_launch_1uos_zephyr.xml diff --git a/misc/vm_configs/xmls/board-xmls/whl-ipc-i7.xml b/misc/config_tools/data/whl-ipc-i7/whl-ipc-i7.xml similarity index 100% rename from misc/vm_configs/xmls/board-xmls/whl-ipc-i7.xml rename to misc/config_tools/data/whl-ipc-i7/whl-ipc-i7.xml diff --git a/misc/acrn-config/hv_config/board_defconfig.py b/misc/config_tools/hv_config/board_defconfig.py similarity index 100% rename from misc/acrn-config/hv_config/board_defconfig.py rename to misc/config_tools/hv_config/board_defconfig.py diff --git a/misc/acrn-config/hv_config/hv_item.py b/misc/config_tools/hv_config/hv_item.py similarity index 100% rename from misc/acrn-config/hv_config/hv_item.py rename to misc/config_tools/hv_config/hv_item.py diff --git a/misc/acrn-config/kconfig/LICENSE.kconfiglib b/misc/config_tools/kconfig/LICENSE.kconfiglib similarity index 100% rename from misc/acrn-config/kconfig/LICENSE.kconfiglib rename to misc/config_tools/kconfig/LICENSE.kconfiglib diff --git a/misc/acrn-config/kconfig/defconfig.py b/misc/config_tools/kconfig/defconfig.py similarity index 100% rename from misc/acrn-config/kconfig/defconfig.py rename to misc/config_tools/kconfig/defconfig.py diff --git a/misc/acrn-config/kconfig/generate_header.py b/misc/config_tools/kconfig/generate_header.py similarity index 100% rename from misc/acrn-config/kconfig/generate_header.py rename to misc/config_tools/kconfig/generate_header.py diff --git a/misc/acrn-config/kconfig/savedefconfig.py b/misc/config_tools/kconfig/savedefconfig.py similarity index 100% rename from misc/acrn-config/kconfig/savedefconfig.py rename to misc/config_tools/kconfig/savedefconfig.py diff --git a/misc/acrn-config/kconfig/silentoldconfig.py b/misc/config_tools/kconfig/silentoldconfig.py similarity index 100% rename from misc/acrn-config/kconfig/silentoldconfig.py rename to misc/config_tools/kconfig/silentoldconfig.py diff --git a/misc/acrn-config/launch_config/README b/misc/config_tools/launch_config/README similarity index 100% rename from misc/acrn-config/launch_config/README rename to misc/config_tools/launch_config/README diff --git a/misc/acrn-config/launch_config/com.py b/misc/config_tools/launch_config/com.py similarity index 100% rename from misc/acrn-config/launch_config/com.py rename to misc/config_tools/launch_config/com.py diff --git a/misc/acrn-config/launch_config/launch_cfg_gen.py b/misc/config_tools/launch_config/launch_cfg_gen.py similarity index 99% rename from misc/acrn-config/launch_config/launch_cfg_gen.py rename to misc/config_tools/launch_config/launch_cfg_gen.py index 955bf5286..ed42e6af0 100644 --- a/misc/acrn-config/launch_config/launch_cfg_gen.py +++ b/misc/config_tools/launch_config/launch_cfg_gen.py @@ -13,7 +13,7 @@ import com import common ACRN_PATH = common.SOURCE_ROOT_DIR -ACRN_CONFIG_DEF = ACRN_PATH + '/misc/vm_configs/xmls/config-xmls/' +ACRN_CONFIG_DEF = ACRN_PATH + '/misc/config_tools/data/' def get_launch_item_values(board_info, scenario_info=None): diff --git a/misc/acrn-config/launch_config/launch_item.py b/misc/config_tools/launch_config/launch_item.py similarity index 100% rename from misc/acrn-config/launch_config/launch_item.py rename to misc/config_tools/launch_config/launch_item.py diff --git a/misc/acrn-config/launch_config/pt.py b/misc/config_tools/launch_config/pt.py similarity index 100% rename from misc/acrn-config/launch_config/pt.py rename to misc/config_tools/launch_config/pt.py diff --git a/misc/acrn-config/library/board_cfg_lib.py b/misc/config_tools/library/board_cfg_lib.py similarity index 100% rename from misc/acrn-config/library/board_cfg_lib.py rename to misc/config_tools/library/board_cfg_lib.py diff --git a/misc/acrn-config/library/common.py b/misc/config_tools/library/common.py similarity index 99% rename from misc/acrn-config/library/common.py rename to misc/config_tools/library/common.py index 5c5dfd496..69175b420 100644 --- a/misc/acrn-config/library/common.py +++ b/misc/config_tools/library/common.py @@ -15,7 +15,7 @@ import lxml ACRN_CONFIG_TARGET = '' SOURCE_ROOT_DIR = os.path.join(os.path.dirname(os.path.abspath(__file__)), '../../../') -HV_LICENSE_FILE = SOURCE_ROOT_DIR + 'misc/acrn-config/library/hypervisor_license' +HV_LICENSE_FILE = SOURCE_ROOT_DIR + 'misc/config_tools/library/hypervisor_license' PY_CACHES = ["__pycache__", "../board_config/__pycache__", "../scenario_config/__pycache__"] diff --git a/misc/acrn-config/library/hv_cfg_lib.py b/misc/config_tools/library/hv_cfg_lib.py similarity index 100% rename from misc/acrn-config/library/hv_cfg_lib.py rename to misc/config_tools/library/hv_cfg_lib.py diff --git a/misc/acrn-config/library/hypervisor_license b/misc/config_tools/library/hypervisor_license similarity index 100% rename from misc/acrn-config/library/hypervisor_license rename to misc/config_tools/library/hypervisor_license diff --git a/misc/acrn-config/library/launch_cfg_lib.py b/misc/config_tools/library/launch_cfg_lib.py similarity index 100% rename from misc/acrn-config/library/launch_cfg_lib.py rename to misc/config_tools/library/launch_cfg_lib.py diff --git a/misc/acrn-config/library/scenario_cfg_lib.py b/misc/config_tools/library/scenario_cfg_lib.py similarity index 100% rename from misc/acrn-config/library/scenario_cfg_lib.py rename to misc/config_tools/library/scenario_cfg_lib.py diff --git a/misc/acrn-config/scenario_config/README b/misc/config_tools/scenario_config/README similarity index 100% rename from misc/acrn-config/scenario_config/README rename to misc/config_tools/scenario_config/README diff --git a/misc/acrn-config/scenario_config/ivshmem_cfg_h.py b/misc/config_tools/scenario_config/ivshmem_cfg_h.py similarity index 100% rename from misc/acrn-config/scenario_config/ivshmem_cfg_h.py rename to misc/config_tools/scenario_config/ivshmem_cfg_h.py diff --git a/misc/acrn-config/scenario_config/pci_dev_c.py b/misc/config_tools/scenario_config/pci_dev_c.py similarity index 100% rename from misc/acrn-config/scenario_config/pci_dev_c.py rename to misc/config_tools/scenario_config/pci_dev_c.py diff --git a/misc/acrn-config/scenario_config/pt_intx_c.py b/misc/config_tools/scenario_config/pt_intx_c.py similarity index 100% rename from misc/acrn-config/scenario_config/pt_intx_c.py rename to misc/config_tools/scenario_config/pt_intx_c.py diff --git a/misc/acrn-config/scenario_config/scenario_cfg_gen.py b/misc/config_tools/scenario_config/scenario_cfg_gen.py similarity index 99% rename from misc/acrn-config/scenario_config/scenario_cfg_gen.py rename to misc/config_tools/scenario_config/scenario_cfg_gen.py index 4328a6719..da2e70757 100755 --- a/misc/acrn-config/scenario_config/scenario_cfg_gen.py +++ b/misc/config_tools/scenario_config/scenario_cfg_gen.py @@ -24,7 +24,7 @@ from hv_item import HvInfo import asl_gen ACRN_PATH = common.SOURCE_ROOT_DIR -ACRN_CONFIG_DEF = ACRN_PATH + 'misc/vm_configs/scenarios/' +ACRN_CONFIG_DEF = ACRN_PATH + 'misc/config_tools/data/' GEN_FILE = ["vm_configurations.h", "vm_configurations.c", "pci_dev.c", ".config", "ivshmem_cfg.h", "pt_intx.c"] diff --git a/misc/acrn-config/scenario_config/scenario_item.py b/misc/config_tools/scenario_config/scenario_item.py similarity index 100% rename from misc/acrn-config/scenario_config/scenario_item.py rename to misc/config_tools/scenario_config/scenario_item.py diff --git a/misc/acrn-config/scenario_config/vm_configurations_c.py b/misc/config_tools/scenario_config/vm_configurations_c.py similarity index 100% rename from misc/acrn-config/scenario_config/vm_configurations_c.py rename to misc/config_tools/scenario_config/vm_configurations_c.py diff --git a/misc/acrn-config/scenario_config/vm_configurations_h.py b/misc/config_tools/scenario_config/vm_configurations_h.py similarity index 100% rename from misc/acrn-config/scenario_config/vm_configurations_h.py rename to misc/config_tools/scenario_config/vm_configurations_h.py diff --git a/misc/acrn-config/static_allocators/hv_ram.py b/misc/config_tools/static_allocators/hv_ram.py similarity index 100% rename from misc/acrn-config/static_allocators/hv_ram.py rename to misc/config_tools/static_allocators/hv_ram.py diff --git a/misc/acrn-config/static_allocators/main.py b/misc/config_tools/static_allocators/main.py similarity index 100% rename from misc/acrn-config/static_allocators/main.py rename to misc/config_tools/static_allocators/main.py diff --git a/misc/acrn-config/target/README b/misc/config_tools/target/README similarity index 100% rename from misc/acrn-config/target/README rename to misc/config_tools/target/README diff --git a/misc/acrn-config/target/acpi.py b/misc/config_tools/target/acpi.py similarity index 100% rename from misc/acrn-config/target/acpi.py rename to misc/config_tools/target/acpi.py diff --git a/misc/acrn-config/target/board_parser.py b/misc/config_tools/target/board_parser.py similarity index 100% rename from misc/acrn-config/target/board_parser.py rename to misc/config_tools/target/board_parser.py diff --git a/misc/acrn-config/target/clos.py b/misc/config_tools/target/clos.py similarity index 100% rename from misc/acrn-config/target/clos.py rename to misc/config_tools/target/clos.py diff --git a/misc/acrn-config/target/dmar.py b/misc/config_tools/target/dmar.py similarity index 100% rename from misc/acrn-config/target/dmar.py rename to misc/config_tools/target/dmar.py diff --git a/misc/acrn-config/target/dmi.py b/misc/config_tools/target/dmi.py similarity index 100% rename from misc/acrn-config/target/dmi.py rename to misc/config_tools/target/dmi.py diff --git a/misc/acrn-config/target/misc.py b/misc/config_tools/target/misc.py similarity index 100% rename from misc/acrn-config/target/misc.py rename to misc/config_tools/target/misc.py diff --git a/misc/acrn-config/target/parser_lib.py b/misc/config_tools/target/parser_lib.py similarity index 100% rename from misc/acrn-config/target/parser_lib.py rename to misc/config_tools/target/parser_lib.py diff --git a/misc/acrn-config/target/pci_dev.py b/misc/config_tools/target/pci_dev.py similarity index 100% rename from misc/acrn-config/target/pci_dev.py rename to misc/config_tools/target/pci_dev.py diff --git a/misc/acrn-config/xforms/config.h.xsl b/misc/config_tools/xforms/config.h.xsl similarity index 100% rename from misc/acrn-config/xforms/config.h.xsl rename to misc/config_tools/xforms/config.h.xsl diff --git a/misc/acrn-config/xforms/config.mk.xsl b/misc/config_tools/xforms/config.mk.xsl similarity index 100% rename from misc/acrn-config/xforms/config.mk.xsl rename to misc/config_tools/xforms/config.mk.xsl diff --git a/misc/acrn-config/xforms/config_common.xsl b/misc/config_tools/xforms/config_common.xsl similarity index 100% rename from misc/acrn-config/xforms/config_common.xsl rename to misc/config_tools/xforms/config_common.xsl diff --git a/misc/vm_configs/boards/cfl-k700-i7/board.c b/misc/vm_configs/boards/cfl-k700-i7/board.c deleted file mode 100644 index 8d7673e94..000000000 --- a/misc/vm_configs/boards/cfl-k700-i7/board.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: INSYDE Corp. - * Version: Z01-0001A027 - * Release Date: 10/14/2019 - * BIOS Revision: 1.28 - * - * Base Board Information - * Manufacturer: Logic Supply - * Product Name: RXM-181 - * Version: Type2 - Board Version - */ - -#include -#include -#include -#include -#include - -static struct dmar_dev_scope drhd0_dev_scope[DRHD0_DEV_CNT] = { - { - .type = DRHD0_DEVSCOPE0_TYPE, - .id = DRHD0_DEVSCOPE0_ID, - .bus = DRHD0_DEVSCOPE0_BUS, - .devfun = DRHD0_DEVSCOPE0_PATH, - }, -}; - -static struct dmar_dev_scope drhd1_dev_scope[DRHD1_DEV_CNT] = { - { - .type = DRHD1_DEVSCOPE0_TYPE, - .id = DRHD1_DEVSCOPE0_ID, - .bus = DRHD1_DEVSCOPE0_BUS, - .devfun = DRHD1_DEVSCOPE0_PATH, - }, - { - .type = DRHD1_DEVSCOPE1_TYPE, - .id = DRHD1_DEVSCOPE1_ID, - .bus = DRHD1_DEVSCOPE1_BUS, - .devfun = DRHD1_DEVSCOPE1_PATH, - }, -}; - -static struct dmar_drhd drhd_info_array[DRHD_COUNT] = { - { - .dev_cnt = DRHD0_DEV_CNT, - .segment = DRHD0_SEGMENT, - .flags = DRHD0_FLAGS, - .reg_base_addr = DRHD0_REG_BASE, - .ignore = DRHD0_IGNORE, - .devices = drhd0_dev_scope - }, - { - .dev_cnt = DRHD1_DEV_CNT, - .segment = DRHD1_SEGMENT, - .flags = DRHD1_FLAGS, - .reg_base_addr = DRHD1_REG_BASE, - .ignore = DRHD1_IGNORE, - .devices = drhd1_dev_scope - }, -}; - -struct dmar_info plat_dmar_info = { - .drhd_count = DRHD_COUNT, - .drhd_units = drhd_info_array, -}; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES]; -#endif - -static const struct cpu_cx_data board_cpu_cx[3] = { - {{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ - {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1816UL}, 0x02U, 0x97U, 0x00U}, /* C2 */ - {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1819UL}, 0x03U, 0x40AU, 0x00U}, /* C3 */ -}; - -static const struct cpu_px_data board_cpu_px[12] = { - {0x709UL, 0x00UL, 0x0AUL, 0x0AUL, 0x002600UL, 0x002600UL}, /* P0 */ - {0x708UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001200UL, 0x001200UL}, /* P1 */ - {0x6A4UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001100UL, 0x001100UL}, /* P2 */ - {0x640UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001000UL, 0x001000UL}, /* P3 */ - {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P4 */ - {0x578UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000E00UL, 0x000E00UL}, /* P5 */ - {0x514UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000D00UL, 0x000D00UL}, /* P6 */ - {0x4B0UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000C00UL, 0x000C00UL}, /* P7 */ - {0x44CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000B00UL, 0x000B00UL}, /* P8 */ - {0x3E8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000A00UL, 0x000A00UL}, /* P9 */ - {0x384UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000900UL, 0x000900UL}, /* P10 */ - {0x320UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000800UL, 0x000800UL}, /* P11 */ -}; - -const struct cpu_state_table board_cpu_state_tbl = { - "Intel(R) Core(TM) i7-9700TE CPU @ 1.80GHz", - {(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px, - (uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx} -}; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; - -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/misc/vm_configs/boards/cfl-k700-i7/board_info.h b/misc/vm_configs/boards/cfl-k700-i7/board_info.h deleted file mode 100644 index 717df138e..000000000 --- a/misc/vm_configs/boards/cfl-k700-i7/board_info.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef BOARD_INFO_H -#define BOARD_INFO_H - -#define MAX_PCPU_NUM 8U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL -#define HI_MMIO_SIZE 0x0UL - -#endif /* BOARD_INFO_H */ diff --git a/misc/vm_configs/boards/cfl-k700-i7/pci_devices.h b/misc/vm_configs/boards/cfl-k700-i7/pci_devices.h deleted file mode 100644 index cdb4bb330..000000000 --- a/misc/vm_configs/boards/cfl-k700-i7/pci_devices.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: INSYDE Corp. - * Version: Z01-0001A027 - * Release Date: 10/14/2019 - * BIOS Revision: 1.28 - * - * Base Board Information - * Manufacturer: Logic Supply - * Product Name: RXM-181 - * Version: Type2 - Board Version - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U} - -#define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U} - -#define SYSTEM_PERIPHERAL_0 .pbdf.bits = {.b = 0x00U, .d = 0x08U, .f = 0x00U} - -#define SIGNAL_PROCESSING_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U} - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} - -#define RAM_MEMORY_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U} - -#define SERIAL_BUS_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x01U} - -#define SERIAL_BUS_CONTROLLER_2 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U} - -#define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U} - -#define COMMUNICATION_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x1EU, .f = 0x00U} - -#define SERIAL_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x03U} - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U} - -#define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1BU, .f = 0x00U} - -#define PCI_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x1BU, .f = 0x06U} - -#define PCI_BRIDGE_2 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} - -#define PCI_BRIDGE_3 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x06U} - -#define PCI_BRIDGE_4 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x07U} - -#define PCI_BRIDGE_5 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U} - -#define PCI_BRIDGE_6 .pbdf.bits = {.b = 0x03U, .d = 0x01U, .f = 0x00U} - -#define PCI_BRIDGE_7 .pbdf.bits = {.b = 0x03U, .d = 0x02U, .f = 0x00U} - -#define PCI_BRIDGE_8 .pbdf.bits = {.b = 0x03U, .d = 0x03U, .f = 0x00U} - -#define PCI_BRIDGE_9 .pbdf.bits = {.b = 0x03U, .d = 0x04U, .f = 0x00U} - -#define PCI_BRIDGE_10 .pbdf.bits = {.b = 0x03U, .d = 0x05U, .f = 0x00U} - -#define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} - -#define AUDIO_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U} - -#define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U} - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x06U} - -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x04U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_2 .pbdf.bits = {.b = 0x05U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_3 .pbdf.bits = {.b = 0x06U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_4 .pbdf.bits = {.b = 0x07U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_5 .pbdf.bits = {.b = 0x0AU, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_6 .pbdf.bits = {.b = 0x0BU, .d = 0x00U, .f = 0x00U} - -#define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x01U, .d = 0x00U, .f = 0x00U} - -#define NON_VOLATILE_MEMORY_CONTROLLER_1 .pbdf.bits = {.b = 0x09U, .d = 0x00U, .f = 0x00U} - -#endif /* PCI_DEVICES_H_ */ diff --git a/misc/vm_configs/boards/cfl-k700-i7/platform_acpi_info.h b/misc/vm_configs/boards/cfl-k700-i7/platform_acpi_info.h deleted file mode 100644 index 018f47b5a..000000000 --- a/misc/vm_configs/boards/cfl-k700-i7/platform_acpi_info.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* DO NOT MODIFY THIS FILE UNLESS YOU KNOW WHAT YOU ARE DOING! - */ - -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* - * BIOS Information - * Vendor: INSYDE Corp. - * Version: Z01-0001A027 - * Release Date: 10/14/2019 - * BIOS Revision: 1.28 - * - * Base Board Information - * Manufacturer: Logic Supply - * Product Name: RXM-181 - * Version: Type2 - Board Version - */ - -/* pm sstate data */ -#define PM1A_EVT_ADDRESS 0x1800UL -#define PM1A_EVT_ACCESS_SIZE 0x2U -#undef PM1B_EVT_SPACE_ID -#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_MEMORY -#define PM1A_CNT_ADDRESS 0x1804UL -#undef PM1B_CNT_SPACE_ID -#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_MEMORY - -#define WAKE_VECTOR_32 0x8BB2F00CUL -#define WAKE_VECTOR_64 0x8BB2F018UL - -#define RESET_REGISTER_ADDRESS 0xB2UL -#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO -#define RESET_REGISTER_VALUE 0xfbU - -/* DRHD of DMAR */ -#define DRHD_COUNT 2U - -#define DRHD0_DEV_CNT 0x1U -#define DRHD0_SEGMENT 0x0U -#define DRHD0_FLAGS 0x0U -#define DRHD0_REG_BASE 0xFED90000UL -#define DRHD0_IGNORE true -#define DRHD0_DEVSCOPE0_TYPE 0x1U -#define DRHD0_DEVSCOPE0_ID 0x0U -#define DRHD0_DEVSCOPE0_BUS 0x0U -#define DRHD0_DEVSCOPE0_PATH 0x10U - -#define DRHD1_DEV_CNT 0x2U -#define DRHD1_SEGMENT 0x0U -#define DRHD1_FLAGS 0x1U -#define DRHD1_REG_BASE 0xFED91000UL -#define DRHD1_IGNORE false -#define DRHD1_DEVSCOPE0_TYPE 0x3U -#define DRHD1_DEVSCOPE0_ID 0x2U -#define DRHD1_DEVSCOPE0_BUS 0x0U -#define DRHD1_DEVSCOPE0_PATH 0xf7U -#define DRHD1_DEVSCOPE1_TYPE 0x4U -#define DRHD1_DEVSCOPE1_ID 0x0U -#define DRHD1_DEVSCOPE1_BUS 0x0U -#define DRHD1_DEVSCOPE1_PATH 0xf6U - -/* PCI mmcfg base of MCFG */ -#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL - -/* PCI mmcfg bus number of MCFG */ -#define DEFAULT_PCI_MMCFG_START_BUS 0x0U -#define DEFAULT_PCI_MMCFG_END_BUS 0xFFU - - -#endif /* PLATFORM_ACPI_INFO_H */ diff --git a/misc/vm_configs/boards/ehl-crb-b/board.c b/misc/vm_configs/boards/ehl-crb-b/board.c deleted file mode 100644 index 724133b8d..000000000 --- a/misc/vm_configs/boards/ehl-crb-b/board.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: Intel Corporation - * Version: EHLSFWI1.R00.2224.A00.2005281500 - * Release Date: 05/28/2020 - * - * Base Board Information - * Manufacturer: Intel Corporation - * Product Name: ElkhartLake LPDDR4x T3 CRB - * Version: 2 - */ - -#include -#include -#include -#include -#include - -static struct dmar_dev_scope drhd0_dev_scope[DRHD0_DEV_CNT] = { - { - .type = DRHD0_DEVSCOPE0_TYPE, - .id = DRHD0_DEVSCOPE0_ID, - .bus = DRHD0_DEVSCOPE0_BUS, - .devfun = DRHD0_DEVSCOPE0_PATH, - }, -}; - -static struct dmar_dev_scope drhd1_dev_scope[DRHD1_DEV_CNT] = { - { - .type = DRHD1_DEVSCOPE0_TYPE, - .id = DRHD1_DEVSCOPE0_ID, - .bus = DRHD1_DEVSCOPE0_BUS, - .devfun = DRHD1_DEVSCOPE0_PATH, - }, - { - .type = DRHD1_DEVSCOPE1_TYPE, - .id = DRHD1_DEVSCOPE1_ID, - .bus = DRHD1_DEVSCOPE1_BUS, - .devfun = DRHD1_DEVSCOPE1_PATH, - }, -}; - -static struct dmar_dev_scope drhd2_dev_scope[DRHD2_DEV_CNT] = { - { - .type = DRHD2_DEVSCOPE0_TYPE, - .id = DRHD2_DEVSCOPE0_ID, - .bus = DRHD2_DEVSCOPE0_BUS, - .devfun = DRHD2_DEVSCOPE0_PATH, - }, - { - .type = DRHD2_DEVSCOPE1_TYPE, - .id = DRHD2_DEVSCOPE1_ID, - .bus = DRHD2_DEVSCOPE1_BUS, - .devfun = DRHD2_DEVSCOPE1_PATH, - }, - { - .type = DRHD2_DEVSCOPE2_TYPE, - .id = DRHD2_DEVSCOPE2_ID, - .bus = DRHD2_DEVSCOPE2_BUS, - .devfun = DRHD2_DEVSCOPE2_PATH, - }, -}; - -static struct dmar_drhd drhd_info_array[DRHD_COUNT] = { - { - .dev_cnt = DRHD0_DEV_CNT, - .segment = DRHD0_SEGMENT, - .flags = DRHD0_FLAGS, - .reg_base_addr = DRHD0_REG_BASE, - .ignore = DRHD0_IGNORE, - .devices = drhd0_dev_scope - }, - { - .dev_cnt = DRHD1_DEV_CNT, - .segment = DRHD1_SEGMENT, - .flags = DRHD1_FLAGS, - .reg_base_addr = DRHD1_REG_BASE, - .ignore = DRHD1_IGNORE, - .devices = drhd1_dev_scope - }, - { - .dev_cnt = DRHD2_DEV_CNT, - .segment = DRHD2_SEGMENT, - .flags = DRHD2_FLAGS, - .reg_base_addr = DRHD2_REG_BASE, - .ignore = DRHD2_IGNORE, - .devices = drhd2_dev_scope - }, -}; - -struct dmar_info plat_dmar_info = { - .drhd_count = DRHD_COUNT, - .drhd_units = drhd_info_array, -}; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES]; -#endif - -static const struct cpu_cx_data board_cpu_cx[3] = { - {{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ - {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1816UL}, 0x02U, 0xFDU, 0x00U}, /* C2 */ - {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1819UL}, 0x03U, 0x418U, 0x00U}, /* C3 */ -}; - -static const struct cpu_px_data board_cpu_px[2] = { - {0x5DDUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P0 */ - {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P1 */ -}; - -const struct cpu_state_table board_cpu_state_tbl = { - "Genuine Intel(R) CPU 0000 @ 1.50GHz", - {(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px, - (uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx} -}; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; - -#define VMSIX_ON_MSI_DEV0 .bdf.bits = {.b = 0x00U, .d = 0x1eU, .f =0x4U}, -#define VMSIX_ON_MSI_DEV1 .bdf.bits = {.b = 0x00U, .d = 0x1dU, .f =0x1U}, -#define VMSIX_ON_MSI_DEV2 .bdf.bits = {.b = 0x00U, .d = 0x1dU, .f =0x2U}, -#define VMSIX_ON_MSI_DEV3 .bdf.bits = {.b = 0x00U, .d = 0x13U, .f =0x4U}, -#define VMSIX_ON_MSI_DEV4 .bdf.bits = {.b = 0x00U, .d = 0x13U, .f =0x5U}, -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM] = { - {VMSIX_ON_MSI_DEV0}, - {VMSIX_ON_MSI_DEV1}, - {VMSIX_ON_MSI_DEV2}, - {VMSIX_ON_MSI_DEV3}, - {VMSIX_ON_MSI_DEV4}, -}; diff --git a/misc/vm_configs/boards/ehl-crb-b/board_info.h b/misc/vm_configs/boards/ehl-crb-b/board_info.h deleted file mode 100644 index d71ce467e..000000000 --- a/misc/vm_configs/boards/ehl-crb-b/board_info.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef BOARD_INFO_H -#define BOARD_INFO_H - -#define MAX_PCPU_NUM 4U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 5U -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL -#define HI_MMIO_SIZE 0x10000000UL - -#define P2SB_BASE_GPIO_PORT_ID 0x69U -#define P2SB_MAX_GPIO_COMMUNITIES 0x6U - -#endif /* BOARD_INFO_H */ diff --git a/misc/vm_configs/boards/ehl-crb-b/pci_devices.h b/misc/vm_configs/boards/ehl-crb-b/pci_devices.h deleted file mode 100644 index a82226f10..000000000 --- a/misc/vm_configs/boards/ehl-crb-b/pci_devices.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: Intel Corporation - * Version: EHLSFWI1.R00.2224.A00.2005281500 - * Release Date: 05/28/2020 - * - * Base Board Information - * Manufacturer: Intel Corporation - * Product Name: ElkhartLake LPDDR4x T3 CRB - * Version: 2 - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U} - -#define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U} - -#define SYSTEM_PERIPHERAL_0 .pbdf.bits = {.b = 0x00U, .d = 0x08U, .f = 0x00U} - -#define SYSTEM_PERIPHERAL_1 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x10U, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x10U, .f = 0x01U} - -#define SERIAL_BUS_CONTROLLER_2 .pbdf.bits = {.b = 0x00U, .d = 0x13U, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_3 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_4 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x02U} - -#define SERIAL_BUS_CONTROLLER_5 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x03U} - -#define SERIAL_BUS_CONTROLLER_6 .pbdf.bits = {.b = 0x00U, .d = 0x19U, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_7 .pbdf.bits = {.b = 0x00U, .d = 0x1BU, .f = 0x00U} - -#define SERIAL_BUS_CONTROLLER_8 .pbdf.bits = {.b = 0x00U, .d = 0x1BU, .f = 0x01U} - -#define SERIAL_BUS_CONTROLLER_9 .pbdf.bits = {.b = 0x00U, .d = 0x1BU, .f = 0x06U} - -#define SERIAL_BUS_CONTROLLER_10 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U} - -#define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x13U, .f = 0x04U} - -#define COMMUNICATION_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x13U, .f = 0x05U} - -#define COMMUNICATION_CONTROLLER_2 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U} - -#define COMMUNICATION_CONTROLLER_3 .pbdf.bits = {.b = 0x00U, .d = 0x19U, .f = 0x02U} - -#define COMMUNICATION_CONTROLLER_4 .pbdf.bits = {.b = 0x00U, .d = 0x1EU, .f = 0x00U} - -#define COMMUNICATION_CONTROLLER_5 .pbdf.bits = {.b = 0x00U, .d = 0x1EU, .f = 0x01U} - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} - -#define RAM_MEMORY_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U} - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U} - -#define SD_HOST_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1AU, .f = 0x00U} - -#define SD_HOST_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x1AU, .f = 0x01U} - -#define NON_VGA_UNCLASSIFIED_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1AU, .f = 0x03U} - -#define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x01U} - -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x02U} - -#define ETHERNET_CONTROLLER_2 .pbdf.bits = {.b = 0x00U, .d = 0x1EU, .f = 0x04U} - -#define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} - -#define MULTIMEDIA_AUDIO_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U} - -#define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U} - -#define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x01U, .d = 0x00U, .f = 0x00U} - -#endif /* PCI_DEVICES_H_ */ diff --git a/misc/vm_configs/boards/ehl-crb-b/platform_acpi_info.h b/misc/vm_configs/boards/ehl-crb-b/platform_acpi_info.h deleted file mode 100644 index 234c85419..000000000 --- a/misc/vm_configs/boards/ehl-crb-b/platform_acpi_info.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* DO NOT MODIFY THIS FILE UNLESS YOU KNOW WHAT YOU ARE DOING! - */ - -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* - * BIOS Information - * Vendor: Intel Corporation - * Version: EHLSFWI1.R00.2224.A00.2005281500 - * Release Date: 05/28/2020 - * - * Base Board Information - * Manufacturer: Intel Corporation - * Product Name: ElkhartLake LPDDR4x T3 CRB - * Version: 2 - */ - -/* pm sstate data */ -#define PM1A_EVT_ADDRESS 0x1800UL -#define PM1A_EVT_ACCESS_SIZE 0x2U -#define PM1A_CNT_ADDRESS 0x1804UL - -#define WAKE_VECTOR_32 0x66BB000CUL -#define WAKE_VECTOR_64 0x66BB0018UL - -#define RESET_REGISTER_ADDRESS 0xCF9UL -#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO -#define RESET_REGISTER_VALUE 0x6U - -/* DRHD of DMAR */ -#define DRHD_COUNT 3U - -#define DRHD0_DEV_CNT 0x1U -#define DRHD0_SEGMENT 0x0U -#define DRHD0_FLAGS 0x0U -#define DRHD0_REG_BASE 0xFED90000UL -#define DRHD0_IGNORE true -#define DRHD0_DEVSCOPE0_TYPE 0x1U -#define DRHD0_DEVSCOPE0_ID 0x0U -#define DRHD0_DEVSCOPE0_BUS 0x0U -#define DRHD0_DEVSCOPE0_PATH 0x10U - -#define DRHD1_DEV_CNT 0x2U -#define DRHD1_SEGMENT 0x0U -#define DRHD1_FLAGS 0x1U -#define DRHD1_REG_BASE 0xFED91000UL -#define DRHD1_IGNORE false -#define DRHD1_DEVSCOPE0_TYPE 0x3U -#define DRHD1_DEVSCOPE0_ID 0x2U -#define DRHD1_DEVSCOPE0_BUS 0x0U -#define DRHD1_DEVSCOPE0_PATH 0xf7U -#define DRHD1_DEVSCOPE1_TYPE 0x4U -#define DRHD1_DEVSCOPE1_ID 0x0U -#define DRHD1_DEVSCOPE1_BUS 0x0U -#define DRHD1_DEVSCOPE1_PATH 0xf6U - -#define DRHD2_DEV_CNT 0x3U -#define DRHD2_SEGMENT 0x0U -#define DRHD2_FLAGS 0x0U -#define DRHD2_REG_BASE 0x00UL -#define DRHD2_IGNORE false -#define DRHD2_DEVSCOPE0_TYPE 0x5U -#define DRHD2_DEVSCOPE0_ID 0x3U -#define DRHD2_DEVSCOPE0_BUS 0x0U -#define DRHD2_DEVSCOPE0_PATH 0xebU -#define DRHD2_DEVSCOPE1_TYPE 0x5U -#define DRHD2_DEVSCOPE1_ID 0x4U -#define DRHD2_DEVSCOPE1_BUS 0x0U -#define DRHD2_DEVSCOPE1_PATH 0xecU -#define DRHD2_DEVSCOPE2_TYPE 0x5U -#define DRHD2_DEVSCOPE2_ID 0x5U -#define DRHD2_DEVSCOPE2_BUS 0x0U -#define DRHD2_DEVSCOPE2_PATH 0xedU - -/* PCI mmcfg base of MCFG */ -#define DEFAULT_PCI_MMCFG_BASE 0xc0000000UL - -/* PCI mmcfg bus number of MCFG */ -#define DEFAULT_PCI_MMCFG_START_BUS 0x0U -#define DEFAULT_PCI_MMCFG_END_BUS 0xFFU - - -#endif /* PLATFORM_ACPI_INFO_H */ diff --git a/misc/vm_configs/boards/nuc7i7dnb/board.c b/misc/vm_configs/boards/nuc7i7dnb/board.c deleted file mode 100644 index 219180d64..000000000 --- a/misc/vm_configs/boards/nuc7i7dnb/board.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: Intel Corp. - * Version: DNKBLi7v.86A.0065.2019.0611.1424 - * Release Date: 06/11/2019 - * BIOS Revision: 5.6 - * - * Base Board Information - * Manufacturer: Intel Corporation - * Product Name: NUC7i7DNB - * Version: J83500-204 - */ - -#include -#include -#include -#include -#include - -static struct dmar_dev_scope drhd0_dev_scope[DRHD0_DEV_CNT] = { - { - .type = DRHD0_DEVSCOPE0_TYPE, - .id = DRHD0_DEVSCOPE0_ID, - .bus = DRHD0_DEVSCOPE0_BUS, - .devfun = DRHD0_DEVSCOPE0_PATH, - }, -}; - -static struct dmar_dev_scope drhd1_dev_scope[DRHD1_DEV_CNT] = { - { - .type = DRHD1_DEVSCOPE0_TYPE, - .id = DRHD1_DEVSCOPE0_ID, - .bus = DRHD1_DEVSCOPE0_BUS, - .devfun = DRHD1_DEVSCOPE0_PATH, - }, - { - .type = DRHD1_DEVSCOPE1_TYPE, - .id = DRHD1_DEVSCOPE1_ID, - .bus = DRHD1_DEVSCOPE1_BUS, - .devfun = DRHD1_DEVSCOPE1_PATH, - }, -}; - -static struct dmar_drhd drhd_info_array[DRHD_COUNT] = { - { - .dev_cnt = DRHD0_DEV_CNT, - .segment = DRHD0_SEGMENT, - .flags = DRHD0_FLAGS, - .reg_base_addr = DRHD0_REG_BASE, - .ignore = DRHD0_IGNORE, - .devices = drhd0_dev_scope - }, - { - .dev_cnt = DRHD1_DEV_CNT, - .segment = DRHD1_SEGMENT, - .flags = DRHD1_FLAGS, - .reg_base_addr = DRHD1_REG_BASE, - .ignore = DRHD1_IGNORE, - .devices = drhd1_dev_scope - }, -}; - -struct dmar_info plat_dmar_info = { - .drhd_count = DRHD_COUNT, - .drhd_units = drhd_info_array, -}; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES]; -#endif - -static const struct cpu_cx_data board_cpu_cx[3] = { - {{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ - {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1816UL}, 0x02U, 0x97U, 0x00U}, /* C2 */ - {{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x1819UL}, 0x03U, 0x40AU, 0x00U}, /* C3 */ -}; - -static const struct cpu_px_data board_cpu_px[16] = { - {0x835UL, 0x00UL, 0x0AUL, 0x0AUL, 0x002A00UL, 0x002A00UL}, /* P0 */ - {0x834UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001500UL, 0x001500UL}, /* P1 */ - {0x76CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x001300UL, 0x001300UL}, /* P2 */ - {0x708UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001200UL, 0x001200UL}, /* P3 */ - {0x6A4UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001100UL, 0x001100UL}, /* P4 */ - {0x640UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001000UL, 0x001000UL}, /* P5 */ - {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P6 */ - {0x578UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000E00UL, 0x000E00UL}, /* P7 */ - {0x4B0UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000C00UL, 0x000C00UL}, /* P8 */ - {0x44CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000B00UL, 0x000B00UL}, /* P9 */ - {0x3E8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000A00UL, 0x000A00UL}, /* P10 */ - {0x320UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000800UL, 0x000800UL}, /* P11 */ - {0x2BCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000700UL, 0x000700UL}, /* P12 */ - {0x258UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000600UL, 0x000600UL}, /* P13 */ - {0x1F4UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000500UL, 0x000500UL}, /* P14 */ - {0x190UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000400UL, 0x000400UL}, /* P15 */ -}; - -const struct cpu_state_table board_cpu_state_tbl = { - "Intel(R) Core(TM) i7-8650U CPU @ 1.90GHz", - {(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px, - (uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx} -}; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; - -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/misc/vm_configs/boards/nuc7i7dnb/board_info.h b/misc/vm_configs/boards/nuc7i7dnb/board_info.h deleted file mode 100644 index c1f4c7491..000000000 --- a/misc/vm_configs/boards/nuc7i7dnb/board_info.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef BOARD_INFO_H -#define BOARD_INFO_H - -#define MAX_PCPU_NUM 4U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL -#define HI_MMIO_SIZE 0x0UL - -#endif /* BOARD_INFO_H */ diff --git a/misc/vm_configs/boards/nuc7i7dnb/pci_devices.h b/misc/vm_configs/boards/nuc7i7dnb/pci_devices.h deleted file mode 100644 index b9b1eddca..000000000 --- a/misc/vm_configs/boards/nuc7i7dnb/pci_devices.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: Intel Corp. - * Version: DNKBLi7v.86A.0065.2019.0611.1424 - * Release Date: 06/11/2019 - * BIOS Revision: 5.6 - * - * Base Board Information - * Manufacturer: Intel Corporation - * Product Name: NUC7i7DNB - * Version: J83500-204 - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U} - -#define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U} - -#define SYSTEM_PERIPHERAL_0 .pbdf.bits = {.b = 0x00U, .d = 0x08U, .f = 0x00U} - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} - -#define SIGNAL_PROCESSING_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U} - -#define SIGNAL_PROCESSING_CONTROLLER_1 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U} - -#define SIGNAL_PROCESSING_CONTROLLER_2 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x01U} - -#define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U} - -#define SERIAL_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x03U} - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U} - -#define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} - -#define PCI_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x00U} - -#define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} - -#define MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x02U} - -#define AUDIO_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U} - -#define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U} - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x06U} - -#define NETWORK_CONTROLLER_0 .pbdf.bits = {.b = 0x01U, .d = 0x00U, .f = 0x00U} - -#define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U} - -#endif /* PCI_DEVICES_H_ */ diff --git a/misc/vm_configs/boards/nuc7i7dnb/platform_acpi_info.h b/misc/vm_configs/boards/nuc7i7dnb/platform_acpi_info.h deleted file mode 100644 index a55a5be8f..000000000 --- a/misc/vm_configs/boards/nuc7i7dnb/platform_acpi_info.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* DO NOT MODIFY THIS FILE UNLESS YOU KNOW WHAT YOU ARE DOING! - */ - -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* - * BIOS Information - * Vendor: Intel Corp. - * Version: DNKBLi7v.86A.0065.2019.0611.1424 - * Release Date: 06/11/2019 - * BIOS Revision: 5.6 - * - * Base Board Information - * Manufacturer: Intel Corporation - * Product Name: NUC7i7DNB - * Version: J83500-204 - */ - -/* pm sstate data */ -#define PM1A_EVT_ADDRESS 0x1800UL -#define PM1A_EVT_ACCESS_SIZE 0x2U -#define PM1A_CNT_ADDRESS 0x1804UL - -#define WAKE_VECTOR_32 0x8AA09F8CUL -#define WAKE_VECTOR_64 0x8AA09F98UL - -#define RESET_REGISTER_ADDRESS 0xCF9UL -#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO -#define RESET_REGISTER_VALUE 0x6U - -/* DRHD of DMAR */ -#define DRHD_COUNT 2U - -#define DRHD0_DEV_CNT 0x1U -#define DRHD0_SEGMENT 0x0U -#define DRHD0_FLAGS 0x0U -#define DRHD0_REG_BASE 0xFED90000UL -#define DRHD0_IGNORE true -#define DRHD0_DEVSCOPE0_TYPE 0x1U -#define DRHD0_DEVSCOPE0_ID 0x0U -#define DRHD0_DEVSCOPE0_BUS 0x0U -#define DRHD0_DEVSCOPE0_PATH 0x10U - -#define DRHD1_DEV_CNT 0x2U -#define DRHD1_SEGMENT 0x0U -#define DRHD1_FLAGS 0x1U -#define DRHD1_REG_BASE 0xFED91000UL -#define DRHD1_IGNORE false -#define DRHD1_DEVSCOPE0_TYPE 0x3U -#define DRHD1_DEVSCOPE0_ID 0x2U -#define DRHD1_DEVSCOPE0_BUS 0xf0U -#define DRHD1_DEVSCOPE0_PATH 0xf8U -#define DRHD1_DEVSCOPE1_TYPE 0x4U -#define DRHD1_DEVSCOPE1_ID 0x0U -#define DRHD1_DEVSCOPE1_BUS 0x0U -#define DRHD1_DEVSCOPE1_PATH 0xf8U - -/* PCI mmcfg base of MCFG */ -#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL - -/* PCI mmcfg bus number of MCFG */ -#define DEFAULT_PCI_MMCFG_START_BUS 0x0U -#define DEFAULT_PCI_MMCFG_END_BUS 0xFFU - - -#endif /* PLATFORM_ACPI_INFO_H */ diff --git a/misc/vm_configs/boards/whl-ipc-i5/board.c b/misc/vm_configs/boards/whl-ipc-i5/board.c deleted file mode 100644 index 51e8bda5d..000000000 --- a/misc/vm_configs/boards/whl-ipc-i5/board.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -#include -#include -#include -#include -#include - -static struct dmar_dev_scope drhd0_dev_scope[DRHD0_DEV_CNT] = { - { - .type = DRHD0_DEVSCOPE0_TYPE, - .id = DRHD0_DEVSCOPE0_ID, - .bus = DRHD0_DEVSCOPE0_BUS, - .devfun = DRHD0_DEVSCOPE0_PATH, - }, -}; - -static struct dmar_dev_scope drhd1_dev_scope[DRHD1_DEV_CNT] = { - { - .type = DRHD1_DEVSCOPE0_TYPE, - .id = DRHD1_DEVSCOPE0_ID, - .bus = DRHD1_DEVSCOPE0_BUS, - .devfun = DRHD1_DEVSCOPE0_PATH, - }, - { - .type = DRHD1_DEVSCOPE1_TYPE, - .id = DRHD1_DEVSCOPE1_ID, - .bus = DRHD1_DEVSCOPE1_BUS, - .devfun = DRHD1_DEVSCOPE1_PATH, - }, -}; - -static struct dmar_drhd drhd_info_array[DRHD_COUNT] = { - { - .dev_cnt = DRHD0_DEV_CNT, - .segment = DRHD0_SEGMENT, - .flags = DRHD0_FLAGS, - .reg_base_addr = DRHD0_REG_BASE, - .ignore = DRHD0_IGNORE, - .devices = drhd0_dev_scope - }, - { - .dev_cnt = DRHD1_DEV_CNT, - .segment = DRHD1_SEGMENT, - .flags = DRHD1_FLAGS, - .reg_base_addr = DRHD1_REG_BASE, - .ignore = DRHD1_IGNORE, - .devices = drhd1_dev_scope - }, -}; - -struct dmar_info plat_dmar_info = { - .drhd_count = DRHD_COUNT, - .drhd_units = drhd_info_array, -}; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES]; -#endif - -static const struct cpu_cx_data board_cpu_cx[3] = { - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x33UL}, 0x02U, 0x97U, 0x00U}, /* C2 */ - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x60UL}, 0x03U, 0x40AU, 0x00U}, /* C3 */ -}; - -static const struct cpu_px_data board_cpu_px[6] = { - {0xBB9UL, 0x00UL, 0x0AUL, 0x0AUL, 0x002700UL, 0x002700UL}, /* P0 */ - {0xBB8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001E00UL, 0x001E00UL}, /* P1 */ - {0x708UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001200UL, 0x001200UL}, /* P2 */ - {0x640UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001000UL, 0x001000UL}, /* P3 */ - {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P4 */ - {0x3E8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000A00UL, 0x000A00UL}, /* P5 */ -}; - -const struct cpu_state_table board_cpu_state_tbl = { - "Intel(R) Core(TM) i5-8265U CPU @ 1.60GHz", - {(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px, - (uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx} -}; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; - -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/misc/vm_configs/boards/whl-ipc-i5/board_info.h b/misc/vm_configs/boards/whl-ipc-i5/board_info.h deleted file mode 100644 index c1f4c7491..000000000 --- a/misc/vm_configs/boards/whl-ipc-i5/board_info.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef BOARD_INFO_H -#define BOARD_INFO_H - -#define MAX_PCPU_NUM 4U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL -#define HI_MMIO_SIZE 0x0UL - -#endif /* BOARD_INFO_H */ diff --git a/misc/vm_configs/boards/whl-ipc-i5/pci_devices.h b/misc/vm_configs/boards/whl-ipc-i5/pci_devices.h deleted file mode 100644 index d30d3c7c3..000000000 --- a/misc/vm_configs/boards/whl-ipc-i5/pci_devices.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U} - -#define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U} - -#define SIGNAL_PROCESSING_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U} - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} - -#define RAM_MEMORY_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U} - -#define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U} - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U} - -#define SD_HOST_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1AU, .f = 0x00U} - -#define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} - -#define PCI_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x04U} - -#define PCI_BRIDGE_2 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x00U} - -#define PCI_BRIDGE_3 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x01U} - -#define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} - -#define AUDIO_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U} - -#define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U} - -#define SERIAL_BUS_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U} - -#define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x04U, .d = 0x00U, .f = 0x00U} - -#endif /* PCI_DEVICES_H_ */ diff --git a/misc/vm_configs/boards/whl-ipc-i5/platform_acpi_info.h b/misc/vm_configs/boards/whl-ipc-i5/platform_acpi_info.h deleted file mode 100644 index 276bb211a..000000000 --- a/misc/vm_configs/boards/whl-ipc-i5/platform_acpi_info.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* DO NOT MODIFY THIS FILE UNLESS YOU KNOW WHAT YOU ARE DOING! - */ - -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -/* pm sstate data */ -#define PM1A_EVT_ADDRESS 0x1800UL -#define PM1A_EVT_ACCESS_SIZE 0x2U -#define PM1A_CNT_ADDRESS 0x1804UL - /* S3 is not supported by BIOS */ - -#undef S3_PKG_VAL_PM1A -#define S3_PKG_VAL_PM1A 0x0U - -#define WAKE_VECTOR_32 0x8C8AA08CUL -#define WAKE_VECTOR_64 0x8C8AA098UL - -#define RESET_REGISTER_ADDRESS 0xCF9UL -#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO -#define RESET_REGISTER_VALUE 0x6U - -/* DRHD of DMAR */ -#define DRHD_COUNT 2U - -#define DRHD0_DEV_CNT 0x1U -#define DRHD0_SEGMENT 0x0U -#define DRHD0_FLAGS 0x0U -#define DRHD0_REG_BASE 0xFED90000UL -#define DRHD0_IGNORE true -#define DRHD0_DEVSCOPE0_TYPE 0x1U -#define DRHD0_DEVSCOPE0_ID 0x0U -#define DRHD0_DEVSCOPE0_BUS 0x0U -#define DRHD0_DEVSCOPE0_PATH 0x10U - -#define DRHD1_DEV_CNT 0x2U -#define DRHD1_SEGMENT 0x0U -#define DRHD1_FLAGS 0x1U -#define DRHD1_REG_BASE 0xFED91000UL -#define DRHD1_IGNORE false -#define DRHD1_DEVSCOPE0_TYPE 0x3U -#define DRHD1_DEVSCOPE0_ID 0x2U -#define DRHD1_DEVSCOPE0_BUS 0x0U -#define DRHD1_DEVSCOPE0_PATH 0xf7U -#define DRHD1_DEVSCOPE1_TYPE 0x4U -#define DRHD1_DEVSCOPE1_ID 0x0U -#define DRHD1_DEVSCOPE1_BUS 0x0U -#define DRHD1_DEVSCOPE1_PATH 0xf6U - -/* PCI mmcfg base of MCFG */ -#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL - -/* PCI mmcfg bus number of MCFG */ -#define DEFAULT_PCI_MMCFG_START_BUS 0x0U -#define DEFAULT_PCI_MMCFG_END_BUS 0xFFU - - -#endif /* PLATFORM_ACPI_INFO_H */ diff --git a/misc/vm_configs/boards/whl-ipc-i7/board.c b/misc/vm_configs/boards/whl-ipc-i7/board.c deleted file mode 100644 index 13a80e294..000000000 --- a/misc/vm_configs/boards/whl-ipc-i7/board.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -#include -#include -#include -#include -#include - -static struct dmar_dev_scope drhd0_dev_scope[DRHD0_DEV_CNT] = { - { - .type = DRHD0_DEVSCOPE0_TYPE, - .id = DRHD0_DEVSCOPE0_ID, - .bus = DRHD0_DEVSCOPE0_BUS, - .devfun = DRHD0_DEVSCOPE0_PATH, - }, -}; - -static struct dmar_dev_scope drhd1_dev_scope[DRHD1_DEV_CNT] = { - { - .type = DRHD1_DEVSCOPE0_TYPE, - .id = DRHD1_DEVSCOPE0_ID, - .bus = DRHD1_DEVSCOPE0_BUS, - .devfun = DRHD1_DEVSCOPE0_PATH, - }, - { - .type = DRHD1_DEVSCOPE1_TYPE, - .id = DRHD1_DEVSCOPE1_ID, - .bus = DRHD1_DEVSCOPE1_BUS, - .devfun = DRHD1_DEVSCOPE1_PATH, - }, -}; - -static struct dmar_drhd drhd_info_array[DRHD_COUNT] = { - { - .dev_cnt = DRHD0_DEV_CNT, - .segment = DRHD0_SEGMENT, - .flags = DRHD0_FLAGS, - .reg_base_addr = DRHD0_REG_BASE, - .ignore = DRHD0_IGNORE, - .devices = drhd0_dev_scope - }, - { - .dev_cnt = DRHD1_DEV_CNT, - .segment = DRHD1_SEGMENT, - .flags = DRHD1_FLAGS, - .reg_base_addr = DRHD1_REG_BASE, - .ignore = DRHD1_IGNORE, - .devices = drhd1_dev_scope - }, -}; - -struct dmar_info plat_dmar_info = { - .drhd_count = DRHD_COUNT, - .drhd_units = drhd_info_array, -}; - -#ifdef CONFIG_RDT_ENABLED -struct platform_clos_info platform_l2_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_l3_clos_array[MAX_CACHE_CLOS_NUM_ENTRIES]; -struct platform_clos_info platform_mba_clos_array[MAX_MBA_CLOS_NUM_ENTRIES]; -#endif - -static const struct cpu_cx_data board_cpu_cx[3] = { - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */ - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x33UL}, 0x02U, 0x97U, 0x00U}, /* C2 */ - {{SPACE_FFixedHW, 0x01U, 0x02U, 0x01U, 0x60UL}, 0x03U, 0x40AU, 0x00U}, /* C3 */ -}; - -static const struct cpu_px_data board_cpu_px[10] = { - {0x835UL, 0x00UL, 0x0AUL, 0x0AUL, 0x002E00UL, 0x002E00UL}, /* P0 */ - {0x834UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001500UL, 0x001500UL}, /* P1 */ - {0x7D0UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001400UL, 0x001400UL}, /* P2 */ - {0x76CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x001300UL, 0x001300UL}, /* P3 */ - {0x708UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001200UL, 0x001200UL}, /* P4 */ - {0x6A4UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001100UL, 0x001100UL}, /* P5 */ - {0x640UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001000UL, 0x001000UL}, /* P6 */ - {0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P7 */ - {0x578UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000E00UL, 0x000E00UL}, /* P8 */ - {0x514UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000D00UL, 0x000D00UL}, /* P9 */ -}; - -const struct cpu_state_table board_cpu_state_tbl = { - "Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz", - {(uint8_t)ARRAY_SIZE(board_cpu_px), board_cpu_px, - (uint8_t)ARRAY_SIZE(board_cpu_cx), board_cpu_cx} -}; -const union pci_bdf plat_hidden_pdevs[MAX_HIDDEN_PDEVS_NUM]; - -const struct vmsix_on_msi_info vmsix_on_msi_devs[MAX_VMSIX_ON_MSI_PDEVS_NUM]; diff --git a/misc/vm_configs/boards/whl-ipc-i7/board_info.h b/misc/vm_configs/boards/whl-ipc-i7/board_info.h deleted file mode 100644 index c1f4c7491..000000000 --- a/misc/vm_configs/boards/whl-ipc-i7/board_info.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef BOARD_INFO_H -#define BOARD_INFO_H - -#define MAX_PCPU_NUM 4U -#define MAX_VMSIX_ON_MSI_PDEVS_NUM 0U -#define MAX_HIDDEN_PDEVS_NUM 0U - -#define HI_MMIO_START ~0UL -#define HI_MMIO_END 0UL -#define HI_MMIO_SIZE 0x0UL - -#endif /* BOARD_INFO_H */ diff --git a/misc/vm_configs/boards/whl-ipc-i7/pci_devices.h b/misc/vm_configs/boards/whl-ipc-i7/pci_devices.h deleted file mode 100644 index d30d3c7c3..000000000 --- a/misc/vm_configs/boards/whl-ipc-i7/pci_devices.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -#ifndef PCI_DEVICES_H_ -#define PCI_DEVICES_H_ - -#define HOST_BRIDGE .pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U} - -#define VGA_COMPATIBLE_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U} - -#define SIGNAL_PROCESSING_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U} - -#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x00U} - -#define RAM_MEMORY_0 .pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x02U} - -#define COMMUNICATION_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x16U, .f = 0x00U} - -#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x17U, .f = 0x00U} - -#define SD_HOST_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1AU, .f = 0x00U} - -#define PCI_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x00U} - -#define PCI_BRIDGE_1 .pbdf.bits = {.b = 0x00U, .d = 0x1CU, .f = 0x04U} - -#define PCI_BRIDGE_2 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x00U} - -#define PCI_BRIDGE_3 .pbdf.bits = {.b = 0x00U, .d = 0x1DU, .f = 0x01U} - -#define ISA_BRIDGE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x00U} - -#define AUDIO_DEVICE_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x03U} - -#define SMBUS_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x04U} - -#define SERIAL_BUS_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x1FU, .f = 0x05U} - -#define NON_VOLATILE_MEMORY_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x00U} - -#define ETHERNET_CONTROLLER_1 .pbdf.bits = {.b = 0x04U, .d = 0x00U, .f = 0x00U} - -#endif /* PCI_DEVICES_H_ */ diff --git a/misc/vm_configs/boards/whl-ipc-i7/platform_acpi_info.h b/misc/vm_configs/boards/whl-ipc-i7/platform_acpi_info.h deleted file mode 100644 index 276bb211a..000000000 --- a/misc/vm_configs/boards/whl-ipc-i7/platform_acpi_info.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* DO NOT MODIFY THIS FILE UNLESS YOU KNOW WHAT YOU ARE DOING! - */ - -#ifndef PLATFORM_ACPI_INFO_H -#define PLATFORM_ACPI_INFO_H - -/* - * BIOS Information - * Vendor: American Megatrends Inc. - * Version: WL10R104 - * Release Date: 09/12/2019 - * BIOS Revision: 5.13 - * - * Base Board Information - * Manufacturer: Maxtang - * Product Name: WL10 - * Version: V1.0 - */ - -/* pm sstate data */ -#define PM1A_EVT_ADDRESS 0x1800UL -#define PM1A_EVT_ACCESS_SIZE 0x2U -#define PM1A_CNT_ADDRESS 0x1804UL - /* S3 is not supported by BIOS */ - -#undef S3_PKG_VAL_PM1A -#define S3_PKG_VAL_PM1A 0x0U - -#define WAKE_VECTOR_32 0x8C8AA08CUL -#define WAKE_VECTOR_64 0x8C8AA098UL - -#define RESET_REGISTER_ADDRESS 0xCF9UL -#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO -#define RESET_REGISTER_VALUE 0x6U - -/* DRHD of DMAR */ -#define DRHD_COUNT 2U - -#define DRHD0_DEV_CNT 0x1U -#define DRHD0_SEGMENT 0x0U -#define DRHD0_FLAGS 0x0U -#define DRHD0_REG_BASE 0xFED90000UL -#define DRHD0_IGNORE true -#define DRHD0_DEVSCOPE0_TYPE 0x1U -#define DRHD0_DEVSCOPE0_ID 0x0U -#define DRHD0_DEVSCOPE0_BUS 0x0U -#define DRHD0_DEVSCOPE0_PATH 0x10U - -#define DRHD1_DEV_CNT 0x2U -#define DRHD1_SEGMENT 0x0U -#define DRHD1_FLAGS 0x1U -#define DRHD1_REG_BASE 0xFED91000UL -#define DRHD1_IGNORE false -#define DRHD1_DEVSCOPE0_TYPE 0x3U -#define DRHD1_DEVSCOPE0_ID 0x2U -#define DRHD1_DEVSCOPE0_BUS 0x0U -#define DRHD1_DEVSCOPE0_PATH 0xf7U -#define DRHD1_DEVSCOPE1_TYPE 0x4U -#define DRHD1_DEVSCOPE1_ID 0x0U -#define DRHD1_DEVSCOPE1_BUS 0x0U -#define DRHD1_DEVSCOPE1_PATH 0xf6U - -/* PCI mmcfg base of MCFG */ -#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL - -/* PCI mmcfg bus number of MCFG */ -#define DEFAULT_PCI_MMCFG_START_BUS 0x0U -#define DEFAULT_PCI_MMCFG_END_BUS 0xFFU - - -#endif /* PLATFORM_ACPI_INFO_H */ diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/apic.asl deleted file mode 100644 index 25b1ab60f..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/apic.asl +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/ehl-crb-b.config b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/ehl-crb-b.config deleted file mode 100644 index d403b6ba1..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/ehl-crb-b.config +++ /dev/null @@ -1,38 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="ehl-crb-b" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x9600000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_UEFI_OS_LOADER_NAME="" -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=256 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_PCI=y -CONFIG_SERIAL_PCI_BDF=0xca -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/misc_cfg.h b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/misc_cfg.h deleted file mode 100644 index a3f18c4e6..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/misc_cfg.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 5U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "swiotlb=131072 " \ - "maxcpus=3" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U - -#define CLOS_MASK_0 0xfffU -#define CLOS_MASK_1 0xfffU -#define CLOS_MASK_2 0xfffU -#define CLOS_MASK_3 0xfffU -#define CLOS_MASK_4 0xfffU -#define CLOS_MASK_5 0xfffU -#define CLOS_MASK_6 0xfffU -#define CLOS_MASK_7 0xfffU -#define CLOS_MASK_8 0xfffU -#define CLOS_MASK_9 0xfffU -#define CLOS_MASK_10 0xfffU -#define CLOS_MASK_11 0xfffU -#define CLOS_MASK_12 0xfffU -#define CLOS_MASK_13 0xfffU -#define CLOS_MASK_14 0xfffU -#define CLOS_MASK_15 0xfffU - -#define VM0_VCPU_CLOS {0U} -#define VM1_VCPU_CLOS {0U} -#define VM2_VCPU_CLOS {0U} -#endif - -#define VM0_CONFIG_PCI_DEV_NUM 1U - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/pci_dev.c b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/pt_intx.c b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/vbar_base.h b/misc/vm_configs/scenarios/hybrid/ehl-crb-b/vbar_base.h deleted file mode 100644 index d23e4a156..000000000 --- a/misc/vm_configs/scenarios/hybrid/ehl-crb-b/vbar_base.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0x82000000UL, \ - .vbar_base[2] = PTDEV_HI_MMIO_START + 0x0UL - -#define SYSTEM_PERIPHERAL_0_VBAR .vbar_base[0] = 0x834e4000UL - -#define SYSTEM_PERIPHERAL_1_VBAR .vbar_base[0] = 0x83000000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0x83441000UL - -#define SERIAL_BUS_CONTROLLER_1_VBAR .vbar_base[0] = 0x83444000UL - -#define SERIAL_BUS_CONTROLLER_2_VBAR .vbar_base[0] = 0x834d8000UL - -#define SERIAL_BUS_CONTROLLER_3_VBAR .vbar_base[0] = 0x83445000UL - -#define SERIAL_BUS_CONTROLLER_4_VBAR .vbar_base[0] = 0x83446000UL - -#define SERIAL_BUS_CONTROLLER_5_VBAR .vbar_base[0] = 0x83447000UL - -#define SERIAL_BUS_CONTROLLER_6_VBAR .vbar_base[0] = 0x83448000UL - -#define SERIAL_BUS_CONTROLLER_7_VBAR .vbar_base[0] = 0x834da000UL - -#define SERIAL_BUS_CONTROLLER_8_VBAR .vbar_base[0] = 0x834dc000UL - -#define SERIAL_BUS_CONTROLLER_9_VBAR .vbar_base[0] = 0x834de000UL - -#define SERIAL_BUS_CONTROLLER_10_VBAR .vbar_base[0] = 0x8344c000UL, \ - .vbar_base[1] = 0x80000000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0x84600000UL - -#define COMMUNICATION_CONTROLLER_1_VBAR .vbar_base[0] = 0x845fc000UL - -#define COMMUNICATION_CONTROLLER_2_VBAR .vbar_base[0] = 0x834eb000UL - -#define COMMUNICATION_CONTROLLER_3_VBAR .vbar_base[0] = 0x83449000UL - -#define COMMUNICATION_CONTROLLER_4_VBAR .vbar_base[0] = 0x8344a000UL - -#define COMMUNICATION_CONTROLLER_5_VBAR .vbar_base[0] = 0x8344b000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0x834c0000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0x834d0000UL, \ - .vbar_base[2] = 0x834e7000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0x834e2000UL, \ - .vbar_base[1] = 0x834f6000UL, \ - .vbar_base[5] = 0x834f5000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0x834ee000UL - -#define SD_HOST_CONTROLLER_1_VBAR .vbar_base[0] = 0x834ef000UL - -#define NON_VGA_UNCLASSIFIED_DEVICE_0_VBAR .vbar_base[0] = 0x83400000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0x83500000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0x83480000UL - -#define ETHERNET_CONTROLLER_2_VBAR .vbar_base[0] = 0x83442000UL, \ - .vbar_base[2] = 0x834f2000UL - -#define MULTIMEDIA_AUDIO_CONTROLLER_0_VBAR .vbar_base[0] = 0x834d4000UL, \ - .vbar_base[4] = 0x83200000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0x834f3000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0x83300000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/apic.asl deleted file mode 100644 index 25b1ab60f..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/apic.asl +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/misc_cfg.h b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/misc_cfg.h deleted file mode 100644 index f50932532..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/misc_cfg.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=3" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_CONFIG_PCI_DEV_NUM 1U - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/nuc7i7dnb.config b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/nuc7i7dnb.config deleted file mode 100644 index dabddb24c..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/nuc7i7dnb.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="nuc7i7dnb" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x9600000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/pci_dev.c b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/pt_intx.c b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/vbar_base.h b/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/vbar_base.h deleted file mode 100644 index 8045a3194..000000000 --- a/misc/vm_configs/scenarios/hybrid/nuc7i7dnb/vbar_base.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xde000000UL, \ - .vbar_base[2] = 0xc0000000UL - -#define SYSTEM_PERIPHERAL_0_VBAR .vbar_base[0] = 0xdf252000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf230000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf251000UL - -#define SIGNAL_PROCESSING_CONTROLLER_1_VBAR .vbar_base[0] = 0xdf250000UL - -#define SIGNAL_PROCESSING_CONTROLLER_2_VBAR .vbar_base[0] = 0xdf24f000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf24e000UL - -#define SERIAL_CONTROLLER_0_VBAR .vbar_base[1] = 0xdf24d000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf248000UL, \ - .vbar_base[1] = 0xdf24c000UL, \ - .vbar_base[5] = 0xdf24b000UL - -#define MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf244000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xdf240000UL, \ - .vbar_base[4] = 0xdf220000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xdf24a000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf200000UL - -#define NETWORK_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf100000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf000000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid/vm_configurations.c b/misc/vm_configs/scenarios/hybrid/vm_configurations.c deleted file mode 100644 index 3a80461be..000000000 --- a/misc/vm_configs/scenarios/hybrid/vm_configurations.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#include -#include -#include - -extern struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; - -extern struct pt_intx_config vm0_pt_intx[1U]; - -struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = { - { /* VM0 */ - CONFIG_SAFETY_VM(1), - .name = "ACRN PRE-LAUNCHED VM0", - .cpu_affinity = VM0_CONFIG_CPU_AFFINITY, - .guest_flags = 0UL, -#ifdef CONFIG_RDT_ENABLED - .clos = VM0_VCPU_CLOS, -#endif - .memory = { - .start_hpa = VM0_CONFIG_MEM_START_HPA, - .size = VM0_CONFIG_MEM_SIZE, - .start_hpa2 = VM0_CONFIG_MEM_START_HPA2, - .size_hpa2 = VM0_CONFIG_MEM_SIZE_HPA2, - }, - .os_config = { - .name = "Zephyr", - .kernel_type = KERNEL_ZEPHYR, - .kernel_mod_tag = "Zephyr_RawImage", - .kernel_load_addr = 0x8000, - .kernel_entry_addr = 0x8000, - }, - .acpi_config = { - .acpi_mod_tag = "ACPI_VM0", - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM2_BASE, - .irq = COM2_IRQ, - .t_vuart.vm_id = 1U, - .t_vuart.vuart_id = 1U, - }, -#ifdef VM0_PASSTHROUGH_TPM - .pt_tpm2 = true, - .mmiodevs[0] = { - .base_gpa = VM0_TPM_BUFFER_BASE_ADDR_GPA, - .base_hpa = VM0_TPM_BUFFER_BASE_ADDR, - .size = VM0_TPM_BUFFER_SIZE, - }, -#endif -#ifdef P2SB_BAR_ADDR - .pt_p2sb_bar = true, - .mmiodevs[0] = { - .base_gpa = P2SB_BAR_ADDR_GPA, - .base_hpa = P2SB_BAR_ADDR, - .size = P2SB_BAR_SIZE, - }, -#endif - .pt_intx_num = VM0_PT_INTX_NUM, - .pt_intx = &vm0_pt_intx[0U], - }, - { /* VM1 */ - CONFIG_SOS_VM, - .name = "ACRN SOS VM", - - /* Allow SOS to reboot the host since there is supposed to be the highest severity guest */ - .guest_flags = 0UL, -#ifdef CONFIG_RDT_ENABLED - .clos = VM1_VCPU_CLOS, -#endif - .cpu_affinity = SOS_VM_CONFIG_CPU_AFFINITY, - .memory = { - .start_hpa = 0UL, - .size = CONFIG_SOS_RAM_SIZE, - }, - .os_config = { - .name = "ACRN Service OS", - .kernel_type = KERNEL_BZIMAGE, - .kernel_mod_tag = "Linux_bzImage", - .bootargs = SOS_VM_BOOTARGS, - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = SOS_COM1_BASE, - .irq = SOS_COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = SOS_COM2_BASE, - .irq = SOS_COM2_IRQ, - .t_vuart.vm_id = 0U, - .t_vuart.vuart_id = 1U, - }, - .pci_dev_num = 0U, - .pci_devs = sos_pci_devs, - }, - { /* VM2 */ - CONFIG_POST_STD_VM(1), -#ifdef CONFIG_RDT_ENABLED - .clos = VM2_VCPU_CLOS, -#endif - .cpu_affinity = VM2_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, -}; diff --git a/misc/vm_configs/scenarios/hybrid/vm_configurations.h b/misc/vm_configs/scenarios/hybrid/vm_configurations.h deleted file mode 100644 index 2d2ea7d9b..000000000 --- a/misc/vm_configs/scenarios/hybrid/vm_configurations.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef VM_CONFIGURATIONS_H -#define VM_CONFIGURATIONS_H - -#include -#include - -/* SOS_VM_NUM can only be 0U or 1U; - * When SOS_VM_NUM is 0U, MAX_POST_VM_NUM must be 0U too; - * MAX_POST_VM_NUM must be bigger than CONFIG_MAX_KATA_VM_NUM; - */ -#define PRE_VM_NUM 1U -#define SOS_VM_NUM 1U -#define MAX_POST_VM_NUM 1U -#define CONFIG_MAX_KATA_VM_NUM 0U - -/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */ -#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \ - GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING) - -#define VM0_CONFIG_MEM_START_HPA 0x100000000UL -#define VM0_CONFIG_MEM_SIZE 0x20000000UL -#define VM0_CONFIG_MEM_START_HPA2 0x0UL -#define VM0_CONFIG_MEM_SIZE_HPA2 0x0UL - -/* SOS_VM == VM1 */ -#define SOS_VM_BOOTARGS SOS_ROOTFS \ - SOS_CONSOLE \ - SOS_IDLE \ - SOS_BOOTARGS_DIFF - -#endif /* VM_CONFIGURATIONS_H */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/apic.asl deleted file mode 100644 index 25b1ab60f..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/apic.asl +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/misc_cfg.h b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/misc_cfg.h deleted file mode 100644 index ac820c700..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/misc_cfg.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=3" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 1U - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/pci_dev.c b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/pt_intx.c b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/vbar_base.h b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/vbar_base.h deleted file mode 100644 index d9a05b701..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/vbar_base.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141e000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1400000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141c000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1419000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa1418000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0xfe010000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1300000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/whl-ipc-i5.config b/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/whl-ipc-i5.config deleted file mode 100644 index 2963f6aae..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i5/whl-ipc-i5.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i5" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x9600000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/apic.asl deleted file mode 100644 index 25b1ab60f..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/apic.asl +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/misc_cfg.h b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/misc_cfg.h deleted file mode 100644 index ac820c700..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/misc_cfg.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=3" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 1U - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/pci_dev.c b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/pt_intx.c b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/vbar_base.h b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/vbar_base.h deleted file mode 100644 index d9a05b701..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/vbar_base.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141e000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1400000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141c000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1419000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa1418000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0xfe010000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1300000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/whl-ipc-i7.config b/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/whl-ipc-i7.config deleted file mode 100644 index b889c1154..000000000 --- a/misc/vm_configs/scenarios/hybrid/whl-ipc-i7/whl-ipc-i7.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i7" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x9600000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/dsdt.asl deleted file mode 100644 index 73bf2a93d..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/dsdt.asl +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - Device (TPM) - { - Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - Memory32Fixed (ReadWrite, - 0xFED40000, // Address Base - 0x00005000, // Address Length - ) - }) - } - -} - diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/tpm2.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/tpm2.asl deleted file mode 100644 index 2a2a08fc8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/tpm2.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [TPM2] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "TPM2" [Trusted Platform Module hardware interface table] -[0004] Table Length : 00000034 -[0001] Revision : 03 -[0001] Checksum : 67 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNTPM2" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Reserved : 00000000 -[0008] Control Address : 00000000FED40040 -[0004] Start Method : 07 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/xsdt.asl deleted file mode 100644 index 65e79728e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/VM0/xsdt.asl +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 -[0008] ACPI Table Address 3 : 000000007FF01100 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/cfl-k700-i7.config b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/cfl-k700-i7.config deleted file mode 100644 index 9ffb8e8e7..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/cfl-k700-i7.config +++ /dev/null @@ -1,38 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="cfl-k700-i7" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0xc000000 -CONFIG_PLATFORM_RAM_SIZE=0x800000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x800000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=y -CONFIG_GPU_SBDF=0x00000010 -CONFIG_UEFI_OS_LOADER_NAME="" -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/ivshmem_cfg.h deleted file mode 100644 index 3104f28d8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/ivshmem_cfg.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#include -#include - -#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0" - -/* - * The IVSHMEM_SHM_SIZE is the sum of all memory regions. - * The size range of each memory region is [2MB, 512MB] and is a power of 2. - */ -#define IVSHMEM_SHM_SIZE 0x200000UL -#define IVSHMEM_DEV_NUM 2UL - -/* All user defined memory regions */ -#define IVSHMEM_SHM_REGIONS \ - { \ - .name = IVSHMEM_SHM_REGION_0, \ - .size = 0x200000UL, /* 2M */ \ - }, - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/misc_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/misc_cfg.h deleted file mode 100644 index cd20d1383..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/misc_cfg.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/nvme0n1p3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=ttyS0,115200n8 " \ - "ignore_loglevel " \ - "no_timer_check " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=6" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(6U) | AFFINITY_CPU(7U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U) | AFFINITY_CPU(4U) | AFFINITY_CPU(5U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(4U) | AFFINITY_CPU(5U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_CONFIG_PCI_DEV_NUM 4U -#define VM2_CONFIG_PCI_DEV_NUM 1U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/nvme0n1p2 earlyprintk=serial,ttyS0,115200 \ -console=ttyS0,115200n8 log_buf_len=2M ignore_loglevel noxsave \ -nohpet no_timer_check tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/pci_dev.c b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/pci_dev.c deleted file mode 100644 index 0aa2e98a1..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/pci_dev.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ - -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(NON_VOLATILE_MEMORY_CONTROLLER_1), - }, - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x03U, .f = 0x00U}, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0, - IVSHMEM_DEVICE_0_VBAR - }, -}; - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; - -struct acrn_vm_pci_dev_config vm2_pci_devs[VM2_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.value = UNASSIGNED_VBDF, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0 - }, -}; diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/pt_intx.c b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/vbar_base.h b/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/vbar_base.h deleted file mode 100644 index 3cb6a4712..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/cfl-k700-i7/vbar_base.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SYSTEM_PERIPHERAL_0_VBAR .vbar_base[0] = 0xa1938000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1939000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1920000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1934000UL, \ - .vbar_base[2] = 0xa193a000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0x8f800000UL - -#define SERIAL_BUS_CONTROLLER_1_VBAR .vbar_base[0] = 0x8f801000UL - -#define SERIAL_BUS_CONTROLLER_2_VBAR .vbar_base[0] = 0xfe010000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa193d000UL - -#define COMMUNICATION_CONTROLLER_1_VBAR .vbar_base[0] = 0x8f802000UL - -#define SERIAL_CONTROLLER_0_VBAR .vbar_base[1] = 0xa1943000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1936000UL, \ - .vbar_base[1] = 0xa1942000UL, \ - .vbar_base[5] = 0xa1941000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1930000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa193f000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1900000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1700000UL, \ - .vbar_base[3] = 0xa1780000UL - -#define ETHERNET_CONTROLLER_2_VBAR .vbar_base[0] = 0xa1600000UL, \ - .vbar_base[3] = 0xa1680000UL - -#define ETHERNET_CONTROLLER_3_VBAR .vbar_base[0] = 0xa1500000UL, \ - .vbar_base[3] = 0xa1580000UL - -#define ETHERNET_CONTROLLER_4_VBAR .vbar_base[0] = 0xa1400000UL, \ - .vbar_base[3] = 0xa1480000UL - -#define ETHERNET_CONTROLLER_5_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1280000UL - -#define ETHERNET_CONTROLLER_6_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1180000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1800000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1300000UL - -#define IVSHMEM_DEVICE_0_VBAR .vbar_base[0] = 0x80000000UL, \ - .vbar_base[2] = 0x10000000cUL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/dsdt.asl deleted file mode 100644 index 518dff7a4..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/dsdt.asl +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - Scope (_SB) - { - Device (OTN1) - { - Name (_ADR, 0x00020000) // _ADR: Address - OperationRegion (TSRT, PCI_Config, Zero, 0x0100) - Field (TSRT, AnyAcc, NoLock, Preserve) - { - DVID, 16, - Offset (0x10), - TADL, 32, - TADH, 32 - } - } - - Device (PCS2) - { - Name (_HID, "INTC1033") // _HID: Hardware ID - Name (_UID, Zero) // _UID: Unique ID - Method (_STA, 0, NotSerialized) // _STA: Status - { - Return (0x0F) - } - - Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings - { - Name (PCSR, ResourceTemplate () - { - Memory32Fixed (ReadWrite, - 0x00000000, // Address Base - 0x00000004, // Address Length - _Y00) - Memory32Fixed (ReadWrite, - 0x00000000, // Address Base - 0x00000004, // Address Length - _Y01) - }) - CreateDWordField (PCSR, \_SB.PCS2._CRS._Y00._BAS, MAL0) // _BAS: Base Address - MAL0 = ((^^OTN1.TADL & 0xFFFFF000) + 0x0200) - CreateDWordField (PCSR, \_SB.PCS2._CRS._Y01._BAS, MDL0) // _BAS: Base Address - MDL0 = ((^^OTN1.TADL & 0xFFFFF000) + 0x0204) - Return (PCSR) /* \_SB_.PCS2._CRS.PCSR */ - } - } - } - Device (TPM) - { - Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - Memory32Fixed (ReadWrite, - 0xFED40000, // Address Base - 0x00005000, // Address Length - ) - }) - } - Name (_S5, Package () - { - 0x05, - Zero, - }) -} - diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/facp.asl deleted file mode 100644 index 74565174c..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/facp.asl +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 0000010C -[0001] Revision : 05 -[0001] Checksum : 00 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00240 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00000000 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00000000 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 00 -[0001] PM1 Control Block Length : 00 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00000000 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 0 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 1 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 1 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 01 [SystemIO] -[0001] Bit Width : 08 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 01 [Byte Access:8] -[0008] Address : 0000000000000CF9 - -[0001] Value to cause reset : 0E -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 -[0012] Sleep Control Register : [Generic Address Structure] -[0001] Space ID : 01 [SystemIO] -[0001] Bit Width : 08 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 01 [Byte Access:8] -[0008] Address : 0000000000000400 - -[0012] Sleep Status Register : [Generic Address Structure] -[0001] Space ID : 01 [SystemIO] -[0001] Bit Width : 08 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 01 [Byte Access:8] -[0008] Address : 0000000000000401 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/tpm2.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/tpm2.asl deleted file mode 100644 index 2a2a08fc8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/tpm2.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [TPM2] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "TPM2" [Trusted Platform Module hardware interface table] -[0004] Table Length : 00000034 -[0001] Revision : 03 -[0001] Checksum : 67 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNTPM2" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Reserved : 00000000 -[0008] Control Address : 00000000FED40040 -[0004] Start Method : 07 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/xsdt.asl deleted file mode 100644 index 72a586479..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/VM0/xsdt.asl +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00440 -[0008] ACPI Table Address 2 : 000000007FF00480 -[0008] ACPI Table Address 3 : 000000007FF01100 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ehl-crb-b.config b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ehl-crb-b.config deleted file mode 100644 index 960188ff0..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ehl-crb-b.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="ehl-crb-b" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0xc000000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=y -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=256 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_PCI=y -CONFIG_SERIAL_PCI_BDF=0xca -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ivshmem_cfg.h deleted file mode 100644 index 3104f28d8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/ivshmem_cfg.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#include -#include - -#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0" - -/* - * The IVSHMEM_SHM_SIZE is the sum of all memory regions. - * The size range of each memory region is [2MB, 512MB] and is a power of 2. - */ -#define IVSHMEM_SHM_SIZE 0x200000UL -#define IVSHMEM_DEV_NUM 2UL - -/* All user defined memory regions */ -#define IVSHMEM_SHM_REGIONS \ - { \ - .name = IVSHMEM_SHM_REGION_0, \ - .size = 0x200000UL, /* 2M */ \ - }, - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/misc_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/misc_cfg.h deleted file mode 100644 index f23b9bfe2..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/misc_cfg.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/nvme0n1p3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 5U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "swiotlb=131072 " \ - "maxcpus=2" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U - -#define CLOS_MASK_0 0xfffU -#define CLOS_MASK_1 0xfffU -#define CLOS_MASK_2 0xfffU -#define CLOS_MASK_3 0xfffU -#define CLOS_MASK_4 0xfffU -#define CLOS_MASK_5 0xfffU -#define CLOS_MASK_6 0xfffU -#define CLOS_MASK_7 0xfffU -#define CLOS_MASK_8 0xfffU -#define CLOS_MASK_9 0xfffU -#define CLOS_MASK_10 0xfffU -#define CLOS_MASK_11 0xfffU -#define CLOS_MASK_12 0xfffU -#define CLOS_MASK_13 0xfffU -#define CLOS_MASK_14 0xfffU -#define CLOS_MASK_15 0xfffU - -#define VM0_VCPU_CLOS {0U} -#define VM1_VCPU_CLOS {0U} -#define VM2_VCPU_CLOS {0U, 0U} -#define VM3_VCPU_CLOS {0U} -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 4U -#define VM2_CONFIG_PCI_DEV_NUM 1U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 no_ipi_broadcast=1 \ -console=ttyS0 noxsave nohpet no_timer_check \ -ignore_loglevel consoleblank=0 tsc=reliable clocksource=tsc \ -x2apic_phys processor.max_cstate=0 intel_idle.max_cstate=0 intel_pstate=disable \ -mce=ignore_ce audit=0 isolcpus=nohz,domain,1 nohz_full=1 \ -rcu_nocbs=1 nosoftlockup idle=poll irqaffinity=0 \ -reboot=acpi" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pci_dev.c b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pci_dev.c deleted file mode 100644 index 561ea86f6..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pci_dev.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ - -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(SATA_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_1), - }, - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x03U, .f = 0x00U}, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0, - IVSHMEM_DEVICE_0_VBAR - }, -}; - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; - -struct acrn_vm_pci_dev_config vm2_pci_devs[VM2_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.value = UNASSIGNED_VBDF, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0 - }, -}; diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pt_intx.c b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/vbar_base.h b/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/vbar_base.h deleted file mode 100644 index f57d2dc0b..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/ehl-crb-b/vbar_base.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define IVSHMEM_DEVICE_0_VBAR .vbar_base[0] = 0x80000000UL, \ - .vbar_base[1] = 0x80001000UL, \ - .vbar_base[2] = 0x8020000cUL - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0x82000000UL, \ - .vbar_base[2] = PTDEV_HI_MMIO_START + 0x0UL - -#define SYSTEM_PERIPHERAL_0_VBAR .vbar_base[0] = 0x834e4000UL - -#define SYSTEM_PERIPHERAL_1_VBAR .vbar_base[0] = 0x83000000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0x83441000UL - -#define SERIAL_BUS_CONTROLLER_1_VBAR .vbar_base[0] = 0x83444000UL - -#define SERIAL_BUS_CONTROLLER_2_VBAR .vbar_base[0] = 0x834d8000UL - -#define SERIAL_BUS_CONTROLLER_3_VBAR .vbar_base[0] = 0x83445000UL - -#define SERIAL_BUS_CONTROLLER_4_VBAR .vbar_base[0] = 0x83446000UL - -#define SERIAL_BUS_CONTROLLER_5_VBAR .vbar_base[0] = 0x83447000UL - -#define SERIAL_BUS_CONTROLLER_6_VBAR .vbar_base[0] = 0x83448000UL - -#define SERIAL_BUS_CONTROLLER_7_VBAR .vbar_base[0] = 0x834da000UL - -#define SERIAL_BUS_CONTROLLER_8_VBAR .vbar_base[0] = 0x834dc000UL - -#define SERIAL_BUS_CONTROLLER_9_VBAR .vbar_base[0] = 0x834de000UL - -#define SERIAL_BUS_CONTROLLER_10_VBAR .vbar_base[0] = 0x8344c000UL, \ - .vbar_base[1] = 0x80000000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0x84600000UL - -#define COMMUNICATION_CONTROLLER_1_VBAR .vbar_base[0] = 0x845fc000UL - -#define COMMUNICATION_CONTROLLER_2_VBAR .vbar_base[0] = 0x834eb000UL - -#define COMMUNICATION_CONTROLLER_3_VBAR .vbar_base[0] = 0x83449000UL - -#define COMMUNICATION_CONTROLLER_4_VBAR .vbar_base[0] = 0x8344a000UL - -#define COMMUNICATION_CONTROLLER_5_VBAR .vbar_base[0] = 0x8344b000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0x834c0000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0x834d0000UL, \ - .vbar_base[2] = 0x834e7000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0x834e2000UL, \ - .vbar_base[1] = 0x834f6000UL, \ - .vbar_base[5] = 0x834f5000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0x834ee000UL - -#define SD_HOST_CONTROLLER_1_VBAR .vbar_base[0] = 0x834ef000UL - -#define NON_VGA_UNCLASSIFIED_DEVICE_0_VBAR .vbar_base[0] = 0x83400000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0x83500000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0x83480000UL, \ - .vbar_base[2] = 0x80002000UL - -#define ETHERNET_CONTROLLER_2_VBAR .vbar_base[0] = 0x83442000UL, \ - .vbar_base[2] = 0x834f2000UL - -#define MULTIMEDIA_AUDIO_CONTROLLER_0_VBAR .vbar_base[0] = 0x834d4000UL, \ - .vbar_base[4] = 0x83200000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0x834f3000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0x83300000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/vm_configurations.c b/misc/vm_configs/scenarios/hybrid_rt/vm_configurations.c deleted file mode 100644 index 5d97420d1..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/vm_configurations.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#include -#include -#include - -extern struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM]; -extern struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; -extern struct acrn_vm_pci_dev_config vm2_pci_devs[VM2_CONFIG_PCI_DEV_NUM]; - -extern struct pt_intx_config vm0_pt_intx[1U]; - -struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = { - { /* VM0 */ - CONFIG_PRE_RT_VM(1), - .name = "ACRN PRE-LAUNCHED VM0", - .cpu_affinity = VM0_CONFIG_CPU_AFFINITY, - .guest_flags = (GUEST_FLAG_LAPIC_PASSTHROUGH | GUEST_FLAG_RT), -#ifdef CONFIG_RDT_ENABLED - .clos = VM0_VCPU_CLOS, -#endif - .memory = { - .start_hpa = VM0_CONFIG_MEM_START_HPA, - .size = VM0_CONFIG_MEM_SIZE, - .start_hpa2 = VM0_CONFIG_MEM_START_HPA2, - .size_hpa2 = VM0_CONFIG_MEM_SIZE_HPA2, - }, - .os_config = { - .name = "PREEMPT-RT", - .kernel_type = KERNEL_BZIMAGE, - .kernel_mod_tag = "RT_bzImage", - .bootargs = VM0_BOOT_ARGS, - }, - .acpi_config = { - .acpi_mod_tag = "ACPI_VM0", - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM2_BASE, - .irq = COM2_IRQ, - .t_vuart.vm_id = 1U, - .t_vuart.vuart_id = 1U, - }, - .pci_dev_num = VM0_CONFIG_PCI_DEV_NUM, - .pci_devs = vm0_pci_devs, -#ifdef VM0_PASSTHROUGH_TPM - .pt_tpm2 = true, - .mmiodevs[0] = { - .base_gpa = VM0_TPM_BUFFER_BASE_ADDR_GPA, - .base_hpa = VM0_TPM_BUFFER_BASE_ADDR, - .size = VM0_TPM_BUFFER_SIZE, - }, -#endif -#ifdef P2SB_BAR_ADDR - .pt_p2sb_bar = true, - .mmiodevs[0] = { - .base_gpa = P2SB_BAR_ADDR_GPA, - .base_hpa = P2SB_BAR_ADDR, - .size = P2SB_BAR_SIZE, - }, -#endif - .pt_intx_num = VM0_PT_INTX_NUM, - .pt_intx = &vm0_pt_intx[0U], - }, - { /* VM1 */ - CONFIG_SOS_VM, - .name = "ACRN SOS VM", - - /* Allow SOS to reboot the host since there is supposed to be the highest severity guest */ - .guest_flags = 0UL, -#ifdef CONFIG_RDT_ENABLED - .clos = VM1_VCPU_CLOS, -#endif - .cpu_affinity = SOS_VM_CONFIG_CPU_AFFINITY, - .memory = { - .start_hpa = 0UL, - .size = CONFIG_SOS_RAM_SIZE, - }, - .os_config = { - .name = "ACRN Service OS", - .kernel_type = KERNEL_BZIMAGE, - .kernel_mod_tag = "Linux_bzImage", - .bootargs = SOS_VM_BOOTARGS, - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = SOS_COM1_BASE, - .irq = SOS_COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = SOS_COM2_BASE, - .irq = SOS_COM2_IRQ, - .t_vuart.vm_id = 0U, - .t_vuart.vuart_id = 1U, - }, - .pci_dev_num = 0U, - .pci_devs = sos_pci_devs, - }, - { /* VM2 */ - CONFIG_POST_STD_VM(1), -#ifdef CONFIG_RDT_ENABLED - .clos = VM2_VCPU_CLOS, -#endif - /* The PCI device configuration is only for in-hypervisor vPCI devices. */ - .pci_dev_num = VM2_CONFIG_PCI_DEV_NUM, - .pci_devs = vm2_pci_devs, - .cpu_affinity = VM2_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, - { /* VM3 */ - CONFIG_POST_STD_VM(2), -#ifdef CONFIG_RDT_ENABLED - .clos = VM3_VCPU_CLOS, -#endif - .cpu_affinity = VM3_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, -}; diff --git a/misc/vm_configs/scenarios/hybrid_rt/vm_configurations.h b/misc/vm_configs/scenarios/hybrid_rt/vm_configurations.h deleted file mode 100644 index 357002a59..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/vm_configurations.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef VM_CONFIGURATIONS_H -#define VM_CONFIGURATIONS_H - -#include -#include - -/* SOS_VM_NUM can only be 0U or 1U; - * When SOS_VM_NUM is 0U, MAX_POST_VM_NUM must be 0U too; - * MAX_POST_VM_NUM must be bigger than CONFIG_MAX_KATA_VM_NUM; - */ -#define PRE_VM_NUM 1U -#define SOS_VM_NUM 1U -#define MAX_POST_VM_NUM 2U -#define CONFIG_MAX_KATA_VM_NUM 0U - -/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */ -#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \ - GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING) - -#define VM0_CONFIG_MEM_START_HPA 0x100000000UL -#define VM0_CONFIG_MEM_SIZE 0x40000000UL -#define VM0_CONFIG_MEM_START_HPA2 0x0UL -#define VM0_CONFIG_MEM_SIZE_HPA2 0x0UL - -/* SOS_VM == VM1 */ -#define SOS_VM_BOOTARGS SOS_ROOTFS \ - SOS_CONSOLE \ - SOS_IDLE \ - SOS_BOOTARGS_DIFF - -#endif /* VM_CONFIGURATIONS_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/dsdt.asl deleted file mode 100644 index 73bf2a93d..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/dsdt.asl +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - Device (TPM) - { - Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - Memory32Fixed (ReadWrite, - 0xFED40000, // Address Base - 0x00005000, // Address Length - ) - }) - } - -} - diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/tpm2.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/tpm2.asl deleted file mode 100644 index 2a2a08fc8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/tpm2.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [TPM2] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "TPM2" [Trusted Platform Module hardware interface table] -[0004] Table Length : 00000034 -[0001] Revision : 03 -[0001] Checksum : 67 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNTPM2" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Reserved : 00000000 -[0008] Control Address : 00000000FED40040 -[0004] Start Method : 07 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/xsdt.asl deleted file mode 100644 index 65e79728e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/VM0/xsdt.asl +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 -[0008] ACPI Table Address 3 : 000000007FF01100 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/ivshmem_cfg.h deleted file mode 100644 index 3104f28d8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/ivshmem_cfg.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#include -#include - -#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0" - -/* - * The IVSHMEM_SHM_SIZE is the sum of all memory regions. - * The size range of each memory region is [2MB, 512MB] and is a power of 2. - */ -#define IVSHMEM_SHM_SIZE 0x200000UL -#define IVSHMEM_DEV_NUM 2UL - -/* All user defined memory regions */ -#define IVSHMEM_SHM_REGIONS \ - { \ - .name = IVSHMEM_SHM_REGION_0, \ - .size = 0x200000UL, /* 2M */ \ - }, - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/misc_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/misc_cfg.h deleted file mode 100644 index 1c072b1bf..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/misc_cfg.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/nvme0n1p3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=2" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 4U -#define VM2_CONFIG_PCI_DEV_NUM 1U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -consoleblank=0 tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pci_dev.c b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pci_dev.c deleted file mode 100644 index 66667030e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pci_dev.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ - -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(SATA_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x03U, .f = 0x00U}, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0, - IVSHMEM_DEVICE_0_VBAR - }, -}; - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; - -struct acrn_vm_pci_dev_config vm2_pci_devs[VM2_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.value = UNASSIGNED_VBDF, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0 - }, -}; diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pt_intx.c b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/vbar_base.h b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/vbar_base.h deleted file mode 100644 index 53a212b5c..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/vbar_base.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141e000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1400000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141c000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1419000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa1418000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0xfe010000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1300000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#define IVSHMEM_DEVICE_0_VBAR .vbar_base[0] = 0x80000000UL, \ - .vbar_base[2] = 0x10000000cUL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/whl-ipc-i5.config b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/whl-ipc-i5.config deleted file mode 100644 index f4f6d2e55..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i5/whl-ipc-i5.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i5" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0xc000000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=y -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/apic.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/dsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/dsdt.asl deleted file mode 100644 index 73bf2a93d..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/dsdt.asl +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - Device (TPM) - { - Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */) // _HID: Hardware ID - Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings - { - Memory32Fixed (ReadWrite, - 0xFED40000, // Address Base - 0x00005000, // Address Length - ) - }) - } - -} - diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/facp.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/mcfg.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/rsdp.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/tpm2.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/tpm2.asl deleted file mode 100644 index 2a2a08fc8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/tpm2.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [TPM2] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "TPM2" [Trusted Platform Module hardware interface table] -[0004] Table Length : 00000034 -[0001] Revision : 03 -[0001] Checksum : 67 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNTPM2" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Reserved : 00000000 -[0008] Control Address : 00000000FED40040 -[0004] Start Method : 07 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/xsdt.asl b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/xsdt.asl deleted file mode 100644 index 65e79728e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/VM0/xsdt.asl +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 -[0008] ACPI Table Address 3 : 000000007FF01100 diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/ivshmem_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/ivshmem_cfg.h deleted file mode 100644 index 3104f28d8..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/ivshmem_cfg.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#include -#include - -#define IVSHMEM_SHM_REGION_0 "hv:/shm_region_0" - -/* - * The IVSHMEM_SHM_SIZE is the sum of all memory regions. - * The size range of each memory region is [2MB, 512MB] and is a power of 2. - */ -#define IVSHMEM_SHM_SIZE 0x200000UL -#define IVSHMEM_DEV_NUM 2UL - -/* All user defined memory regions */ -#define IVSHMEM_SHM_REGIONS \ - { \ - .name = IVSHMEM_SHM_REGION_0, \ - .size = 0x200000UL, /* 2M */ \ - }, - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/misc_cfg.h b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/misc_cfg.h deleted file mode 100644 index 1c072b1bf..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/misc_cfg.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/nvme0n1p3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=2" - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 4U -#define VM2_CONFIG_PCI_DEV_NUM 1U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -consoleblank=0 tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pci_dev.c b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pci_dev.c deleted file mode 100644 index 66667030e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pci_dev.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ - -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(SATA_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x03U, .f = 0x00U}, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0, - IVSHMEM_DEVICE_0_VBAR - }, -}; - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; - -struct acrn_vm_pci_dev_config vm2_pci_devs[VM2_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.value = UNASSIGNED_VBDF, - .vdev_ops = &vpci_ivshmem_ops, - .shm_region_name = IVSHMEM_SHM_REGION_0 - }, -}; diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pt_intx.c b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/vbar_base.h b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/vbar_base.h deleted file mode 100644 index 53a212b5c..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/vbar_base.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141e000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1400000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141c000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1419000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa1418000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0xfe010000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1300000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#define IVSHMEM_DEVICE_0_VBAR .vbar_base[0] = 0x80000000UL, \ - .vbar_base[2] = 0x10000000cUL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/whl-ipc-i7.config b/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/whl-ipc-i7.config deleted file mode 100644 index 343e2caf2..000000000 --- a/misc/vm_configs/scenarios/hybrid_rt/whl-ipc-i7/whl-ipc-i7.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i7" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0xc000000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=y -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/industry/cfl-k700-i7/cfl-k700-i7.config b/misc/vm_configs/scenarios/industry/cfl-k700-i7/cfl-k700-i7.config deleted file mode 100644 index a0466295d..000000000 --- a/misc/vm_configs/scenarios/industry/cfl-k700-i7/cfl-k700-i7.config +++ /dev/null @@ -1,38 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="cfl-k700-i7" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x16800000 -CONFIG_PLATFORM_RAM_SIZE=0x800000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x800000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_UEFI_OS_LOADER_NAME="\\EFI\\BOOT\\bootx64.efi" -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/industry/cfl-k700-i7/ivshmem_cfg.h b/misc/vm_configs/scenarios/industry/cfl-k700-i7/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/industry/cfl-k700-i7/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/cfl-k700-i7/misc_cfg.h b/misc/vm_configs/scenarios/industry/cfl-k700-i7/misc_cfg.h deleted file mode 100644 index eae3fafa1..000000000 --- a/misc/vm_configs/scenarios/industry/cfl-k700-i7/misc_cfg.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=8" - - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U) | AFFINITY_CPU(4U) | AFFINITY_CPU(5U) | AFFINITY_CPU(6U) | AFFINITY_CPU(7U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM4_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM5_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM6_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM7_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/cfl-k700-i7/pci_dev.c b/misc/vm_configs/scenarios/industry/cfl-k700-i7/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/industry/cfl-k700-i7/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/industry/cfl-k700-i7/pt_intx.c b/misc/vm_configs/scenarios/industry/cfl-k700-i7/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/industry/cfl-k700-i7/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/industry/cfl-k700-i7/vbar_base.h b/misc/vm_configs/scenarios/industry/cfl-k700-i7/vbar_base.h deleted file mode 100644 index 9077629d8..000000000 --- a/misc/vm_configs/scenarios/industry/cfl-k700-i7/vbar_base.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/industry/ehl-crb-b/ehl-crb-b.config b/misc/vm_configs/scenarios/industry/ehl-crb-b/ehl-crb-b.config deleted file mode 100644 index 1344b18a4..000000000 --- a/misc/vm_configs/scenarios/industry/ehl-crb-b/ehl-crb-b.config +++ /dev/null @@ -1,38 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="ehl-crb-b" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x14800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_UEFI_OS_LOADER_NAME="\\EFI\\BOOT\\bootx64.efi" -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=y -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=256 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_MMIO=y -CONFIG_SERIAL_MMIO_BASE=0xfe042000 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/industry/ehl-crb-b/ivshmem_cfg.h b/misc/vm_configs/scenarios/industry/ehl-crb-b/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/industry/ehl-crb-b/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/ehl-crb-b/misc_cfg.h b/misc/vm_configs/scenarios/industry/ehl-crb-b/misc_cfg.h deleted file mode 100644 index 3b4819154..000000000 --- a/misc/vm_configs/scenarios/industry/ehl-crb-b/misc_cfg.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/mmcblk0p2 " -#define SOS_CONSOLE "console=ttyS3 " -#define SOS_COM1_BASE 0x2E8U -#define SOS_COM1_IRQ 3U -#define SOS_COM2_BASE 0x3F8U -#define SOS_COM2_IRQ 4U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "swiotlb=131072 " \ - "maxcpus=4" - - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM4_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM5_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM6_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM7_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 16U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 16U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 16U - -#define CLOS_MASK_0 0xfffU -#define CLOS_MASK_1 0xfffU -#define CLOS_MASK_2 0xfffU -#define CLOS_MASK_3 0xfffU -#define CLOS_MASK_4 0xfffU -#define CLOS_MASK_5 0xfffU -#define CLOS_MASK_6 0xfffU -#define CLOS_MASK_7 0xfffU -#define CLOS_MASK_8 0xfffU -#define CLOS_MASK_9 0xfffU -#define CLOS_MASK_10 0xfffU -#define CLOS_MASK_11 0xfffU -#define CLOS_MASK_12 0xfffU -#define CLOS_MASK_13 0xfffU -#define CLOS_MASK_14 0xfffU -#define CLOS_MASK_15 0xfffU - -#define VM0_VCPU_CLOS {0U} -#define VM1_VCPU_CLOS {0U, 0U} -#define VM2_VCPU_CLOS {0U, 0U} -#define VM3_VCPU_CLOS {0U, 0U} -#define VM4_VCPU_CLOS {0U, 0U} -#define VM5_VCPU_CLOS {0U, 0U} -#define VM6_VCPU_CLOS {0U, 0U} -#define VM7_VCPU_CLOS {0U, 0U} -#endif - - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/ehl-crb-b/pci_dev.c b/misc/vm_configs/scenarios/industry/ehl-crb-b/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/industry/ehl-crb-b/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/industry/ehl-crb-b/pt_intx.c b/misc/vm_configs/scenarios/industry/ehl-crb-b/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/industry/ehl-crb-b/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/industry/ehl-crb-b/vbar_base.h b/misc/vm_configs/scenarios/industry/ehl-crb-b/vbar_base.h deleted file mode 100644 index 9077629d8..000000000 --- a/misc/vm_configs/scenarios/industry/ehl-crb-b/vbar_base.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/industry/nuc7i7dnb/ivshmem_cfg.h b/misc/vm_configs/scenarios/industry/nuc7i7dnb/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/industry/nuc7i7dnb/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/nuc7i7dnb/misc_cfg.h b/misc/vm_configs/scenarios/industry/nuc7i7dnb/misc_cfg.h deleted file mode 100644 index 27a6d91e6..000000000 --- a/misc/vm_configs/scenarios/industry/nuc7i7dnb/misc_cfg.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=4" - - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM4_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM5_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM6_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM7_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/nuc7i7dnb/nuc7i7dnb.config b/misc/vm_configs/scenarios/industry/nuc7i7dnb/nuc7i7dnb.config deleted file mode 100644 index dcd206f75..000000000 --- a/misc/vm_configs/scenarios/industry/nuc7i7dnb/nuc7i7dnb.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="nuc7i7dnb" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x14800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/industry/nuc7i7dnb/pci_dev.c b/misc/vm_configs/scenarios/industry/nuc7i7dnb/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/industry/nuc7i7dnb/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/industry/nuc7i7dnb/pt_intx.c b/misc/vm_configs/scenarios/industry/nuc7i7dnb/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/industry/nuc7i7dnb/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/industry/nuc7i7dnb/vbar_base.h b/misc/vm_configs/scenarios/industry/nuc7i7dnb/vbar_base.h deleted file mode 100644 index 9077629d8..000000000 --- a/misc/vm_configs/scenarios/industry/nuc7i7dnb/vbar_base.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/industry/vm_configurations.c b/misc/vm_configs/scenarios/industry/vm_configurations.c deleted file mode 100644 index af8483261..000000000 --- a/misc/vm_configs/scenarios/industry/vm_configurations.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#include -#include -#include - -extern struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; - -extern struct pt_intx_config vm0_pt_intx[1U]; - -struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = { - { /* VM0 */ - CONFIG_SOS_VM, - .name = "ACRN SOS VM", - - /* Allow SOS to reboot the host since there is supposed to be the highest severity guest */ - .guest_flags = 0UL, -#ifdef CONFIG_RDT_ENABLED - .clos = VM0_VCPU_CLOS, -#endif - .cpu_affinity = SOS_VM_CONFIG_CPU_AFFINITY, - .memory = { - .start_hpa = 0UL, - .size = CONFIG_SOS_RAM_SIZE, - }, - .os_config = { - .name = "ACRN Service OS", - .kernel_type = KERNEL_BZIMAGE, - .kernel_mod_tag = "Linux_bzImage", - .bootargs = SOS_VM_BOOTARGS, - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = SOS_COM1_BASE, - .irq = SOS_COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = SOS_COM2_BASE, - .irq = SOS_COM2_IRQ, - .t_vuart.vm_id = 2U, - .t_vuart.vuart_id = 1U, - }, - .pci_dev_num = 0U, - .pci_devs = sos_pci_devs, - }, - { /* VM1 */ - CONFIG_POST_STD_VM(1), -#ifdef CONFIG_RDT_ENABLED - .clos = VM1_VCPU_CLOS, -#endif - .cpu_affinity = VM1_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, - { /* VM2 */ - CONFIG_POST_RT_VM(1), -#ifdef CONFIG_RDT_ENABLED - .clos = VM2_VCPU_CLOS, -#endif - .cpu_affinity = VM2_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM2_BASE, - .irq = COM2_IRQ, - .t_vuart.vm_id = 0U, - .t_vuart.vuart_id = 1U, - }, - }, - { /* VM3 */ - CONFIG_POST_STD_VM(2), -#ifdef CONFIG_RDT_ENABLED - .clos = VM3_VCPU_CLOS, -#endif - .cpu_affinity = VM3_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, - { /* VM4 */ - CONFIG_POST_STD_VM(3), -#ifdef CONFIG_RDT_ENABLED - .clos = VM4_VCPU_CLOS, -#endif - .cpu_affinity = VM4_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, - { /* VM5 */ - CONFIG_POST_STD_VM(4), -#ifdef CONFIG_RDT_ENABLED - .clos = VM5_VCPU_CLOS, -#endif - .cpu_affinity = VM5_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, - { /* VM6 */ - CONFIG_POST_STD_VM(5), -#ifdef CONFIG_RDT_ENABLED - .clos = VM6_VCPU_CLOS, -#endif - .cpu_affinity = VM6_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, - { /* VM7 */ - CONFIG_KATA_VM(1), -#ifdef CONFIG_RDT_ENABLED - .clos = VM7_VCPU_CLOS, -#endif - .cpu_affinity = VM7_CONFIG_CPU_AFFINITY, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = INVALID_COM_BASE, - }, - }, -}; diff --git a/misc/vm_configs/scenarios/industry/vm_configurations.h b/misc/vm_configs/scenarios/industry/vm_configurations.h deleted file mode 100644 index 088f63373..000000000 --- a/misc/vm_configs/scenarios/industry/vm_configurations.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef VM_CONFIGURATIONS_H -#define VM_CONFIGURATIONS_H - -#include -#include - -/* SOS_VM_NUM can only be 0U or 1U; - * When SOS_VM_NUM is 0U, MAX_POST_VM_NUM must be 0U too; - * MAX_POST_VM_NUM must be bigger than CONFIG_MAX_KATA_VM_NUM; - */ -#define PRE_VM_NUM 0U -#define SOS_VM_NUM 1U -#define MAX_POST_VM_NUM 7U -#define CONFIG_MAX_KATA_VM_NUM 1U - -/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */ -#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \ - GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING) - -/* SOS_VM == VM0 */ -#define SOS_VM_BOOTARGS SOS_ROOTFS \ - SOS_CONSOLE \ - SOS_IDLE \ - SOS_BOOTARGS_DIFF - -#endif /* VM_CONFIGURATIONS_H */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i5/ivshmem_cfg.h b/misc/vm_configs/scenarios/industry/whl-ipc-i5/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i5/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i5/misc_cfg.h b/misc/vm_configs/scenarios/industry/whl-ipc-i5/misc_cfg.h deleted file mode 100644 index 27a6d91e6..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i5/misc_cfg.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=4" - - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM4_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM5_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM6_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM7_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i5/pci_dev.c b/misc/vm_configs/scenarios/industry/whl-ipc-i5/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i5/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i5/pt_intx.c b/misc/vm_configs/scenarios/industry/whl-ipc-i5/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i5/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i5/vbar_base.h b/misc/vm_configs/scenarios/industry/whl-ipc-i5/vbar_base.h deleted file mode 100644 index 9077629d8..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i5/vbar_base.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i5/whl-ipc-i5.config b/misc/vm_configs/scenarios/industry/whl-ipc-i5/whl-ipc-i5.config deleted file mode 100644 index 7c3a41be4..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i5/whl-ipc-i5.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i5" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x14800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i7/ivshmem_cfg.h b/misc/vm_configs/scenarios/industry/whl-ipc-i7/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i7/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i7/misc_cfg.h b/misc/vm_configs/scenarios/industry/whl-ipc-i7/misc_cfg.h deleted file mode 100644 index 27a6d91e6..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i7/misc_cfg.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define SOS_ROOTFS "root=/dev/sda3 " -#define SOS_CONSOLE "console=ttyS0 " -#define SOS_COM1_BASE 0x3F8U -#define SOS_COM1_IRQ 4U -#define SOS_COM2_BASE 0x2F8U -#define SOS_COM2_IRQ 3U - -#define SOS_BOOTARGS_DIFF "rw " \ - "rootwait " \ - "console=tty0 " \ - "consoleblank=0 " \ - "no_timer_check " \ - "quiet " \ - "loglevel=3 " \ - "i915.nuclear_pageflip=1 " \ - "hvlog=2M@0xe00000 " \ - "memmap=0x200000$0xe00000 " \ - "maxcpus=4" - - -#define SOS_VM_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U) | AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM2_CONFIG_CPU_AFFINITY (AFFINITY_CPU(2U) | AFFINITY_CPU(3U)) -#define VM3_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM4_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM5_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM6_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) -#define VM7_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(1U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i7/pci_dev.c b/misc/vm_configs/scenarios/industry/whl-ipc-i7/pci_dev.c deleted file mode 100644 index 90b1a6138..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i7/pci_dev.c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -struct acrn_vm_pci_dev_config sos_pci_devs[CONFIG_MAX_PCI_DEV_NUM]; diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i7/pt_intx.c b/misc/vm_configs/scenarios/industry/whl-ipc-i7/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i7/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i7/vbar_base.h b/misc/vm_configs/scenarios/industry/whl-ipc-i7/vbar_base.h deleted file mode 100644 index 9077629d8..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i7/vbar_base.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/industry/whl-ipc-i7/whl-ipc-i7.config b/misc/vm_configs/scenarios/industry/whl-ipc-i7/whl-ipc-i7.config deleted file mode 100644 index 8737a855e..000000000 --- a/misc/vm_configs/scenarios/industry/whl-ipc-i7/whl-ipc-i7.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i7" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x14800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/apic.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/facp.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/apic.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/facp.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/VM1/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/ehl-crb-b.config b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/ehl-crb-b.config deleted file mode 100644 index a6d28b359..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/ehl-crb-b.config +++ /dev/null @@ -1,38 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="ehl-crb-b" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x7800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_UEFI_OS_LOADER_NAME="" -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_PCI=y -CONFIG_SERIAL_PCI_BDF=0xca -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/ivshmem_cfg.h b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/misc_cfg.h b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/misc_cfg.h deleted file mode 100644 index eeebd1812..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/misc_cfg.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(2U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U) | AFFINITY_CPU(3U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U - -#define CLOS_MASK_0 0xfffU -#define CLOS_MASK_1 0xfffU -#define CLOS_MASK_2 0xfffU -#define CLOS_MASK_3 0xfffU -#define CLOS_MASK_4 0xfffU -#define CLOS_MASK_5 0xfffU -#define CLOS_MASK_6 0xfffU -#define CLOS_MASK_7 0xfffU -#define CLOS_MASK_8 0xfffU -#define CLOS_MASK_9 0xfffU -#define CLOS_MASK_10 0xfffU -#define CLOS_MASK_11 0xfffU -#define CLOS_MASK_12 0xfffU -#define CLOS_MASK_13 0xfffU -#define CLOS_MASK_14 0xfffU -#define CLOS_MASK_15 0xfffU - -#define VM0_VCPU_CLOS {0U, 0U} -#define VM1_VCPU_CLOS {0U, 0U} -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 1U -#define VM1_CONFIG_PCI_DEV_NUM 1U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - -#define VM1_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/pci_dev.c b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/pci_dev.c deleted file mode 100644 index 79033ec6b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/pci_dev.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/pt_intx.c b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/vbar_base.h b/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/vbar_base.h deleted file mode 100644 index d23e4a156..000000000 --- a/misc/vm_configs/scenarios/logical_partition/ehl-crb-b/vbar_base.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0x82000000UL, \ - .vbar_base[2] = PTDEV_HI_MMIO_START + 0x0UL - -#define SYSTEM_PERIPHERAL_0_VBAR .vbar_base[0] = 0x834e4000UL - -#define SYSTEM_PERIPHERAL_1_VBAR .vbar_base[0] = 0x83000000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0x83441000UL - -#define SERIAL_BUS_CONTROLLER_1_VBAR .vbar_base[0] = 0x83444000UL - -#define SERIAL_BUS_CONTROLLER_2_VBAR .vbar_base[0] = 0x834d8000UL - -#define SERIAL_BUS_CONTROLLER_3_VBAR .vbar_base[0] = 0x83445000UL - -#define SERIAL_BUS_CONTROLLER_4_VBAR .vbar_base[0] = 0x83446000UL - -#define SERIAL_BUS_CONTROLLER_5_VBAR .vbar_base[0] = 0x83447000UL - -#define SERIAL_BUS_CONTROLLER_6_VBAR .vbar_base[0] = 0x83448000UL - -#define SERIAL_BUS_CONTROLLER_7_VBAR .vbar_base[0] = 0x834da000UL - -#define SERIAL_BUS_CONTROLLER_8_VBAR .vbar_base[0] = 0x834dc000UL - -#define SERIAL_BUS_CONTROLLER_9_VBAR .vbar_base[0] = 0x834de000UL - -#define SERIAL_BUS_CONTROLLER_10_VBAR .vbar_base[0] = 0x8344c000UL, \ - .vbar_base[1] = 0x80000000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0x84600000UL - -#define COMMUNICATION_CONTROLLER_1_VBAR .vbar_base[0] = 0x845fc000UL - -#define COMMUNICATION_CONTROLLER_2_VBAR .vbar_base[0] = 0x834eb000UL - -#define COMMUNICATION_CONTROLLER_3_VBAR .vbar_base[0] = 0x83449000UL - -#define COMMUNICATION_CONTROLLER_4_VBAR .vbar_base[0] = 0x8344a000UL - -#define COMMUNICATION_CONTROLLER_5_VBAR .vbar_base[0] = 0x8344b000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0x834c0000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0x834d0000UL, \ - .vbar_base[2] = 0x834e7000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0x834e2000UL, \ - .vbar_base[1] = 0x834f6000UL, \ - .vbar_base[5] = 0x834f5000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0x834ee000UL - -#define SD_HOST_CONTROLLER_1_VBAR .vbar_base[0] = 0x834ef000UL - -#define NON_VGA_UNCLASSIFIED_DEVICE_0_VBAR .vbar_base[0] = 0x83400000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0x83500000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0x83480000UL - -#define ETHERNET_CONTROLLER_2_VBAR .vbar_base[0] = 0x83442000UL, \ - .vbar_base[2] = 0x834f2000UL - -#define MULTIMEDIA_AUDIO_CONTROLLER_0_VBAR .vbar_base[0] = 0x834d4000UL, \ - .vbar_base[4] = 0x83200000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0x834f3000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0x83300000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/apic.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/facp.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/apic.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/facp.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/VM1/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/ivshmem_cfg.h b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/misc_cfg.h b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/misc_cfg.h deleted file mode 100644 index d390a1bf4..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/misc_cfg.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(2U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U) | AFFINITY_CPU(3U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_CONFIG_PCI_DEV_NUM 3U -#define VM1_CONFIG_PCI_DEV_NUM 3U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - -#define VM1_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/nuc7i7dnb.config b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/nuc7i7dnb.config deleted file mode 100644 index ef1735dd0..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/nuc7i7dnb.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="nuc7i7dnb" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x7800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/pci_dev.c b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/pci_dev.c deleted file mode 100644 index a1ef0f318..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/pci_dev.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(SATA_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_0), - }, -}; - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ -struct acrn_vm_pci_dev_config vm1_pci_devs[VM1_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(USB_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(NETWORK_CONTROLLER_0), - }, -}; diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/pt_intx.c b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/vbar_base.h b/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/vbar_base.h deleted file mode 100644 index 8045a3194..000000000 --- a/misc/vm_configs/scenarios/logical_partition/nuc7i7dnb/vbar_base.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xde000000UL, \ - .vbar_base[2] = 0xc0000000UL - -#define SYSTEM_PERIPHERAL_0_VBAR .vbar_base[0] = 0xdf252000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf230000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf251000UL - -#define SIGNAL_PROCESSING_CONTROLLER_1_VBAR .vbar_base[0] = 0xdf250000UL - -#define SIGNAL_PROCESSING_CONTROLLER_2_VBAR .vbar_base[0] = 0xdf24f000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf24e000UL - -#define SERIAL_CONTROLLER_0_VBAR .vbar_base[1] = 0xdf24d000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf248000UL, \ - .vbar_base[1] = 0xdf24c000UL, \ - .vbar_base[5] = 0xdf24b000UL - -#define MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf244000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xdf240000UL, \ - .vbar_base[4] = 0xdf220000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xdf24a000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf200000UL - -#define NETWORK_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf100000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xdf000000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/logical_partition/vm_configurations.c b/misc/vm_configs/scenarios/logical_partition/vm_configurations.c deleted file mode 100644 index 361cc8352..000000000 --- a/misc/vm_configs/scenarios/logical_partition/vm_configurations.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#include -#include -#include - -extern struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM]; -extern struct acrn_vm_pci_dev_config vm1_pci_devs[VM1_CONFIG_PCI_DEV_NUM]; - -extern struct pt_intx_config vm0_pt_intx[1U]; - -struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = { - { /* VM0 */ - CONFIG_PRE_STD_VM(1), - .name = "ACRN PRE-LAUNCHED VM0", - .cpu_affinity = VM0_CONFIG_CPU_AFFINITY, - .guest_flags = 0UL, -#ifdef CONFIG_RDT_ENABLED - .clos = VM0_VCPU_CLOS, -#endif - .memory = { - .start_hpa = VM0_CONFIG_MEM_START_HPA, - .size = VM0_CONFIG_MEM_SIZE, - .start_hpa2 = VM0_CONFIG_MEM_START_HPA2, - .size_hpa2 = VM0_CONFIG_MEM_SIZE_HPA2, - }, - .os_config = { - .name = "YOCTO", - .kernel_type = KERNEL_BZIMAGE, - .kernel_mod_tag = "Linux_bzImage", - .bootargs = VM0_BOOT_ARGS, - }, - .acpi_config = { - .acpi_mod_tag = "ACPI_VM0", - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM2_BASE, - .irq = COM2_IRQ, - .t_vuart.vm_id = 1U, - .t_vuart.vuart_id = 1U, - }, - .pci_dev_num = VM0_CONFIG_PCI_DEV_NUM, - .pci_devs = vm0_pci_devs, -#ifdef VM0_PASSTHROUGH_TPM - .pt_tpm2 = true, - .mmiodevs[0] = { - .base_gpa = VM0_TPM_BUFFER_BASE_ADDR_GPA, - .base_hpa = VM0_TPM_BUFFER_BASE_ADDR, - .size = VM0_TPM_BUFFER_SIZE, - }, -#endif -#ifdef P2SB_BAR_ADDR - .pt_p2sb_bar = true, - .mmiodevs[0] = { - .base_gpa = P2SB_BAR_ADDR_GPA, - .base_hpa = P2SB_BAR_ADDR, - .size = P2SB_BAR_SIZE, - }, -#endif - .pt_intx_num = VM0_PT_INTX_NUM, - .pt_intx = &vm0_pt_intx[0U], - }, - { /* VM1 */ - CONFIG_PRE_STD_VM(2), - .name = "ACRN PRE-LAUNCHED VM1", - .cpu_affinity = VM1_CONFIG_CPU_AFFINITY, - .guest_flags = 0UL, -#ifdef CONFIG_RDT_ENABLED - .clos = VM1_VCPU_CLOS, -#endif - .memory = { - .start_hpa = VM1_CONFIG_MEM_START_HPA, - .size = VM1_CONFIG_MEM_SIZE, - .start_hpa2 = VM1_CONFIG_MEM_START_HPA2, - .size_hpa2 = VM1_CONFIG_MEM_SIZE_HPA2, - }, - .os_config = { - .name = "YOCTO", - .kernel_type = KERNEL_BZIMAGE, - .kernel_mod_tag = "Linux_bzImage", - .bootargs = VM1_BOOT_ARGS, - }, - .acpi_config = { - .acpi_mod_tag = "ACPI_VM1", - }, - .vuart[0] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM1_BASE, - .irq = COM1_IRQ, - }, - .vuart[1] = { - .type = VUART_LEGACY_PIO, - .addr.port_base = COM2_BASE, - .irq = COM2_IRQ, - .t_vuart.vm_id = 0U, - .t_vuart.vuart_id = 1U, - }, - .pci_dev_num = VM1_CONFIG_PCI_DEV_NUM, - .pci_devs = vm1_pci_devs, - }, -}; diff --git a/misc/vm_configs/scenarios/logical_partition/vm_configurations.h b/misc/vm_configs/scenarios/logical_partition/vm_configurations.h deleted file mode 100644 index fca7f133c..000000000 --- a/misc/vm_configs/scenarios/logical_partition/vm_configurations.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef VM_CONFIGURATIONS_H -#define VM_CONFIGURATIONS_H - -#include -#include - -/* SOS_VM_NUM can only be 0U or 1U; - * When SOS_VM_NUM is 0U, MAX_POST_VM_NUM must be 0U too; - * MAX_POST_VM_NUM must be bigger than CONFIG_MAX_KATA_VM_NUM; - */ -#define PRE_VM_NUM 2U -#define SOS_VM_NUM 0U -#define MAX_POST_VM_NUM 0U -#define CONFIG_MAX_KATA_VM_NUM 0U - -#define DM_OWNED_GUEST_FLAG_MASK 0UL - -#define VM0_CONFIG_MEM_START_HPA 0x100000000UL -#define VM0_CONFIG_MEM_SIZE 0x20000000UL -#define VM0_CONFIG_MEM_START_HPA2 0x0UL -#define VM0_CONFIG_MEM_SIZE_HPA2 0x0UL - -#define VM1_CONFIG_MEM_START_HPA 0x120000000UL -#define VM1_CONFIG_MEM_SIZE 0x20000000UL -#define VM1_CONFIG_MEM_START_HPA2 0x0UL -#define VM1_CONFIG_MEM_SIZE_HPA2 0x0UL - -#endif /* VM_CONFIGURATIONS_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/apic.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/facp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/apic.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/facp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/VM1/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/ivshmem_cfg.h b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/misc_cfg.h b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/misc_cfg.h deleted file mode 100644 index 3b4959d90..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/misc_cfg.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(2U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U) | AFFINITY_CPU(3U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 3U -#define VM1_CONFIG_PCI_DEV_NUM 3U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - -#define VM1_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/pci_dev.c b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/pci_dev.c deleted file mode 100644 index 59d0d2551..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/pci_dev.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(SATA_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_0), - }, -}; - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ -struct acrn_vm_pci_dev_config vm1_pci_devs[VM1_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(USB_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_1), - }, -}; diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/pt_intx.c b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/vbar_base.h b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/vbar_base.h deleted file mode 100644 index d9a05b701..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/vbar_base.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141e000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1400000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141c000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1419000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa1418000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0xfe010000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1300000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/whl-ipc-i5.config b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/whl-ipc-i5.config deleted file mode 100644 index 61a8964ce..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i5/whl-ipc-i5.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i5" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x7800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/apic.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/facp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM0/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/apic.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/apic.asl deleted file mode 100644 index 84bb878fd..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/apic.asl +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [APIC] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[0004] Table Length : 0000004E -[0001] Revision : 03 -[0001] Checksum : 9B -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] Local Apic Address : FEE00000 -[0004] Flags (decoded below) : 00000001 - PC-AT Compatibility : 1 - -[0001] Subtable Type : 01 [I/O APIC] -[0001] Length : 0C -[0001] I/O Apic ID : 01 -[0001] Reserved : 00 -[0004] Address : FEC00000 -[0004] Interrupt : 00000000 - -[0001] Subtable Type : 04 [Local APIC NMI] -[0001] Length : 06 -[0001] Processor ID : FF -[0002] Flags (decoded below) : 0005 - Polarity : 1 - Trigger Mode : 1 -[0001] Interrupt Input LINT : 01 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 00 -[0001] Local Apic ID : 00 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 - -[0001] Subtable Type : 00 [Processor Local APIC] -[0001] Length : 08 -[0001] Processor ID : 01 -[0001] Local Apic ID : 01 -[0004] Flags (decoded below) : 00000001 - Processor Enabled : 1 - Runtime Online Capable : 0 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/dsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/dsdt.asl deleted file mode 100644 index af968e71a..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/dsdt.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Original Table Header: - * Signature "DSDT" - * Length 0x00000051 (81) - * Revision 0x03 - * Checksum 0xF0 - * OEM ID "ACRN " - * OEM Table ID "ACRNDSDT" - * OEM Revision 0x00000001 (1) - * Compiler ID "INTL" - * Compiler Version 0x20190703 (538511107) - */ -DefinitionBlock ("", "DSDT", 3, "ACRN ", "ACRNDSDT", 0x00000001) -{ - -} - diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/facp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/facp.asl deleted file mode 100644 index 34d4ead1b..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/facp.asl +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [FACP] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "FACP" [Fixed ACPI Description Table (FADT)] -[0004] Table Length : 000000F4 -[0001] Revision : 03 -[0001] Checksum : 28 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNFADT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0004] FACS Address : 00000000 -[0004] DSDT Address : 7FF00200 -[0001] Model : 00 -[0001] PM Profile : 00 [Unspecified] -[0002] SCI Interrupt : 0000 -[0004] SMI Command Port : 00000000 -[0001] ACPI Enable Value : 00 -[0001] ACPI Disable Value : 00 -[0001] S4BIOS Command : 00 -[0001] P-State Control : 00 -[0004] PM1A Event Block Address : 00001800 -[0004] PM1B Event Block Address : 00000000 -[0004] PM1A Control Block Address : 00001804 -[0004] PM1B Control Block Address : 00000000 -[0004] PM2 Control Block Address : 00000000 -[0004] PM Timer Block Address : 00000000 -[0004] GPE0 Block Address : 00000000 -[0004] GPE1 Block Address : 00000000 -[0001] PM1 Event Block Length : 04 -[0001] PM1 Control Block Length : 02 -[0001] PM2 Control Block Length : 00 -[0001] PM Timer Block Length : 00 -[0001] GPE0 Block Length : 00 -[0001] GPE1 Block Length : 00 -[0001] GPE1 Base Offset : 00 -[0001] _CST Support : 00 -[0002] C2 Latency : 0000 -[0002] C3 Latency : 0000 -[0002] CPU Cache Size : 0000 -[0002] Cache Flush Stride : 0000 -[0001] Duty Cycle Offset : 00 -[0001] Duty Cycle Width : 00 -[0001] RTC Day Alarm Index : 00 -[0001] RTC Month Alarm Index : 00 -[0001] RTC Century Index : 00 -[0002] Boot Flags (decoded below) : 0000 - Legacy Devices Supported (V2) : 0 - 8042 Present on ports 60/64 (V2) : 0 - VGA Not Present (V4) : 0 - MSI Not Supported (V4) : 0 - PCIe ASPM Not Supported (V4) : 0 - CMOS RTC Not Present (V5) : 0 -[0001] Reserved : 00 -[0004] Flags (decoded below) : 00001125 - WBINVD instruction is operational (V1) : 1 - WBINVD flushes all caches (V1) : 0 - All CPUs support C1 (V1) : 1 - C2 works on MP system (V1) : 0 - Control Method Power Button (V1) : 0 - Control Method Sleep Button (V1) : 1 - RTC wake not in fixed reg space (V1) : 0 - RTC can wake system from S4 (V1) : 0 - 32-bit PM Timer (V1) : 1 - Docking Supported (V1) : 0 - Reset Register Supported (V2) : 0 - Sealed Case (V3) : 0 - Headless - No Video (V3) : 1 - Use native instr after SLP_TYPx (V3) : 0 - PCIEXP_WAK Bits Supported (V4) : 0 - Use Platform Timer (V4) : 0 - RTC_STS valid on S4 wake (V4) : 0 - Remote Power-on capable (V4) : 0 - Use APIC Cluster Model (V4) : 0 -Use APIC Physical Destination Mode (V4) : 0 - Hardware Reduced (V5) : 0 - Low Power S0 Idle (V5) : 0 - -[0012] Reset Register : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0001] Value to cause reset : 00 -[0002] ARM Flags (decoded below) : 0000 - PSCI Compliant : 0 - Must use HVC for PSCI : 0 - -[0001] FADT Minor Revision : 00 -[0008] FACS Address : 0000000000000000 -[0008] DSDT Address : 0000000000000000 -[0012] PM1A Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Event Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1A Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM1B Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM2 Control Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] PM Timer Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE0 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 - -[0012] GPE1 Block : [Generic Address Structure] -[0001] Space ID : 00 [SystemMemory] -[0001] Bit Width : 00 -[0001] Bit Offset : 00 -[0001] Encoded Access Width : 00 [Undefined/Legacy] -[0008] Address : 0000000000000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/mcfg.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/mcfg.asl deleted file mode 100644 index 1d4de63bc..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/mcfg.asl +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [MCFG] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "MCFG" [Memory Mapped Configuration table] -[0004] Table Length : 0000003C -[0001] Revision : 03 -[0001] Checksum : A5 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNMCFG" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] Reserved : 0000000000000000 - -[0008] Base Address : 00000000E0000000 -[0002] Segment Group Number : 0000 -[0001] Start Bus Number : 00 -[0001] End Bus Number : FF -[0004] Reserved : 00000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/rsdp.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/rsdp.asl deleted file mode 100644 index 0dacd86e9..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/rsdp.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * Template for [RSDP] ACPI Table (AML byte code table) - */ -[0008] Signature : "RSD PTR " -[0001] Checksum : 43 -[0006] Oem ID : "ACRN " -[0001] Revision : 02 -[0004] RSDT Address : 0000000000000000 -[0004] Length : 00000024 -[0008] XSDT Address : 000000007FF00080 -[0001] Extended Checksum : DC -[0003] Reserved : 000000 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/xsdt.asl b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/xsdt.asl deleted file mode 100644 index c480b9937..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/VM1/xsdt.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Intel ACPI Component Architecture - * AML/ASL+ Disassembler version 20190703 (64-bit version) - * Copyright (c) 2000 - 2019 Intel Corporation - * - * ACPI Data Table [XSDT] - * - * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue - */ - -[0004] Signature : "XSDT" [Extended System Description Table] -[0004] Table Length : 00000044 -[0001] Revision : 01 -[0001] Checksum : 75 -[0006] Oem ID : "ACRN " -[0008] Oem Table ID : "ACRNXSDT" -[0004] Oem Revision : 00000001 -[0004] Asl Compiler ID : "INTL" -[0004] Asl Compiler Revision : 20190703 - -[0008] ACPI Table Address 0 : 000000007FF00100 -[0008] ACPI Table Address 1 : 000000007FF00400 -[0008] ACPI Table Address 2 : 000000007FF00440 diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/ivshmem_cfg.h b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/ivshmem_cfg.h deleted file mode 100644 index 3c2ee2d52..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/ivshmem_cfg.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -#ifndef IVSHMEM_CFG_H -#define IVSHMEM_CFG_H - -#endif /* IVSHMEM_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/misc_cfg.h b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/misc_cfg.h deleted file mode 100644 index 3b4959d90..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/misc_cfg.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef MISC_CFG_H -#define MISC_CFG_H - -#define VM0_CONFIG_CPU_AFFINITY (AFFINITY_CPU(0U) | AFFINITY_CPU(2U)) -#define VM1_CONFIG_CPU_AFFINITY (AFFINITY_CPU(1U) | AFFINITY_CPU(3U)) - -#ifdef CONFIG_RDT_ENABLED - -/* - * The maximum CLOS that is allowed by ACRN hypervisor, - * its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) - * among all supported RDT resources in the platform. In other words, it is - * min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent - * CLOS allocations between all the RDT resources. - */ -#define HV_SUPPORTED_MAX_CLOS 0U - -/* - * Max number of Cache Mask entries corresponding to each CLOS. - * This can vary if CDP is enabled vs disabled, as each CLOS entry - * will have corresponding cache mask values for Data and Code when - * CDP is enabled. - */ -#define MAX_MBA_CLOS_NUM_ENTRIES 0U - -/* Max number of MBA delay entries corresponding to each CLOS. */ -#define MAX_CACHE_CLOS_NUM_ENTRIES 0U -#endif - -#define VM0_PASSTHROUGH_TPM -#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL -#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0xFED40000UL -#define VM0_TPM_BUFFER_SIZE 0x5000UL - -#define VM0_CONFIG_PCI_DEV_NUM 3U -#define VM1_CONFIG_PCI_DEV_NUM 3U - -#define VM0_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - -#define VM1_BOOT_ARGS "rw rootwait root=/dev/sda3 console=ttyS0 \ -noxsave nohpet no_timer_check ignore_loglevel \ -log_buf_len=16M consoleblank=0 tsc=reliable" - - -#define VM0_PT_INTX_NUM 0U - -#endif /* MISC_CFG_H */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/pci_dev.c b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/pci_dev.c deleted file mode 100644 index 59d0d2551..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/pci_dev.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include -#include -#include - -/* - * TODO: remove PTDEV macro and add DEV_PRIVINFO macro to initialize pbdf for - * passthrough device configuration and shm_name for ivshmem device configuration. - */ -#define PTDEV(PCI_DEV) PCI_DEV, PCI_DEV##_VBAR - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ -struct acrn_vm_pci_dev_config vm0_pci_devs[VM0_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(SATA_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_0), - }, -}; - -/* - * TODO: add DEV_PCICOMMON macro to initialize emu_type, vbdf and vdev_ops - * to simplify the code. - */ -struct acrn_vm_pci_dev_config vm1_pci_devs[VM1_CONFIG_PCI_DEV_NUM] = { - { - .emu_type = PCI_DEV_TYPE_HVEMUL, - .vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x00U}, - .vdev_ops = &vhostbridge_ops, - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x00U}, - PTDEV(USB_CONTROLLER_0), - }, - { - .emu_type = PCI_DEV_TYPE_PTDEV, - .vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x00U}, - PTDEV(ETHERNET_CONTROLLER_1), - }, -}; diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/pt_intx.c b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/pt_intx.c deleted file mode 100644 index 7573f370e..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/pt_intx.c +++ /dev/null @@ -1,10 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -struct pt_intx_config vm0_pt_intx[1U]; - diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/vbar_base.h b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/vbar_base.h deleted file mode 100644 index d9a05b701..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/vbar_base.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2020 Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef VBAR_BASE_H_ -#define VBAR_BASE_H_ - -#define VGA_COMPATIBLE_CONTROLLER_0_VBAR .vbar_base[0] = 0xa0000000UL, \ - .vbar_base[2] = 0x90000000UL - -#define SIGNAL_PROCESSING_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141e000UL - -#define USB_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1400000UL - -#define RAM_MEMORY_0_VBAR .vbar_base[0] = 0xa1416000UL, \ - .vbar_base[2] = 0xa141d000UL - -#define COMMUNICATION_CONTROLLER_0_VBAR .vbar_base[0] = 0xa141c000UL - -#define SATA_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1414000UL, \ - .vbar_base[1] = 0xa141b000UL, \ - .vbar_base[5] = 0xa141a000UL - -#define SD_HOST_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1419000UL - -#define AUDIO_DEVICE_0_VBAR .vbar_base[0] = 0xa1410000UL, \ - .vbar_base[4] = 0xa1000000UL - -#define SMBUS_0_VBAR .vbar_base[0] = 0xa1418000UL - -#define SERIAL_BUS_CONTROLLER_0_VBAR .vbar_base[0] = 0xfe010000UL - -#define NON_VOLATILE_MEMORY_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1300000UL - -#define ETHERNET_CONTROLLER_0_VBAR .vbar_base[0] = 0xa1200000UL, \ - .vbar_base[3] = 0xa1220000UL - -#define ETHERNET_CONTROLLER_1_VBAR .vbar_base[0] = 0xa1100000UL, \ - .vbar_base[3] = 0xa1120000UL - -#endif /* VBAR_BASE_H_ */ diff --git a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/whl-ipc-i7.config b/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/whl-ipc-i7.config deleted file mode 100644 index ef1fda3bf..000000000 --- a/misc/vm_configs/scenarios/logical_partition/whl-ipc-i7/whl-ipc-i7.config +++ /dev/null @@ -1,37 +0,0 @@ -# Board defconfig generated by acrn-config tool - -CONFIG_BOARD="whl-ipc-i7" -CONFIG_HV_RAM_START=0x11000000 -CONFIG_HV_RAM_SIZE=0x7800000 -CONFIG_PLATFORM_RAM_SIZE=0x400000000 -CONFIG_LOW_RAM_SIZE=0x00010000 -CONFIG_SOS_RAM_SIZE=0x400000000 -CONFIG_UOS_RAM_SIZE=0x200000000 -CONFIG_STACK_SIZE=0x2000 -CONFIG_IVSHMEM_ENABLED=n -CONFIG_GPU_SBDF=0x00000010 -CONFIG_SCHED_BVT=y -CONFIG_RELOC=y -CONFIG_MULTIBOOT2=y -CONFIG_RDT_ENABLED=n -CONFIG_CDP_ENABLED=n -CONFIG_HYPERV_ENABLED=y -CONFIG_IOMMU_ENFORCE_SNP=n -CONFIG_ACPI_PARSE_ENABLED=y -CONFIG_L1D_FLUSH_VMENTRY_ENABLED=n -CONFIG_MCE_ON_PSC_WORKAROUND_DISABLED=n -CONFIG_IOMMU_BUS_NUM=0x100 -CONFIG_MAX_IOAPIC_NUM=1 -CONFIG_MAX_IR_ENTRIES=256 -CONFIG_MAX_PCI_DEV_NUM=96 -CONFIG_MAX_IOAPIC_LINES=120 -CONFIG_MAX_PT_IRQ_ENTRIES=64 -CONFIG_MAX_MSIX_TABLE_NUM=64 -CONFIG_MAX_EMULATED_MMIO_REGIONS=16 -CONFIG_SERIAL_LEGACY=y -CONFIG_SERIAL_PIO_BASE=0x3F8 -CONFIG_LOG_BUF_SIZE=0x40000 -CONFIG_NPK_LOGLEVEL_DEFAULT=5 -CONFIG_MEM_LOGLEVEL_DEFAULT=5 -CONFIG_LOG_DESTINATION=7 -CONFIG_CONSOLE_LOGLEVEL_DEFAULT=3 diff --git a/misc/vm_configs/xmls/config-xmls/generic/hybrid.xml b/misc/vm_configs/xmls/config-xmls/generic/hybrid.xml deleted file mode 100644 index e29f06cc9..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/hybrid.xml +++ /dev/null @@ -1,212 +0,0 @@ - - - - n - /dev/ttyS0 - 5 - 5 - 3 - 7 - 0x40000 - - - - y - SCHED_BVT - y - - n - n - - 0 - - y - n - y - n - n - - n - - - - - - 0x2000 - - - 0x00010000 - 0x200000000 - 0x400000000 - 0x400000000 - - - - 0x100 - 256 - 1 - 96 - 120 - 64 - - 16 - - - - 0x00000010 - - - - - SAFETY_VM - ACRN PRE-LAUNCHED VM0 - - 0 - - - 3 - - - 0 - - - 0 - 0 - - - 0x100000000 - 0x20000000 - 0x0 - 0x0 - - - Zephyr - KERNEL_ZEPHYR - Zephyr_RawImage - - - 0x8000 - 0x8000 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - COM2_BASE - COM2_IRQ - 1 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - n - - - - SOS_VM - ACRN SOS VM - - 0 - - - 0 - 1 - 2 - - - 0 - 0 - 0 - - - 0 - CONFIG_SOS_RAM_SIZE - - - ACRN Service OS - KERNEL_BZIMAGE - Linux_bzImage - - SOS_VM_BOOTARGS - - - VUART_LEGACY_PIO - SOS_COM1_BASE - SOS_COM1_IRQ - - - VUART_LEGACY_PIO - SOS_COM2_BASE - SOS_COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - /dev/sda3 - - rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 - i915.nuclear_pageflip=1 - - - - - POST_STD_VM - - 0 - - - 2 - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 0 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/hybrid_launch_1uos.xml b/misc/vm_configs/xmls/config-xmls/generic/hybrid_launch_1uos.xml deleted file mode 100644 index e939cdf46..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/hybrid_launch_1uos.xml +++ /dev/null @@ -1,43 +0,0 @@ - - - - - - - ovmf - Disable - - - - - - - - - Disable - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/hybrid_rt.xml b/misc/vm_configs/xmls/config-xmls/generic/hybrid_rt.xml deleted file mode 100644 index 302c5d523..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/hybrid_rt.xml +++ /dev/null @@ -1,247 +0,0 @@ - - - - n - /dev/ttyS0 - 5 - 5 - 3 - 7 - 0x40000 - - - - y - SCHED_BVT - y - - n - n - - 0 - - y - n - y - n - n - - y - hv:/shm_region_0, 2, 0:2 - - - n - - - - - 0x2000 - - - 0x00010000 - 0x200000000 - 0x400000000 - 0x400000000 - - - - 0x100 - 256 - 1 - 96 - 120 - 64 - - 16 - - - - 0x00000010 - - - - - PRE_RT_VM - ACRN PRE-LAUNCHED VM0 - - 0 - - - 3 - - - 0 - - - 0 - 0 - - - 0x100000000 - 0x40000000 - 0x0 - 0x0 - - - PREEMPT-RT - KERNEL_BZIMAGE - RT_bzImage - - - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - COM2_BASE - COM2_IRQ - 1 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - y - - - - SOS_VM - ACRN SOS VM - - 0 - - - 0 - 1 - - - 0 - 0 - - - 0 - CONFIG_SOS_RAM_SIZE - - - ACRN Service OS - KERNEL_BZIMAGE - Linux_bzImage - - SOS_VM_BOOTARGS - - - VUART_LEGACY_PIO - SOS_COM1_BASE - SOS_COM1_IRQ - - - VUART_LEGACY_PIO - SOS_COM2_BASE - SOS_COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - /dev/sda3 - - rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 - i915.nuclear_pageflip=1 - - - - - POST_STD_VM - - 0 - - - 2 - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 0 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - POST_STD_VM - - 0 - - - 2 - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 0 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/industry.xml b/misc/vm_configs/xmls/config-xmls/generic/industry.xml deleted file mode 100644 index e9c4583d9..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/industry.xml +++ /dev/null @@ -1,185 +0,0 @@ - - - - n - /dev/ttyS0 - 5 - 5 - 3 - 7 - 0x40000 - - - - y - SCHED_BVT - y - - n - n - - 0 - - y - n - y - n - n - - n - - - - - - 0x2000 - - - 0x00010000 - 0x200000000 - 0x400000000 - 0x400000000 - - - - 0x100 - 256 - 1 - 96 - 120 - 64 - - 16 - - - - 0x00000010 - - - - - SOS_VM - ACRN SOS VM - - 0 - - - 0 - - - 0 - 0x20000000 - - - ACRN Service OS - KERNEL_BZIMAGE - Linux_bzImage - - SOS_VM_BOOTARGS - - - VUART_LEGACY_PIO - SOS_COM1_BASE - SOS_COM1_IRQ - - - VUART_LEGACY_PIO - SOS_COM2_BASE - SOS_COM2_IRQ - 2 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - /dev/sda3 - - rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 - i915.nuclear_pageflip=1 - - - - - POST_STD_VM - - 0 - - - 1 - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - POST_RT_VM - - 0 - - - 2 - 3 - - - 0 - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - COM2_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/industry_launch_1uos.xml b/misc/vm_configs/xmls/config-xmls/generic/industry_launch_1uos.xml deleted file mode 100644 index 9b65928cf..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/industry_launch_1uos.xml +++ /dev/null @@ -1,43 +0,0 @@ - - - - - - - ovmf - Disable - - - - - - - - - Disable - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/logical_partition.xml b/misc/vm_configs/xmls/config-xmls/generic/logical_partition.xml deleted file mode 100644 index 7a794c090..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/logical_partition.xml +++ /dev/null @@ -1,184 +0,0 @@ - - - - n - /dev/ttyS0 - 5 - 5 - 3 - 7 - 0x40000 - - - - y - SCHED_BVT - y - - n - n - - 0 - - y - n - y - n - n - - n - - - - - - 0x2000 - - - 0x00010000 - 0x200000000 - 0x400000000 - 0x400000000 - - - - 0x100 - 256 - 1 - 96 - 120 - 64 - - 16 - - - - 0x00000010 - - - - - PRE_STD_VM - ACRN PRE-LAUNCHED VM0 - - - - - - 0 - 2 - - - 0 - 0 - - - 0 - 0 - - - 0x100000000 - 0x20000000 - 0x0 - 0x0 - - - YOCTO - KERNEL_BZIMAGE - Linux_bzImage - - - rw rootwait root=/dev/sda3 console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel log_buf_len=16M consoleblank=0 tsc=reliable - - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - COM2_BASE - COM2_IRQ - 1 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - - n - - - - PRE_STD_VM - ACRN PRE-LAUNCHED VM1 - - - - - 1 - 3 - - - 0 - 0 - - - 0 - 0 - - - 0x120000000 - 0x20000000 - 0x0 - 0x0 - - - YOCTO - KERNEL_BZIMAGE - Linux_bzImage - - - rw rootwait root=/dev/sda3 console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel log_buf_len=16M - consoleblank=0 tsc=reliable - - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - COM2_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - - n - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/sdc.xml b/misc/vm_configs/xmls/config-xmls/generic/sdc.xml deleted file mode 100644 index b8210eb24..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/sdc.xml +++ /dev/null @@ -1,180 +0,0 @@ - - - - n - /dev/ttyS0 - 5 - 5 - 3 - 7 - 0x40000 - - - - y - SCHED_BVT - y - - n - n - - 0 - - y - n - y - n - n - - n - - - - - - 0x2000 - - - 0x00010000 - 0x200000000 - 0x400000000 - 0x400000000 - - - - 0x100 - 256 - 1 - 96 - 120 - 64 - - 16 - - - - 0x00000010 - - - - - SOS_VM - ACRN SOS VM - - 0 - - - 0 - - - 0 - CONFIG_SOS_RAM_SIZE - - - ACRN Service OS - KERNEL_BZIMAGE - Linux_bzImage - - SOS_VM_BOOTARGS - - - VUART_LEGACY_PIO - SOS_COM1_BASE - SOS_COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - SOS_COM2_IRQ - 1 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - /dev/sda3 - - rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3 - i915.nuclear_pageflip=1 - - - - - POST_STD_VM - - 0 - - - 1 - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - KATA_VM - - 1 - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 0 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/generic/sdc_launch_1uos.xml b/misc/vm_configs/xmls/config-xmls/generic/sdc_launch_1uos.xml deleted file mode 100644 index 72fc3a514..000000000 --- a/misc/vm_configs/xmls/config-xmls/generic/sdc_launch_1uos.xml +++ /dev/null @@ -1,44 +0,0 @@ - - - - - - - ovmf - Disable - - - - - - - - - Disable - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/HV.xml b/misc/vm_configs/xmls/config-xmls/template/HV.xml deleted file mode 100644 index f92b7991d..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/HV.xml +++ /dev/null @@ -1,62 +0,0 @@ - - - - n - /dev/ttyS0 - 5 - 5 - 3 - 7 - 0x40000 - - - - y - SCHED_BVT - y - - n - n - - 0 - - y - n - y - n - n - - n - - - - n - - - - - 0x2000 - - - 0x00010000 - 0x200000000 - 0x400000000 - 0x400000000 - - - - 0x100 - 256 - 1 - 96 - 120 - 64 - - 16 - - - - 0x00000010 - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/KATA_VM.xml b/misc/vm_configs/xmls/config-xmls/template/KATA_VM.xml deleted file mode 100644 index b206c2455..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/KATA_VM.xml +++ /dev/null @@ -1,35 +0,0 @@ - - - KATA_VM - - - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/LAUNCH_POST_RT_VM.xml b/misc/vm_configs/xmls/config-xmls/template/LAUNCH_POST_RT_VM.xml deleted file mode 100644 index 13268fc4c..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/LAUNCH_POST_RT_VM.xml +++ /dev/null @@ -1,44 +0,0 @@ - - - PREEMPT-RT LINUX - Hard RT - - - ovmf - - - - - - - - - - Disable - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/LAUNCH_POST_STD_VM.xml b/misc/vm_configs/xmls/config-xmls/template/LAUNCH_POST_STD_VM.xml deleted file mode 100644 index c522901c9..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/LAUNCH_POST_STD_VM.xml +++ /dev/null @@ -1,44 +0,0 @@ - - - - no - - - ovmf - - - - - - - - - - Disable - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/POST_RT_VM.xml b/misc/vm_configs/xmls/config-xmls/template/POST_RT_VM.xml deleted file mode 100644 index 572c8675b..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/POST_RT_VM.xml +++ /dev/null @@ -1,38 +0,0 @@ - - - POST_RT_VM - - - - - - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/POST_STD_VM.xml b/misc/vm_configs/xmls/config-xmls/template/POST_STD_VM.xml deleted file mode 100644 index fd29404ee..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/POST_STD_VM.xml +++ /dev/null @@ -1,38 +0,0 @@ - - - POST_STD_VM - - - - - - - - 0 - - - 0 - 0 - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/PRE_RT_VM.xml b/misc/vm_configs/xmls/config-xmls/template/PRE_RT_VM.xml deleted file mode 100644 index df03d5575..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/PRE_RT_VM.xml +++ /dev/null @@ -1,59 +0,0 @@ - - - PRE_RT_VM - - - GUEST_FLAG_LAPIC_PASSTHROUGH - GUEST_FLAG_RT - - - - - - 0 - - - 0 - 0 - - - - - 0x0 - 0x0 - - - - - - - - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - y - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/PRE_STD_VM.xml b/misc/vm_configs/xmls/config-xmls/template/PRE_STD_VM.xml deleted file mode 100644 index 2a047998d..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/PRE_STD_VM.xml +++ /dev/null @@ -1,59 +0,0 @@ - - - PRE_STD_VM - - - - - - - - - 0 - - - 0 - 0 - - - - - - - - - - - - - - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - - n - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/SAFETY_VM.xml b/misc/vm_configs/xmls/config-xmls/template/SAFETY_VM.xml deleted file mode 100644 index e171fec2e..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/SAFETY_VM.xml +++ /dev/null @@ -1,60 +0,0 @@ - - - SAFETY_VM - - - - - - - - - 0 - - - 0 - 0 - - - - - 0x0 - 0x0 - - - - - - - - - - - - VUART_LEGACY_PIO - COM1_BASE - COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - COM2_IRQ - 0 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - n - - - diff --git a/misc/vm_configs/xmls/config-xmls/template/SOS_VM.xml b/misc/vm_configs/xmls/config-xmls/template/SOS_VM.xml deleted file mode 100644 index b927d8cec..000000000 --- a/misc/vm_configs/xmls/config-xmls/template/SOS_VM.xml +++ /dev/null @@ -1,53 +0,0 @@ - - - SOS_VM - - - - - - - - - 0 - - - 0 - 0x20000000 - - - - - - - SOS_VM_BOOTARGS - - - VUART_LEGACY_PIO - SOS_COM1_BASE - SOS_COM1_IRQ - - - VUART_LEGACY_PIO - INVALID_COM_BASE - SOS_COM2_IRQ - 2 - 1 - - - INVALID_PCI_BASE - - - INVALID_PCI_BASE - 1 - 1 - - - - - - - - - -