From 987216fef0e3e50870ee58970daa5f7290ce04f4 Mon Sep 17 00:00:00 2001
From: "Yang,Yu-chu" <yu-chu.yang@intel.com>
Date: Tue, 15 Jun 2021 15:43:00 -0700
Subject: [PATCH] config-tools: add MSI-X capability

Add the MSI-X capability structure nodes under <capability
id="MSI-X"> in board.xml.
Example:
  <capability id="MSI-X">
    <table_size>16</table_size>
    <table_bir>1</table_bir>
    <table_offset>0x1000000</table_offset>
    <pba_bir>1</pba_bir>
    <pba_offset>0x0</pba_offset>
  </capability>

Fix the MSI <count> nodes when there is only one vector.

Tracked-On: #6235
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
---
 .../board_inspector/extractors/60-pci.py             | 12 ++++++++++--
 misc/config_tools/board_inspector/pcieparser/caps.py |  8 ++++++--
 2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/misc/config_tools/board_inspector/extractors/60-pci.py b/misc/config_tools/board_inspector/extractors/60-pci.py
index 0e199e92e..e42b8eeef 100644
--- a/misc/config_tools/board_inspector/extractors/60-pci.py
+++ b/misc/config_tools/board_inspector/extractors/60-pci.py
@@ -24,9 +24,9 @@ def collect_hostbridge_resources(bus_node):
                 add_child(bus_node, "resource", type="memory", min=hex(begin), max=hex(end), len=hex(end - begin + 1))
 
 def parse_msi(cap_node, cap_struct):
+    add_child(cap_node, "count", str(1 << cap_struct.multiple_message_capable))
     if cap_struct.multiple_message_capable > 0:
-        multiple_message_node = add_child(cap_node, "capability", id="multiple-message")
-        add_child(multiple_message_node, "count", str(1 << cap_struct.multiple_message_capable))
+        add_child(cap_node, "capability", id="multiple-message")
 
     if cap_struct.address_64bit:
         add_child(cap_node, "capability", id="64-bit address")
@@ -34,8 +34,16 @@ def parse_msi(cap_node, cap_struct):
     if cap_struct.per_vector_masking_capable:
         add_child(cap_node, "capability", id="per-vector masking")
 
+def parse_msix(cap_node, cap_struct):
+    add_child(cap_node, "table_size", str(cap_struct.table_size))
+    add_child(cap_node, "table_bir", str(cap_struct.table_bir))
+    add_child(cap_node, "table_offset", hex(cap_struct.table_offset_z))
+    add_child(cap_node, "pba_bir", str(cap_struct.pba_bir))
+    add_child(cap_node, "pba_offset", hex(cap_struct.pba_offset_z))
+
 cap_parsers = {
     "MSI": parse_msi,
+    "MSI-X": parse_msix,
 }
 
 def parse_device(bus_node, device_path):
diff --git a/misc/config_tools/board_inspector/pcieparser/caps.py b/misc/config_tools/board_inspector/pcieparser/caps.py
index 5326f63a9..564170e33 100644
--- a/misc/config_tools/board_inspector/pcieparser/caps.py
+++ b/misc/config_tools/board_inspector/pcieparser/caps.py
@@ -114,12 +114,12 @@ def parse_msi(buf, cap_ptr):
     field_list = msi_field_list(addr)
     return MSI_factory(field_list).from_buffer_copy(buf, cap_ptr)
 
-# MSI-X
+# MSI-X (0x11)
 
 class MSIX(cdata.Struct, Capability):
     _pack_ = 1
     _fields_ = copy.copy(CapabilityListRegister._fields_) + [
-        ('table_size', ctypes.c_uint16, 10),
+        ('table_size_z', ctypes.c_uint16, 10),
         ('reserved', ctypes.c_uint16, 3),
         ('function_mask', ctypes.c_uint16, 1),
         ('msix_enable', ctypes.c_uint16, 1),
@@ -129,6 +129,10 @@ class MSIX(cdata.Struct, Capability):
         ('pba_offset_z', ctypes.c_uint32, 29),
     ]
 
+    @property
+    def table_size(self):
+        return self.table_size_z + 1
+
     @property
     def table_offset(self):
         return self.table_offset_z << 3