github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-06-20 12:42:54 +00:00
Code Issues Projects Releases Wiki Activity

hv: vlapic: refine apicv_post_intr to internal function

Browse Source 
Rename vlapic_post_intr to apicv_post_intr and move it to internal function
since it's only used in vlaic.c.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Li, Fei1 2019-02-23 00:48:01 +08:00 committed by wenlingz
parent 5dd6e79fe7
commit 987ddafa6b
3 changed files with 4 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
doc/developer-guides/hld/hv-virt-interrupt.rst
View File

@ -106,9 +106,6 @@ These APIs will finish by making a request for *ACRN_REQUEST_EVENT.*
.. doxygenfunction:: vlapic_intr_msi .. doxygenfunction:: vlapic_intr_msi
:project: Project ACRN :project: Project ACRN
.. doxygenfunction:: vlapic_post_intr
:project: Project ACRN
.. doxygenfunction:: apicv_get_pir_desc_paddr .. doxygenfunction:: apicv_get_pir_desc_paddr
:project: Project ACRN :project: Project ACRN

6
hypervisor/arch/x86/guest/vlapic.c
View File

@ -90,6 +90,8 @@ static inline void vlapic_dump_isr(__unused const struct acrn_vlapic *vlapic, __
static int32_t static int32_t
apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector); apicv_set_intr_ready(struct acrn_vlapic *vlapic, uint32_t vector);
static void apicv_post_intr(uint16_t dest_pcpu_id);
/* /*
* Post an interrupt to the vcpu running on 'hostcpu'. This will use a * Post an interrupt to the vcpu running on 'hostcpu'. This will use a
* hardware assist if available (e.g. Posted Interrupt) or fall back to * hardware assist if available (e.g. Posted Interrupt) or fall back to
@ -522,7 +524,7 @@ vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level)
* it to vCPU in next vmentry. * it to vCPU in next vmentry.
*/ */
bitmap_set_lock(ACRN_REQUEST_EVENT, &vlapic->vcpu->arch.pending_req); bitmap_set_lock(ACRN_REQUEST_EVENT, &vlapic->vcpu->arch.pending_req);
vlapic_post_intr(vlapic->vcpu->pcpu_id); apicv_post_intr(vlapic->vcpu->pcpu_id);
ret = false; ret = false;
} else { } else {
ret = (pending_intr != 0); ret = (pending_intr != 0);
@ -555,7 +557,7 @@ vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool level)
* *
* @return None * @return None
*/ */
void vlapic_post_intr(uint16_t dest_pcpu_id) static void apicv_post_intr(uint16_t dest_pcpu_id)
{ {
send_single_ipi(dest_pcpu_id, VECTOR_POSTED_INTR); send_single_ipi(dest_pcpu_id, VECTOR_POSTED_INTR);
} }

14
hypervisor/include/arch/x86/guest/vlapic.h
View File

@ -155,20 +155,6 @@ bool vlapic_find_deliverable_intr(const struct acrn_vlapic *vlapic, uint32_t *ve
*/ */
void vlapic_get_deliverable_intr(struct acrn_vlapic *vlapic, uint32_t vector); void vlapic_get_deliverable_intr(struct acrn_vlapic *vlapic, uint32_t vector);
/**
* @brief Send notification vector to target pCPU.
*
* If APICv Posted-Interrupt is enabled and target pCPU is in non-root mode,
* pCPU will sync pending virtual interrupts from PIR to vIRR automatically,
* without VM exit.
* If pCPU in root-mode, virtual interrupt will be injected in next VM entry.
*
* @param[in] dest_pcpu_id Target CPU ID.
*
* @return None
*/
void vlapic_post_intr(uint16_t dest_pcpu_id);
/** /**
* @brief Get physical address to PIR description. * @brief Get physical address to PIR description.
* *