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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-25 15:02:13 +00:00
add vmx msr ops protection from guest OS
1.it doesn't support VMX for guest OS 2.for MSR out of control, inject GP to guest OS. Signed-off-by: Minggui Cao <minggui.cao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -152,6 +152,11 @@ void init_msr_emulation(struct vcpu *vcpu)
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i <= MSR_IA32_MTRR_FIX4K_F8000; i++) {
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i <= MSR_IA32_MTRR_FIX4K_F8000; i++) {
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enable_msr_interception(msr_bitmap, i);
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enable_msr_interception(msr_bitmap, i);
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}
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}
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for (i = MSR_IA32_VMX_BASIC;
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i <= MSR_IA32_VMX_TRUE_ENTRY_CTLS; i++) {
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enable_msr_interception(msr_bitmap, i);
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}
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}
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}
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/* Set up MSR bitmap - pg 2904 24.6.9 */
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/* Set up MSR bitmap - pg 2904 24.6.9 */
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@ -192,6 +197,7 @@ int rdmsr_handler(struct vcpu *vcpu)
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case MSR_IA32_MTRR_DEF_TYPE:
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case MSR_IA32_MTRR_DEF_TYPE:
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case MSR_IA32_MTRR_PHYSBASE_0 ... MSR_IA32_MTRR_PHYSMASK_9:
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case MSR_IA32_MTRR_PHYSBASE_0 ... MSR_IA32_MTRR_PHYSMASK_9:
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case MSR_IA32_MTRR_FIX64K_00000 ... MSR_IA32_MTRR_FIX4K_F8000:
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case MSR_IA32_MTRR_FIX64K_00000 ... MSR_IA32_MTRR_FIX4K_F8000:
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case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_TRUE_ENTRY_CTLS:
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{
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{
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vcpu_inject_gp(vcpu);
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vcpu_inject_gp(vcpu);
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break;
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break;
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@ -232,6 +238,7 @@ int rdmsr_handler(struct vcpu *vcpu)
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default:
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default:
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{
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{
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pr_warn("rdmsr: %lx should not come here!", msr);
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pr_warn("rdmsr: %lx should not come here!", msr);
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vcpu_inject_gp(vcpu);
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v = 0;
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v = 0;
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break;
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break;
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}
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}
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@ -280,6 +287,7 @@ int wrmsr_handler(struct vcpu *vcpu)
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case MSR_IA32_MTRR_DEF_TYPE:
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case MSR_IA32_MTRR_DEF_TYPE:
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case MSR_IA32_MTRR_PHYSBASE_0 ... MSR_IA32_MTRR_PHYSMASK_9:
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case MSR_IA32_MTRR_PHYSBASE_0 ... MSR_IA32_MTRR_PHYSMASK_9:
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case MSR_IA32_MTRR_FIX64K_00000 ... MSR_IA32_MTRR_FIX4K_F8000:
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case MSR_IA32_MTRR_FIX64K_00000 ... MSR_IA32_MTRR_FIX4K_F8000:
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case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_TRUE_ENTRY_CTLS:
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{
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{
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vcpu_inject_gp(vcpu);
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vcpu_inject_gp(vcpu);
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break;
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break;
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@ -329,8 +337,8 @@ int wrmsr_handler(struct vcpu *vcpu)
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}
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}
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default:
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default:
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{
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{
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ASSERT(0, "wrmsr: %lx should not come here!", msr);
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pr_warn(0, "wrmsr: %lx should not come here!", msr);
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msr_write(msr, v);
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vcpu_inject_gp(vcpu);
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break;
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break;
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}
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}
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}
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}
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