hv: vlapic_timer: refine vlapic tscdeadline timer

Add vlapic_create_timer/vlapic_reset_timer to setup/reset a timer.
Add vlapic_update_lvtt to disarm timer when mode changes.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Li, Fei1
2018-05-04 10:22:51 +08:00
committed by Jack Ren
parent ea54216116
commit 9dd7d27737
4 changed files with 132 additions and 44 deletions

View File

@@ -45,6 +45,17 @@
(idx < vm->hw.num_vcpus) & (vcpu != NULL); \
idx++, vcpu = vm->hw.vcpu_array[idx])
/* the index is matched with emulated msrs array*/
enum {
IDX_TSC_DEADLINE,
IDX_BIOS_UPDT_TRIG,
IDX_BIOS_SIGN_ID,
IDX_TSC,
IDX_MAX_MSR
};
struct vhm_request;
/*