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HV: add vm config files for partition mode

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Add VM configure files for Intel apl-mrb and dnv-cb2 platforms.

The board specific config header is named as partition_config.h and
the PCI passthrough device list is named as pt_dev.c under
hypervisor/arch/x86/configs/$CONFIG_BOARD folder.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun
2019-02-01 14:53:36 +08:00
committed by Xie, Nanlin
parent f4adb109de
commit 9e33178998
6 changed files with 213 additions and 1 deletions
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42
hypervisor/arch/x86/configs/dnv-cb2/partition_config.h Normal file
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@@ -0,0 +1,42 @@
/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PARTITION_CONFIG_H
#define PARTITION_CONFIG_H
#define PRE_LAUNCH_VM_NUM 2
#define VM0_CONFIGURED
#define VM0_CONFIG_NAME "PRE-LAUNCHED VM1 for DNV-CB2"
#define VM0_CONFIG_TYPE PRE_LAUNCHED_VM
#define VM0_CONFIG_PCPU_BITMAP (PLUG_CPU(0) | PLUG_CPU(2) | PLUG_CPU(4) | PLUG_CPU(6))
#define VM0_CONFIG_FLAGS LAPIC_PASSTHROUGH | IO_COMPLETION_POLLING
#define VM0_CONFIG_MEM_START_HPA 0x100000000UL
#define VM0_CONFIG_MEM_SIZE 0x80000000UL
#define VM0_CONFIG_OS_NAME "ClearLinux 26600"
#define VM0_CONFIG_OS_BOOTARGS "root=/dev/sda rw rootwait noxsave maxcpus=4 nohpet console=hvc0 " \
"console=ttyS0 no_timer_check ignore_loglevel log_buf_len=16M "\
"consoleblank=0 tsc=reliable xapic_phys apic_debug"
#define VM1_CONFIGURED
#define VM1_CONFIG_NAME "PRE-LAUNCHED VM2 for DNV-CB2"
#define VM1_CONFIG_TYPE PRE_LAUNCHED_VM
#define VM1_CONFIG_PCPU_BITMAP (PLUG_CPU(1) | PLUG_CPU(3) | PLUG_CPU(5) | PLUG_CPU(7))
#define VM1_CONFIG_FLAGS LAPIC_PASSTHROUGH | IO_COMPLETION_POLLING
#define VM1_CONFIG_MEM_START_HPA 0x180000000UL
#define VM1_CONFIG_MEM_SIZE 0x80000000UL
#define VM1_CONFIG_OS_NAME "ClearLinux 26600"
#define VM1_CONFIG_OS_BOOTARGS "root=/dev/sda2 rw rootwait noxsave maxcpus=4 nohpet console=hvc0 "\
"console=ttyS0 no_timer_check ignore_loglevel log_buf_len=16M "\
"consoleblank=0 tsc=reliable xapic_phys apic_debug"
extern struct vpci_vdev_array vpci_vdev_array0, vpci_vdev_array1;
#endif /* PARTITION_CONFIG_H */

49
hypervisor/arch/x86/configs/dnv-cb2/pt_dev.c Normal file
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/*
* Copyright (C) 2019 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <hypervisor.h>
struct vpci_vdev_array vpci_vdev_array0 = {
.num_pci_vdev = 3,
.vpci_vdev_list = {
{/*vdev 0: hostbridge */
.vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x0U},
.pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x0U},
},
{/*vdev 1: Ethernet*/
.vbdf.bits = {.b = 0x00U, .d = 0x01U, .f = 0x0U},
.pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x1U},
},
{/*vdev 2: USB*/
.vbdf.bits = {.b = 0x00U, .d = 0x02U, .f = 0x0U},
.pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x0U},
},
}
};
struct vpci_vdev_array vpci_vdev_array1 = {
.num_pci_vdev = 3,
.vpci_vdev_list = {
{/*vdev 0: hostbridge*/
.vbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x0U},
.pbdf.bits = {.b = 0x00U, .d = 0x00U, .f = 0x0U},
},
{/*vdev 1: SATA controller*/
.vbdf.bits = {.b = 0x00U, .d = 0x05U, .f = 0x0U},
.pbdf.bits = {.b = 0x00U, .d = 0x14U, .f = 0x0U},
},
{/*vdev 2: Ethernet*/
.vbdf.bits = {.b = 0x00U, .d = 0x06U, .f = 0x0U},
.pbdf.bits = {.b = 0x03U, .d = 0x00U, .f = 0x0U},
},
}
};