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HV: vuart: support MSR and MCR

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In Linux 8250 driver, it has different flags for UART ports. For COM1,
COM2 and COM3, UPF_SKIP_TEST is set, which is used to skip the loopback
test for the port. But for COM4, UPF_SKIP_TEST is not set, so when
probing COM4, the driver will access MCR and MSR registers to make sure
the port is exsit. So, add support for MSR and MCR.
Default ports info:
    COM1, ttyS0, 0x3F8
    COM2, ttyS1, 0x2F8
    COM3, ttyS2, 0x3E8
    COM4, ttyS3, 0x2E8

Tracked-On: #2987
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Conghui Chen
2019-04-29 03:34:40 +08:00
committed by ACRN System Integration
parent 4efc9e3ef9
commit a090d03780
2 changed files with 88 additions and 5 deletions
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21
hypervisor/include/debug/uart16550.h
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@@ -36,6 +36,7 @@
/* value definitions for IIR */
#define IIR_FIFO_MASK 0xc0U /* set if FIFOs are enabled */
#define IIR_RXTOUT 0x0cU
#define IER_EMSC 0x08U
#define IIR_RLS 0x06U
#define IIR_RXRDY 0x04U
#define IIR_TXRDY 0x02U
@@ -87,9 +88,29 @@
#define LSR_DR (1U << 0U)
/* definition for MCR */
#define MCR_PRESCALE (1U << 7U) /* only available on 16650 up */
#define MCR_LOOPBACK (1U << 4U)
#define MCR_IE (1U << 3U)
#define MCR_IENABLE MCR_IE
#define MCR_DRS (1U << 2U)
#define MCR_RTS (1U << 1U) /* Request to Send */
#define MCR_DTR (1U << 0U) /* Data Terminal Ready */
/* defifor MSR */
#define MSR_DCD (1U << 7U)
#define MSR_RI (1U << 6U)
#define MSR_DSR (1U << 5U)
#define MSR_CTS (1U << 4U)
#define MSR_DDCD (1U << 3U)
#define MSR_TERI (1U << 2U)
#define MSR_DDSR (1U << 1U)
#define MSR_DCTS (1U << 0U)
#define MCR_OUT2 (1U << 3U)
#define MCR_OUT1 (1U << 2U)
#define MSR_DELTA_MASK 0x0FU
/* definition for FCR */
#define FCR_RX_MASK 0xc0U
#define FCR_DMA (1U << 3U)