HV: ioapic: unify the access pattern to RTEs

There are two different ways the current implementation adopts to access ioapic
RTEs:

    1. As two 32-bit registers (typically named ''low'' and ''high''), or

    2. As one 64-bit register (typically named ''rte'').

Two issues arise due to the mixed use of these two patterns.

    1. Additional conversions are introduced. As an example, ioapic_get_rte()
       merges two RTE fragments into a uint64_t, while some callers break it
       back to ''low'' and ''high'' again.

    2. It is tricky to choose the proper width of IOAPIC_RTE_xxx constants. SOS
       boot failure is seen when they are 32-bit due to the following code:

           /* reg is uint64_t */
           vioapic->rtbl[pin].reg &= ~IOAPIC_RTE_REM_IRR;

       while making them 64-bit leads to implicit narrowing when the RTEs are accessed
       in the low & high pattern.

This patch defines a union ''ioapic_rte'' and unifies the access pattern
to IOAPIC and vIOAPIC RTEs.

v1 -> v2:

    * Instead of two 32-bit ''low'' and ''high'', define a union that allows
      either 32-bit or 64-bit accesses to RTEs.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

hypervisor/include/arch/x86/apicreg.h

@@ -253,6 +253,15 @@ struct ioapic {
 	uint32_t iowin;	PAD3;
 };
 
+/* IOAPIC Redirection Table (RTE) Entry structure */
+union ioapic_rte {
+	uint64_t full;
+	struct {
+		uint32_t lo_32;
+		uint32_t hi_32;
+	} u;
+};
+
 #undef PAD4
 #undef PAD3
 
@@ -480,7 +489,9 @@ struct ioapic {
 /*
  * fields in the IO APIC's redirection table entries
  */
-#define IOAPIC_RTE_DEST	APIC_ID_MASK	/* broadcast addr: all APICs */
+#define IOAPIC_RTE_DEST_SHIFT  	56U
+/* broadcast addr: all APICs */
+#define IOAPIC_RTE_DEST_MASK	0xff00000000000000UL
 
 #define IOAPIC_RTE_RESV	0x00fe0000UL	/* reserved */