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HV: ioapic: unify the access pattern to RTEs
There are two different ways the current implementation adopts to access ioapic
RTEs:
1. As two 32-bit registers (typically named ''low'' and ''high''), or
2. As one 64-bit register (typically named ''rte'').
Two issues arise due to the mixed use of these two patterns.
1. Additional conversions are introduced. As an example, ioapic_get_rte()
merges two RTE fragments into a uint64_t, while some callers break it
back to ''low'' and ''high'' again.
2. It is tricky to choose the proper width of IOAPIC_RTE_xxx constants. SOS
boot failure is seen when they are 32-bit due to the following code:
/* reg is uint64_t */
vioapic->rtbl[pin].reg &= ~IOAPIC_RTE_REM_IRR;
while making them 64-bit leads to implicit narrowing when the RTEs are accessed
in the low & high pattern.
This patch defines a union ''ioapic_rte'' and unifies the access pattern
to IOAPIC and vIOAPIC RTEs.
v1 -> v2:
* Instead of two 32-bit ''low'' and ''high'', define a union that allows
either 32-bit or 64-bit accesses to RTEs.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
@@ -17,7 +17,6 @@
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#define GSI_MASK_IRQ(irq) irq_gsi_mask_unmask((irq), true)
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#define GSI_UNMASK_IRQ(irq) irq_gsi_mask_unmask((irq), false)
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#define GSI_SET_RTE(irq, rte) ioapic_set_rte((irq), (rte))
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void setup_ioapic_irq(void);
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@@ -26,8 +25,8 @@ uint32_t irq_gsi_num(void);
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uint8_t irq_to_pin(uint32_t irq);
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uint32_t pin_to_irq(uint8_t pin);
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void irq_gsi_mask_unmask(uint32_t irq, bool mask);
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void ioapic_set_rte(uint32_t irq, uint64_t rte);
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void ioapic_get_rte(uint32_t irq, uint64_t *rte);
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void ioapic_set_rte(uint32_t irq, union ioapic_rte rte);
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void ioapic_get_rte(uint32_t irq, union ioapic_rte *rte);
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void suspend_ioapic(void);
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