github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-21 00:38:28 +00:00
Code Issues Projects Releases Wiki Activity

pci: mcfg: limit device bus numbers which could access by ECAM

Browse Source 
Per PCI Firmware Specification Revision 3.0, 4.1.2. MCFG Table Description:
Memory Mapped Enhanced Configuration Space Base Address Allocation Structure
assign the Start Bus Number and the End Bus Number which could decoded by the
Host Bridge. We should not access the PCI device which bus number outside of
the range of [Start Bus Number, End Bus Number).
For ACRN,  we should:
1. Don't detect PCI device which bus number outside the range of
[Start Bus Number, End Bus Number) of MCFG ACPI Table.
2. Only trap the ECAM MMIO size: [MMCFG_BASE_ADDRESS, MMCFG_BASE_ADDRESS +
(End Bus Number - Start Bus Number + 1) * 0x100000) for SOS.

Tracked-On: #5233

Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Li Fei1
2020-08-31 14:16:17 +08:00
committed by wenlingz
parent 03036062cd
commit a2fd8c5a9d
9 changed files with 67 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
hypervisor/arch/x86/guest/vm.c
View File

@@ -292,6 +292,7 @@ static void prepare_sos_vm_memmap(struct acrn_vm *vm)
uint32_t entries_count = vm->e820_entry_num;
const struct e820_entry *p_e820 = vm->e820_entries;
const struct mem_range *p_mem_range_info = get_mem_range_info();
struct pci_mmcfg_region *pci_mmcfg;
pr_dbg("sos_vm: bottom memory - 0x%lx, top memory - 0x%lx\n",
p_mem_range_info->mem_bottom, p_mem_range_info->mem_top);
@@ -354,7 +355,8 @@ static void prepare_sos_vm_memmap(struct acrn_vm *vm)
ept_del_mr(vm, pml4_page, get_ap_trampoline_buf(), CONFIG_LOW_RAM_SIZE);
/* unmap PCIe MMCONFIG region since it's owned by hypervisor */
ept_del_mr(vm, (uint64_t *)vm->arch_vm.nworld_eptp, get_mmcfg_base(), PCI_MMCONFIG_SIZE);
pci_mmcfg = get_mmcfg_region();
ept_del_mr(vm, (uint64_t *)vm->arch_vm.nworld_eptp, pci_mmcfg->address, get_pci_mmcfg_size(pci_mmcfg));
}
/* Add EPT mapping of EPC reource for the VM */