diff --git a/hypervisor/arch/x86/rdt.c b/hypervisor/arch/x86/rdt.c
index 8dd92e448..dac8ebf4b 100644
--- a/hypervisor/arch/x86/rdt.c
+++ b/hypervisor/arch/x86/rdt.c
@@ -22,7 +22,7 @@ const uint16_t hv_clos = 0U;
  * clos value (valid_clos_num) that is common between the resources as
  * each resource's clos max value to have consistent allocation.
  */
-uint16_t valid_clos_num = MAX_PLATFORM_CLOS_NUM;
+uint16_t valid_clos_num = HV_SUPPORTED_MAX_CLOS;
 
 #ifdef CONFIG_RDT_ENABLED
 static struct rdt_info res_cap_info[RDT_NUM_RESOURCES] = {
diff --git a/hypervisor/include/arch/x86/board.h b/hypervisor/include/arch/x86/board.h
index a7e5ba1a2..17ce5bc70 100644
--- a/hypervisor/include/arch/x86/board.h
+++ b/hypervisor/include/arch/x86/board.h
@@ -28,9 +28,9 @@ struct vmsix_on_msi_info {
 extern struct dmar_info plat_dmar_info;
 
 #ifdef CONFIG_RDT_ENABLED
-extern struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM];
-extern struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM];
-extern struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM];
+extern struct platform_clos_info platform_l2_clos_array[HV_SUPPORTED_MAX_CLOS];
+extern struct platform_clos_info platform_l3_clos_array[HV_SUPPORTED_MAX_CLOS];
+extern struct platform_clos_info platform_mba_clos_array[HV_SUPPORTED_MAX_CLOS];
 #endif
 
 extern const struct cpu_state_table board_cpu_state_tbl;
diff --git a/misc/acrn-config/board_config/board_c.py b/misc/acrn-config/board_config/board_c.py
index 01f98047d..deecedef6 100644
--- a/misc/acrn-config/board_config/board_c.py
+++ b/misc/acrn-config/board_config/board_c.py
@@ -139,7 +139,7 @@ def gen_rdt_res(config):
 
     cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
     mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
-    # TODO: Since use the MAX_PLATFORM_CLOS_NUM for L2/L3/MBA, so use the minimal number of them
+    # TODO: Since use the HV_SUPPORTED_MAX_CLOS for L2/L3/MBA, so use the minimal number of them
     common_clos_max = min(len(cat_mask_list), len(mba_delay_list))
 
     if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
@@ -149,29 +149,29 @@ def gen_rdt_res(config):
 
     print("\n#ifdef CONFIG_RDT_ENABLED", file=config)
     if len(rdt_resources) == 0 or common_clos_max == 0:
-        print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l2"), file=config)
-        print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l3"), file=config)
-        print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("mba"), file=config)
+        print("struct platform_clos_info platform_{0}_clos_array[HV_SUPPORTED_MAX_CLOS];".format("l2"), file=config)
+        print("struct platform_clos_info platform_{0}_clos_array[HV_SUPPORTED_MAX_CLOS];".format("l3"), file=config)
+        print("struct platform_clos_info platform_{0}_clos_array[HV_SUPPORTED_MAX_CLOS];".format("mba"), file=config)
     else:
         for idx, rdt_res in enumerate(rdt_resources):
             if rdt_res == "L2":
                 rdt_res_str = "l2"
                 print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
-                      "MAX_PLATFORM_CLOS_NUM"), file=config)
+                      "HV_SUPPORTED_MAX_CLOS"), file=config)
                 populate_clos_mask_msr(rdt_res, cat_mask_list, config)
                 print("};\n", file=config)
                 res_present[RDT.L2.value] = 1
             elif rdt_res == "L3":
                 rdt_res_str = "l3"
                 print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
-                      "MAX_PLATFORM_CLOS_NUM"), file=config)
+                      "HV_SUPPORTED_MAX_CLOS"), file=config)
                 populate_clos_mask_msr(rdt_res, cat_mask_list, config)
                 print("};\n", file=config)
                 res_present[RDT.L3.value] = 1
             elif rdt_res == "MBA":
                 rdt_res_str = "mba"
                 print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
-                      "MAX_PLATFORM_CLOS_NUM"), file=config)
+                      "HV_SUPPORTED_MAX_CLOS"), file=config)
                 err_dic = populate_mba_delay_mask(rdt_res, mba_delay_list, config)
                 print("};\n", file=config)
                 res_present[RDT.MBA.value] = 1
@@ -180,11 +180,11 @@ def gen_rdt_res(config):
                 return err_dic
 
         if res_present[RDT.L2.value] == 0:
-            print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "MAX_PLATFORM_CLOS_NUM"), file=config)
+            print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "HV_SUPPORTED_MAX_CLOS"), file=config)
         if res_present[RDT.L3.value] == 0:
-            print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "MAX_PLATFORM_CLOS_NUM"), file=config)
+            print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "HV_SUPPORTED_MAX_CLOS"), file=config)
         if res_present[RDT.MBA.value] == 0:
-            print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("mba", "MAX_PLATFORM_CLOS_NUM"), file=config)
+            print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("mba", "HV_SUPPORTED_MAX_CLOS"), file=config)
 
     print("#endif", file=config)
 
diff --git a/misc/acrn-config/board_config/board_info_h.py b/misc/acrn-config/board_config/board_info_h.py
index 0071a6523..c3ba2fdc1 100644
--- a/misc/acrn-config/board_config/board_info_h.py
+++ b/misc/acrn-config/board_config/board_info_h.py
@@ -81,7 +81,7 @@ def generate_file(config):
 
     # define CONFIG_MAX_PCPCU_NUM
     print("#define MAX_PCPU_NUM\t\t\t{}U".format(max_cpu_num), file=config)
-    print("#define MAX_PLATFORM_CLOS_NUM\t\t{}U".format(common_clos_max), file=config)
+    print("#define HV_SUPPORTED_MAX_CLOS\t\t{}U".format(common_clos_max), file=config)
 
     # define MAX_VMSIX_ON_MSI_PDEVS_NUM
     gen_known_caps_pci_head(config)
diff --git a/misc/acrn-config/library/hv_cfg_lib.py b/misc/acrn-config/library/hv_cfg_lib.py
index 99de0a316..5435c0ea0 100644
--- a/misc/acrn-config/library/hv_cfg_lib.py
+++ b/misc/acrn-config/library/hv_cfg_lib.py
@@ -182,7 +182,7 @@ def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
     cat_max_mask_settings_len = len(cat_mask_list)
     if clos_max_set_entry != cat_max_mask_settings_len:
         key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
-        ERR_LIST[key] = "Number of Cache mask entries should be equal to MAX_PLATFORM_CLOS_NUM={}".format(clos_max_set_entry)
+        ERR_LIST[key] = "Number of Cache mask entries should be equal to HV_SUPPORTED_MAX_CLOS={}".format(clos_max_set_entry)
         return
 
     clos_max_mask_str = clos_max_mask_list[0].strip('"').strip("'")
@@ -212,7 +212,7 @@ def mba_delay_check(mba_delay_list, feature, mba_str, max_mask_str):
     mba_delay_settings_len = len(mba_delay_list)
     if clos_max != mba_delay_settings_len:
         key = 'hv,{},{},{}'.format(feature, mba_str, max_mask_str)
-        ERR_LIST[key] = "Number of MBA delay entries should be equal to MAX_PLATFORM_CLOS_NUM={}".format(clos_max)
+        ERR_LIST[key] = "Number of MBA delay entries should be equal to HV_SUPPORTED_MAX_CLOS={}".format(clos_max)
         return
 
     mba_idx = res_info.index("MBA")
diff --git a/misc/hv_prebuild/vm_cfg_checks.c b/misc/hv_prebuild/vm_cfg_checks.c
index afd73a81a..43b3b586e 100644
--- a/misc/hv_prebuild/vm_cfg_checks.c
+++ b/misc/hv_prebuild/vm_cfg_checks.c
@@ -79,7 +79,7 @@ static bool check_vm_uuid_collision(uint16_t vm_id)
 static bool check_vm_clos_config(uint16_t vm_id)
 {
 	uint16_t i;
-	uint16_t platform_clos_num = MAX_PLATFORM_CLOS_NUM;
+	uint16_t platform_clos_num = HV_SUPPORTED_MAX_CLOS;
 	bool ret = true;
 	struct acrn_vm_config *vm_config = get_vm_config(vm_id);
 	uint16_t vcpu_num = bitmap_weight(vm_config->cpu_affinity);
diff --git a/misc/vm_configs/boards/nuc7i7dnb/board.c b/misc/vm_configs/boards/nuc7i7dnb/board.c
index 094b305c6..de4a7ce67 100644
--- a/misc/vm_configs/boards/nuc7i7dnb/board.c
+++ b/misc/vm_configs/boards/nuc7i7dnb/board.c
@@ -71,9 +71,9 @@ struct dmar_info plat_dmar_info = {
 };
 
 #ifdef CONFIG_RDT_ENABLED
-struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM];
-struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM];
-struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM];
+struct platform_clos_info platform_l2_clos_array[HV_SUPPORTED_MAX_CLOS];
+struct platform_clos_info platform_l3_clos_array[HV_SUPPORTED_MAX_CLOS];
+struct platform_clos_info platform_mba_clos_array[HV_SUPPORTED_MAX_CLOS];
 #endif
 
 static const struct cpu_cx_data board_cpu_cx[3] = {
diff --git a/misc/vm_configs/boards/nuc7i7dnb/board_info.h b/misc/vm_configs/boards/nuc7i7dnb/board_info.h
index d7add73ef..bba5ec365 100644
--- a/misc/vm_configs/boards/nuc7i7dnb/board_info.h
+++ b/misc/vm_configs/boards/nuc7i7dnb/board_info.h
@@ -8,7 +8,7 @@
 #define BOARD_INFO_H
 
 #define MAX_PCPU_NUM			4U
-#define MAX_PLATFORM_CLOS_NUM		0U
+#define HV_SUPPORTED_MAX_CLOS		0U
 #define MAX_VMSIX_ON_MSI_PDEVS_NUM	0U
 #define MAX_HIDDEN_PDEVS_NUM		0U
 
diff --git a/misc/vm_configs/boards/whl-ipc-i5/board.c b/misc/vm_configs/boards/whl-ipc-i5/board.c
index 0c50f226e..5a028c72d 100644
--- a/misc/vm_configs/boards/whl-ipc-i5/board.c
+++ b/misc/vm_configs/boards/whl-ipc-i5/board.c
@@ -72,9 +72,9 @@ struct dmar_info plat_dmar_info = {
 };
 
 #ifdef CONFIG_RDT_ENABLED
-struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM];
-struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM];
-struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM];
+struct platform_clos_info platform_l2_clos_array[HV_SUPPORTED_MAX_CLOS];
+struct platform_clos_info platform_l3_clos_array[HV_SUPPORTED_MAX_CLOS];
+struct platform_clos_info platform_mba_clos_array[HV_SUPPORTED_MAX_CLOS];
 #endif
 
 static const struct cpu_cx_data board_cpu_cx[3] = {
diff --git a/misc/vm_configs/boards/whl-ipc-i5/board_info.h b/misc/vm_configs/boards/whl-ipc-i5/board_info.h
index d7add73ef..bba5ec365 100644
--- a/misc/vm_configs/boards/whl-ipc-i5/board_info.h
+++ b/misc/vm_configs/boards/whl-ipc-i5/board_info.h
@@ -8,7 +8,7 @@
 #define BOARD_INFO_H
 
 #define MAX_PCPU_NUM			4U
-#define MAX_PLATFORM_CLOS_NUM		0U
+#define HV_SUPPORTED_MAX_CLOS		0U
 #define MAX_VMSIX_ON_MSI_PDEVS_NUM	0U
 #define MAX_HIDDEN_PDEVS_NUM		0U
 
diff --git a/misc/vm_configs/boards/whl-ipc-i7/board.c b/misc/vm_configs/boards/whl-ipc-i7/board.c
index 904a53f5a..41c851334 100644
--- a/misc/vm_configs/boards/whl-ipc-i7/board.c
+++ b/misc/vm_configs/boards/whl-ipc-i7/board.c
@@ -72,9 +72,9 @@ struct dmar_info plat_dmar_info = {
 };
 
 #ifdef CONFIG_RDT_ENABLED
-struct platform_clos_info platform_l2_clos_array[MAX_PLATFORM_CLOS_NUM];
-struct platform_clos_info platform_l3_clos_array[MAX_PLATFORM_CLOS_NUM];
-struct platform_clos_info platform_mba_clos_array[MAX_PLATFORM_CLOS_NUM];
+struct platform_clos_info platform_l2_clos_array[HV_SUPPORTED_MAX_CLOS];
+struct platform_clos_info platform_l3_clos_array[HV_SUPPORTED_MAX_CLOS];
+struct platform_clos_info platform_mba_clos_array[HV_SUPPORTED_MAX_CLOS];
 #endif
 
 static const struct cpu_cx_data board_cpu_cx[3] = {
diff --git a/misc/vm_configs/boards/whl-ipc-i7/board_info.h b/misc/vm_configs/boards/whl-ipc-i7/board_info.h
index d7add73ef..bba5ec365 100644
--- a/misc/vm_configs/boards/whl-ipc-i7/board_info.h
+++ b/misc/vm_configs/boards/whl-ipc-i7/board_info.h
@@ -8,7 +8,7 @@
 #define BOARD_INFO_H
 
 #define MAX_PCPU_NUM			4U
-#define MAX_PLATFORM_CLOS_NUM		0U
+#define HV_SUPPORTED_MAX_CLOS		0U
 #define MAX_VMSIX_ON_MSI_PDEVS_NUM	0U
 #define MAX_HIDDEN_PDEVS_NUM		0U