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hv: fix 'No brackets to then/else' in vpci code

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This patch addes missing brackets for 'if/else' statements based on
MISRA-C requirements 12 S.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Huihuang Shi <huihuang.shi@intel.com>
This commit is contained in:
Zide Chen
2018-11-06 15:54:20 -08:00
committed by wenlingz
parent bad813ea31
commit a646fcf761
1 changed files with 27 additions and 23 deletions
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8
hypervisor/dm/vpci/vpci.c
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@@ -64,7 +64,8 @@ static uint32_t pci_cfg_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes)
val |= PCI_CFG_ENABLE; val |= PCI_CFG_ENABLE;
} }
} }
} else if (is_cfg_data(addr)) { } else {
if (is_cfg_data(addr)) {
if (pi->cached_enable) { if (pi->cached_enable) {
uint16_t offset = addr - PCI_CONFIG_DATA; uint16_t offset = addr - PCI_CONFIG_DATA;
@@ -78,6 +79,7 @@ static uint32_t pci_cfg_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes)
} else { } else {
val = 0xFFFFFFFFU; val = 0xFFFFFFFFU;
} }
}
return val; return val;
} }
@@ -95,7 +97,8 @@ static void pci_cfg_io_write(struct acrn_vm *vm, uint16_t addr, size_t bytes,
pi->cached_reg = val & PCI_REGMAX; pi->cached_reg = val & PCI_REGMAX;
pi->cached_enable = ((val & PCI_CFG_ENABLE) == PCI_CFG_ENABLE); pi->cached_enable = ((val & PCI_CFG_ENABLE) == PCI_CFG_ENABLE);
} }
} else if (is_cfg_data(addr)) { } else {
if (is_cfg_data(addr)) {
if (pi->cached_enable) { if (pi->cached_enable) {
uint16_t offset = addr - PCI_CONFIG_DATA; uint16_t offset = addr - PCI_CONFIG_DATA;
@@ -108,6 +111,7 @@ static void pci_cfg_io_write(struct acrn_vm *vm, uint16_t addr, size_t bytes,
} else { } else {
pr_err("Not PCI cfg data/addr port access!"); pr_err("Not PCI cfg data/addr port access!");
} }
}
} }
void vpci_init(struct acrn_vm *vm) void vpci_init(struct acrn_vm *vm)